1 /* 2 * QEMU PAPR Storage Class Memory Interfaces 3 * 4 * Copyright (c) 2019-2020, IBM Corporation. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 #include "qemu/osdep.h" 25 #include "qapi/error.h" 26 #include "hw/ppc/spapr_drc.h" 27 #include "hw/ppc/spapr_nvdimm.h" 28 #include "hw/mem/nvdimm.h" 29 #include "qemu/nvdimm-utils.h" 30 #include "qemu/option.h" 31 #include "hw/ppc/fdt.h" 32 #include "qemu/range.h" 33 #include "sysemu/sysemu.h" 34 #include "hw/ppc/spapr_numa.h" 35 36 bool spapr_nvdimm_validate(HotplugHandler *hotplug_dev, NVDIMMDevice *nvdimm, 37 uint64_t size, Error **errp) 38 { 39 const MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev); 40 const MachineState *ms = MACHINE(hotplug_dev); 41 const char *nvdimm_opt = qemu_opt_get(qemu_get_machine_opts(), "nvdimm"); 42 g_autofree char *uuidstr = NULL; 43 QemuUUID uuid; 44 int ret; 45 46 if (!mc->nvdimm_supported) { 47 error_setg(errp, "NVDIMM hotplug not supported for this machine"); 48 return false; 49 } 50 51 /* 52 * NVDIMM support went live in 5.1 without considering that, in 53 * other archs, the user needs to enable NVDIMM support with the 54 * 'nvdimm' machine option and the default behavior is NVDIMM 55 * support disabled. It is too late to roll back to the standard 56 * behavior without breaking 5.1 guests. What we can do is to 57 * ensure that, if the user sets nvdimm=off, we error out 58 * regardless of being 5.1 or newer. 59 */ 60 if (!ms->nvdimms_state->is_enabled && nvdimm_opt) { 61 error_setg(errp, "nvdimm device found but 'nvdimm=off' was set"); 62 return false; 63 } 64 65 if (object_property_get_int(OBJECT(nvdimm), NVDIMM_LABEL_SIZE_PROP, 66 &error_abort) == 0) { 67 error_setg(errp, "PAPR requires NVDIMM devices to have label-size set"); 68 return false; 69 } 70 71 if (size % SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 72 error_setg(errp, "PAPR requires NVDIMM memory size (excluding label)" 73 " to be a multiple of %" PRIu64 "MB", 74 SPAPR_MINIMUM_SCM_BLOCK_SIZE / MiB); 75 return false; 76 } 77 78 uuidstr = object_property_get_str(OBJECT(nvdimm), NVDIMM_UUID_PROP, 79 &error_abort); 80 ret = qemu_uuid_parse(uuidstr, &uuid); 81 g_assert(!ret); 82 83 if (qemu_uuid_is_null(&uuid)) { 84 error_setg(errp, "NVDIMM device requires the uuid to be set"); 85 return false; 86 } 87 88 return true; 89 } 90 91 92 void spapr_add_nvdimm(DeviceState *dev, uint64_t slot, Error **errp) 93 { 94 SpaprDrc *drc; 95 bool hotplugged = spapr_drc_hotplugged(dev); 96 97 drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 98 g_assert(drc); 99 100 if (!spapr_drc_attach(drc, dev, errp)) { 101 return; 102 } 103 104 if (hotplugged) { 105 spapr_hotplug_req_add_by_index(drc); 106 } 107 } 108 109 static int spapr_dt_nvdimm(SpaprMachineState *spapr, void *fdt, 110 int parent_offset, NVDIMMDevice *nvdimm) 111 { 112 int child_offset; 113 char *buf; 114 SpaprDrc *drc; 115 uint32_t drc_idx; 116 uint32_t node = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_NODE_PROP, 117 &error_abort); 118 uint64_t slot = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_SLOT_PROP, 119 &error_abort); 120 uint64_t lsize = nvdimm->label_size; 121 uint64_t size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 122 NULL); 123 124 drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 125 g_assert(drc); 126 127 drc_idx = spapr_drc_index(drc); 128 129 buf = g_strdup_printf("ibm,pmemory@%x", drc_idx); 130 child_offset = fdt_add_subnode(fdt, parent_offset, buf); 131 g_free(buf); 132 133 _FDT(child_offset); 134 135 _FDT((fdt_setprop_cell(fdt, child_offset, "reg", drc_idx))); 136 _FDT((fdt_setprop_string(fdt, child_offset, "compatible", "ibm,pmemory"))); 137 _FDT((fdt_setprop_string(fdt, child_offset, "device_type", "ibm,pmemory"))); 138 139 spapr_numa_write_associativity_dt(spapr, fdt, child_offset, node); 140 141 buf = qemu_uuid_unparse_strdup(&nvdimm->uuid); 142 _FDT((fdt_setprop_string(fdt, child_offset, "ibm,unit-guid", buf))); 143 g_free(buf); 144 145 _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,my-drc-index", drc_idx))); 146 147 _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,block-size", 148 SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 149 _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,number-of-blocks", 150 size / SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 151 _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,metadata-size", lsize))); 152 153 _FDT((fdt_setprop_string(fdt, child_offset, "ibm,pmem-application", 154 "operating-system"))); 155 _FDT(fdt_setprop(fdt, child_offset, "ibm,cache-flush-required", NULL, 0)); 156 157 return child_offset; 158 } 159 160 int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, 161 void *fdt, int *fdt_start_offset, Error **errp) 162 { 163 NVDIMMDevice *nvdimm = NVDIMM(drc->dev); 164 165 *fdt_start_offset = spapr_dt_nvdimm(spapr, fdt, 0, nvdimm); 166 167 return 0; 168 } 169 170 void spapr_dt_persistent_memory(SpaprMachineState *spapr, void *fdt) 171 { 172 int offset = fdt_subnode_offset(fdt, 0, "persistent-memory"); 173 GSList *iter, *nvdimms = nvdimm_get_device_list(); 174 175 if (offset < 0) { 176 offset = fdt_add_subnode(fdt, 0, "persistent-memory"); 177 _FDT(offset); 178 _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0x1))); 179 _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0x0))); 180 _FDT((fdt_setprop_string(fdt, offset, "device_type", 181 "ibm,persistent-memory"))); 182 } 183 184 /* Create DT entries for cold plugged NVDIMM devices */ 185 for (iter = nvdimms; iter; iter = iter->next) { 186 NVDIMMDevice *nvdimm = iter->data; 187 188 spapr_dt_nvdimm(spapr, fdt, offset, nvdimm); 189 } 190 g_slist_free(nvdimms); 191 192 return; 193 } 194 195 static target_ulong h_scm_read_metadata(PowerPCCPU *cpu, 196 SpaprMachineState *spapr, 197 target_ulong opcode, 198 target_ulong *args) 199 { 200 uint32_t drc_index = args[0]; 201 uint64_t offset = args[1]; 202 uint64_t len = args[2]; 203 SpaprDrc *drc = spapr_drc_by_index(drc_index); 204 NVDIMMDevice *nvdimm; 205 NVDIMMClass *ddc; 206 uint64_t data = 0; 207 uint8_t buf[8] = { 0 }; 208 209 if (!drc || !drc->dev || 210 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 211 return H_PARAMETER; 212 } 213 214 if (len != 1 && len != 2 && 215 len != 4 && len != 8) { 216 return H_P3; 217 } 218 219 nvdimm = NVDIMM(drc->dev); 220 if ((offset + len < offset) || 221 (nvdimm->label_size < len + offset)) { 222 return H_P2; 223 } 224 225 ddc = NVDIMM_GET_CLASS(nvdimm); 226 ddc->read_label_data(nvdimm, buf, len, offset); 227 228 switch (len) { 229 case 1: 230 data = ldub_p(buf); 231 break; 232 case 2: 233 data = lduw_be_p(buf); 234 break; 235 case 4: 236 data = ldl_be_p(buf); 237 break; 238 case 8: 239 data = ldq_be_p(buf); 240 break; 241 default: 242 g_assert_not_reached(); 243 } 244 245 args[0] = data; 246 247 return H_SUCCESS; 248 } 249 250 static target_ulong h_scm_write_metadata(PowerPCCPU *cpu, 251 SpaprMachineState *spapr, 252 target_ulong opcode, 253 target_ulong *args) 254 { 255 uint32_t drc_index = args[0]; 256 uint64_t offset = args[1]; 257 uint64_t data = args[2]; 258 uint64_t len = args[3]; 259 SpaprDrc *drc = spapr_drc_by_index(drc_index); 260 NVDIMMDevice *nvdimm; 261 NVDIMMClass *ddc; 262 uint8_t buf[8] = { 0 }; 263 264 if (!drc || !drc->dev || 265 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 266 return H_PARAMETER; 267 } 268 269 if (len != 1 && len != 2 && 270 len != 4 && len != 8) { 271 return H_P4; 272 } 273 274 nvdimm = NVDIMM(drc->dev); 275 if ((offset + len < offset) || 276 (nvdimm->label_size < len + offset)) { 277 return H_P2; 278 } 279 280 switch (len) { 281 case 1: 282 if (data & 0xffffffffffffff00) { 283 return H_P2; 284 } 285 stb_p(buf, data); 286 break; 287 case 2: 288 if (data & 0xffffffffffff0000) { 289 return H_P2; 290 } 291 stw_be_p(buf, data); 292 break; 293 case 4: 294 if (data & 0xffffffff00000000) { 295 return H_P2; 296 } 297 stl_be_p(buf, data); 298 break; 299 case 8: 300 stq_be_p(buf, data); 301 break; 302 default: 303 g_assert_not_reached(); 304 } 305 306 ddc = NVDIMM_GET_CLASS(nvdimm); 307 ddc->write_label_data(nvdimm, buf, len, offset); 308 309 return H_SUCCESS; 310 } 311 312 static target_ulong h_scm_bind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 313 target_ulong opcode, target_ulong *args) 314 { 315 uint32_t drc_index = args[0]; 316 uint64_t starting_idx = args[1]; 317 uint64_t no_of_scm_blocks_to_bind = args[2]; 318 uint64_t target_logical_mem_addr = args[3]; 319 uint64_t continue_token = args[4]; 320 uint64_t size; 321 uint64_t total_no_of_scm_blocks; 322 SpaprDrc *drc = spapr_drc_by_index(drc_index); 323 hwaddr addr; 324 NVDIMMDevice *nvdimm; 325 326 if (!drc || !drc->dev || 327 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 328 return H_PARAMETER; 329 } 330 331 /* 332 * Currently continue token should be zero qemu has already bound 333 * everything and this hcall doesnt return H_BUSY. 334 */ 335 if (continue_token > 0) { 336 return H_P5; 337 } 338 339 /* Currently qemu assigns the address. */ 340 if (target_logical_mem_addr != 0xffffffffffffffff) { 341 return H_OVERLAP; 342 } 343 344 nvdimm = NVDIMM(drc->dev); 345 346 size = object_property_get_uint(OBJECT(nvdimm), 347 PC_DIMM_SIZE_PROP, &error_abort); 348 349 total_no_of_scm_blocks = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 350 351 if (starting_idx > total_no_of_scm_blocks) { 352 return H_P2; 353 } 354 355 if (((starting_idx + no_of_scm_blocks_to_bind) < starting_idx) || 356 ((starting_idx + no_of_scm_blocks_to_bind) > total_no_of_scm_blocks)) { 357 return H_P3; 358 } 359 360 addr = object_property_get_uint(OBJECT(nvdimm), 361 PC_DIMM_ADDR_PROP, &error_abort); 362 363 addr += starting_idx * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 364 365 /* Already bound, Return target logical address in R5 */ 366 args[1] = addr; 367 args[2] = no_of_scm_blocks_to_bind; 368 369 return H_SUCCESS; 370 } 371 372 static target_ulong h_scm_unbind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 373 target_ulong opcode, target_ulong *args) 374 { 375 uint32_t drc_index = args[0]; 376 uint64_t starting_scm_logical_addr = args[1]; 377 uint64_t no_of_scm_blocks_to_unbind = args[2]; 378 uint64_t continue_token = args[3]; 379 uint64_t size_to_unbind; 380 Range blockrange = range_empty; 381 Range nvdimmrange = range_empty; 382 SpaprDrc *drc = spapr_drc_by_index(drc_index); 383 NVDIMMDevice *nvdimm; 384 uint64_t size, addr; 385 386 if (!drc || !drc->dev || 387 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 388 return H_PARAMETER; 389 } 390 391 /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 392 if (continue_token > 0) { 393 return H_P4; 394 } 395 396 /* Check if starting_scm_logical_addr is block aligned */ 397 if (!QEMU_IS_ALIGNED(starting_scm_logical_addr, 398 SPAPR_MINIMUM_SCM_BLOCK_SIZE)) { 399 return H_P2; 400 } 401 402 size_to_unbind = no_of_scm_blocks_to_unbind * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 403 if (no_of_scm_blocks_to_unbind == 0 || no_of_scm_blocks_to_unbind != 404 size_to_unbind / SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 405 return H_P3; 406 } 407 408 nvdimm = NVDIMM(drc->dev); 409 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 410 &error_abort); 411 addr = object_property_get_int(OBJECT(nvdimm), PC_DIMM_ADDR_PROP, 412 &error_abort); 413 414 range_init_nofail(&nvdimmrange, addr, size); 415 range_init_nofail(&blockrange, starting_scm_logical_addr, size_to_unbind); 416 417 if (!range_contains_range(&nvdimmrange, &blockrange)) { 418 return H_P3; 419 } 420 421 args[1] = no_of_scm_blocks_to_unbind; 422 423 /* let unplug take care of actual unbind */ 424 return H_SUCCESS; 425 } 426 427 #define H_UNBIND_SCOPE_ALL 0x1 428 #define H_UNBIND_SCOPE_DRC 0x2 429 430 static target_ulong h_scm_unbind_all(PowerPCCPU *cpu, SpaprMachineState *spapr, 431 target_ulong opcode, target_ulong *args) 432 { 433 uint64_t target_scope = args[0]; 434 uint32_t drc_index = args[1]; 435 uint64_t continue_token = args[2]; 436 NVDIMMDevice *nvdimm; 437 uint64_t size; 438 uint64_t no_of_scm_blocks_unbound = 0; 439 440 /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 441 if (continue_token > 0) { 442 return H_P4; 443 } 444 445 if (target_scope == H_UNBIND_SCOPE_DRC) { 446 SpaprDrc *drc = spapr_drc_by_index(drc_index); 447 448 if (!drc || !drc->dev || 449 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 450 return H_P2; 451 } 452 453 nvdimm = NVDIMM(drc->dev); 454 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 455 &error_abort); 456 457 no_of_scm_blocks_unbound = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 458 } else if (target_scope == H_UNBIND_SCOPE_ALL) { 459 GSList *list, *nvdimms; 460 461 nvdimms = nvdimm_get_device_list(); 462 for (list = nvdimms; list; list = list->next) { 463 nvdimm = list->data; 464 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 465 &error_abort); 466 467 no_of_scm_blocks_unbound += size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 468 } 469 g_slist_free(nvdimms); 470 } else { 471 return H_PARAMETER; 472 } 473 474 args[1] = no_of_scm_blocks_unbound; 475 476 /* let unplug take care of actual unbind */ 477 return H_SUCCESS; 478 } 479 480 static void spapr_scm_register_types(void) 481 { 482 /* qemu/scm specific hcalls */ 483 spapr_register_hypercall(H_SCM_READ_METADATA, h_scm_read_metadata); 484 spapr_register_hypercall(H_SCM_WRITE_METADATA, h_scm_write_metadata); 485 spapr_register_hypercall(H_SCM_BIND_MEM, h_scm_bind_mem); 486 spapr_register_hypercall(H_SCM_UNBIND_MEM, h_scm_unbind_mem); 487 spapr_register_hypercall(H_SCM_UNBIND_ALL, h_scm_unbind_all); 488 } 489 490 type_init(spapr_scm_register_types) 491