1 /* 2 * QEMU PAPR Storage Class Memory Interfaces 3 * 4 * Copyright (c) 2019-2020, IBM Corporation. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 #include "qemu/osdep.h" 25 #include "qapi/error.h" 26 #include "hw/ppc/spapr_drc.h" 27 #include "hw/ppc/spapr_nvdimm.h" 28 #include "hw/mem/nvdimm.h" 29 #include "qemu/nvdimm-utils.h" 30 #include "qemu/option.h" 31 #include "hw/ppc/fdt.h" 32 #include "qemu/range.h" 33 #include "sysemu/sysemu.h" 34 #include "hw/ppc/spapr_numa.h" 35 36 void spapr_nvdimm_validate(HotplugHandler *hotplug_dev, NVDIMMDevice *nvdimm, 37 uint64_t size, Error **errp) 38 { 39 const MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev); 40 const MachineState *ms = MACHINE(hotplug_dev); 41 const char *nvdimm_opt = qemu_opt_get(qemu_get_machine_opts(), "nvdimm"); 42 g_autofree char *uuidstr = NULL; 43 QemuUUID uuid; 44 int ret; 45 46 if (!mc->nvdimm_supported) { 47 error_setg(errp, "NVDIMM hotplug not supported for this machine"); 48 return; 49 } 50 51 /* 52 * NVDIMM support went live in 5.1 without considering that, in 53 * other archs, the user needs to enable NVDIMM support with the 54 * 'nvdimm' machine option and the default behavior is NVDIMM 55 * support disabled. It is too late to roll back to the standard 56 * behavior without breaking 5.1 guests. What we can do is to 57 * ensure that, if the user sets nvdimm=off, we error out 58 * regardless of being 5.1 or newer. 59 */ 60 if (!ms->nvdimms_state->is_enabled && nvdimm_opt) { 61 error_setg(errp, "nvdimm device found but 'nvdimm=off' was set"); 62 return; 63 } 64 65 if (object_property_get_int(OBJECT(nvdimm), NVDIMM_LABEL_SIZE_PROP, 66 &error_abort) == 0) { 67 error_setg(errp, "PAPR requires NVDIMM devices to have label-size set"); 68 return; 69 } 70 71 if (size % SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 72 error_setg(errp, "PAPR requires NVDIMM memory size (excluding label)" 73 " to be a multiple of %" PRIu64 "MB", 74 SPAPR_MINIMUM_SCM_BLOCK_SIZE / MiB); 75 return; 76 } 77 78 uuidstr = object_property_get_str(OBJECT(nvdimm), NVDIMM_UUID_PROP, 79 &error_abort); 80 ret = qemu_uuid_parse(uuidstr, &uuid); 81 g_assert(!ret); 82 83 if (qemu_uuid_is_null(&uuid)) { 84 error_setg(errp, "NVDIMM device requires the uuid to be set"); 85 return; 86 } 87 } 88 89 90 void spapr_add_nvdimm(DeviceState *dev, uint64_t slot, Error **errp) 91 { 92 SpaprDrc *drc; 93 bool hotplugged = spapr_drc_hotplugged(dev); 94 Error *local_err = NULL; 95 96 drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 97 g_assert(drc); 98 99 spapr_drc_attach(drc, dev, &local_err); 100 if (local_err) { 101 error_propagate(errp, local_err); 102 return; 103 } 104 105 if (hotplugged) { 106 spapr_hotplug_req_add_by_index(drc); 107 } 108 } 109 110 void spapr_create_nvdimm_dr_connectors(SpaprMachineState *spapr) 111 { 112 MachineState *machine = MACHINE(spapr); 113 int i; 114 115 for (i = 0; i < machine->ram_slots; i++) { 116 spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_PMEM, i); 117 } 118 } 119 120 121 static int spapr_dt_nvdimm(SpaprMachineState *spapr, void *fdt, 122 int parent_offset, NVDIMMDevice *nvdimm) 123 { 124 int child_offset; 125 char *buf; 126 SpaprDrc *drc; 127 uint32_t drc_idx; 128 uint32_t node = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_NODE_PROP, 129 &error_abort); 130 uint64_t slot = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_SLOT_PROP, 131 &error_abort); 132 uint64_t lsize = nvdimm->label_size; 133 uint64_t size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 134 NULL); 135 136 drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 137 g_assert(drc); 138 139 drc_idx = spapr_drc_index(drc); 140 141 buf = g_strdup_printf("ibm,pmemory@%x", drc_idx); 142 child_offset = fdt_add_subnode(fdt, parent_offset, buf); 143 g_free(buf); 144 145 _FDT(child_offset); 146 147 _FDT((fdt_setprop_cell(fdt, child_offset, "reg", drc_idx))); 148 _FDT((fdt_setprop_string(fdt, child_offset, "compatible", "ibm,pmemory"))); 149 _FDT((fdt_setprop_string(fdt, child_offset, "device_type", "ibm,pmemory"))); 150 151 spapr_numa_write_associativity_dt(spapr, fdt, child_offset, node); 152 153 buf = qemu_uuid_unparse_strdup(&nvdimm->uuid); 154 _FDT((fdt_setprop_string(fdt, child_offset, "ibm,unit-guid", buf))); 155 g_free(buf); 156 157 _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,my-drc-index", drc_idx))); 158 159 _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,block-size", 160 SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 161 _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,number-of-blocks", 162 size / SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 163 _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,metadata-size", lsize))); 164 165 _FDT((fdt_setprop_string(fdt, child_offset, "ibm,pmem-application", 166 "operating-system"))); 167 _FDT(fdt_setprop(fdt, child_offset, "ibm,cache-flush-required", NULL, 0)); 168 169 return child_offset; 170 } 171 172 int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, 173 void *fdt, int *fdt_start_offset, Error **errp) 174 { 175 NVDIMMDevice *nvdimm = NVDIMM(drc->dev); 176 177 *fdt_start_offset = spapr_dt_nvdimm(spapr, fdt, 0, nvdimm); 178 179 return 0; 180 } 181 182 void spapr_dt_persistent_memory(SpaprMachineState *spapr, void *fdt) 183 { 184 int offset = fdt_subnode_offset(fdt, 0, "persistent-memory"); 185 GSList *iter, *nvdimms = nvdimm_get_device_list(); 186 187 if (offset < 0) { 188 offset = fdt_add_subnode(fdt, 0, "persistent-memory"); 189 _FDT(offset); 190 _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0x1))); 191 _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0x0))); 192 _FDT((fdt_setprop_string(fdt, offset, "device_type", 193 "ibm,persistent-memory"))); 194 } 195 196 /* Create DT entries for cold plugged NVDIMM devices */ 197 for (iter = nvdimms; iter; iter = iter->next) { 198 NVDIMMDevice *nvdimm = iter->data; 199 200 spapr_dt_nvdimm(spapr, fdt, offset, nvdimm); 201 } 202 g_slist_free(nvdimms); 203 204 return; 205 } 206 207 static target_ulong h_scm_read_metadata(PowerPCCPU *cpu, 208 SpaprMachineState *spapr, 209 target_ulong opcode, 210 target_ulong *args) 211 { 212 uint32_t drc_index = args[0]; 213 uint64_t offset = args[1]; 214 uint64_t len = args[2]; 215 SpaprDrc *drc = spapr_drc_by_index(drc_index); 216 NVDIMMDevice *nvdimm; 217 NVDIMMClass *ddc; 218 uint64_t data = 0; 219 uint8_t buf[8] = { 0 }; 220 221 if (!drc || !drc->dev || 222 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 223 return H_PARAMETER; 224 } 225 226 if (len != 1 && len != 2 && 227 len != 4 && len != 8) { 228 return H_P3; 229 } 230 231 nvdimm = NVDIMM(drc->dev); 232 if ((offset + len < offset) || 233 (nvdimm->label_size < len + offset)) { 234 return H_P2; 235 } 236 237 ddc = NVDIMM_GET_CLASS(nvdimm); 238 ddc->read_label_data(nvdimm, buf, len, offset); 239 240 switch (len) { 241 case 1: 242 data = ldub_p(buf); 243 break; 244 case 2: 245 data = lduw_be_p(buf); 246 break; 247 case 4: 248 data = ldl_be_p(buf); 249 break; 250 case 8: 251 data = ldq_be_p(buf); 252 break; 253 default: 254 g_assert_not_reached(); 255 } 256 257 args[0] = data; 258 259 return H_SUCCESS; 260 } 261 262 static target_ulong h_scm_write_metadata(PowerPCCPU *cpu, 263 SpaprMachineState *spapr, 264 target_ulong opcode, 265 target_ulong *args) 266 { 267 uint32_t drc_index = args[0]; 268 uint64_t offset = args[1]; 269 uint64_t data = args[2]; 270 uint64_t len = args[3]; 271 SpaprDrc *drc = spapr_drc_by_index(drc_index); 272 NVDIMMDevice *nvdimm; 273 NVDIMMClass *ddc; 274 uint8_t buf[8] = { 0 }; 275 276 if (!drc || !drc->dev || 277 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 278 return H_PARAMETER; 279 } 280 281 if (len != 1 && len != 2 && 282 len != 4 && len != 8) { 283 return H_P4; 284 } 285 286 nvdimm = NVDIMM(drc->dev); 287 if ((offset + len < offset) || 288 (nvdimm->label_size < len + offset)) { 289 return H_P2; 290 } 291 292 switch (len) { 293 case 1: 294 if (data & 0xffffffffffffff00) { 295 return H_P2; 296 } 297 stb_p(buf, data); 298 break; 299 case 2: 300 if (data & 0xffffffffffff0000) { 301 return H_P2; 302 } 303 stw_be_p(buf, data); 304 break; 305 case 4: 306 if (data & 0xffffffff00000000) { 307 return H_P2; 308 } 309 stl_be_p(buf, data); 310 break; 311 case 8: 312 stq_be_p(buf, data); 313 break; 314 default: 315 g_assert_not_reached(); 316 } 317 318 ddc = NVDIMM_GET_CLASS(nvdimm); 319 ddc->write_label_data(nvdimm, buf, len, offset); 320 321 return H_SUCCESS; 322 } 323 324 static target_ulong h_scm_bind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 325 target_ulong opcode, target_ulong *args) 326 { 327 uint32_t drc_index = args[0]; 328 uint64_t starting_idx = args[1]; 329 uint64_t no_of_scm_blocks_to_bind = args[2]; 330 uint64_t target_logical_mem_addr = args[3]; 331 uint64_t continue_token = args[4]; 332 uint64_t size; 333 uint64_t total_no_of_scm_blocks; 334 SpaprDrc *drc = spapr_drc_by_index(drc_index); 335 hwaddr addr; 336 NVDIMMDevice *nvdimm; 337 338 if (!drc || !drc->dev || 339 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 340 return H_PARAMETER; 341 } 342 343 /* 344 * Currently continue token should be zero qemu has already bound 345 * everything and this hcall doesnt return H_BUSY. 346 */ 347 if (continue_token > 0) { 348 return H_P5; 349 } 350 351 /* Currently qemu assigns the address. */ 352 if (target_logical_mem_addr != 0xffffffffffffffff) { 353 return H_OVERLAP; 354 } 355 356 nvdimm = NVDIMM(drc->dev); 357 358 size = object_property_get_uint(OBJECT(nvdimm), 359 PC_DIMM_SIZE_PROP, &error_abort); 360 361 total_no_of_scm_blocks = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 362 363 if (starting_idx > total_no_of_scm_blocks) { 364 return H_P2; 365 } 366 367 if (((starting_idx + no_of_scm_blocks_to_bind) < starting_idx) || 368 ((starting_idx + no_of_scm_blocks_to_bind) > total_no_of_scm_blocks)) { 369 return H_P3; 370 } 371 372 addr = object_property_get_uint(OBJECT(nvdimm), 373 PC_DIMM_ADDR_PROP, &error_abort); 374 375 addr += starting_idx * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 376 377 /* Already bound, Return target logical address in R5 */ 378 args[1] = addr; 379 args[2] = no_of_scm_blocks_to_bind; 380 381 return H_SUCCESS; 382 } 383 384 static target_ulong h_scm_unbind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 385 target_ulong opcode, target_ulong *args) 386 { 387 uint32_t drc_index = args[0]; 388 uint64_t starting_scm_logical_addr = args[1]; 389 uint64_t no_of_scm_blocks_to_unbind = args[2]; 390 uint64_t continue_token = args[3]; 391 uint64_t size_to_unbind; 392 Range blockrange = range_empty; 393 Range nvdimmrange = range_empty; 394 SpaprDrc *drc = spapr_drc_by_index(drc_index); 395 NVDIMMDevice *nvdimm; 396 uint64_t size, addr; 397 398 if (!drc || !drc->dev || 399 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 400 return H_PARAMETER; 401 } 402 403 /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 404 if (continue_token > 0) { 405 return H_P4; 406 } 407 408 /* Check if starting_scm_logical_addr is block aligned */ 409 if (!QEMU_IS_ALIGNED(starting_scm_logical_addr, 410 SPAPR_MINIMUM_SCM_BLOCK_SIZE)) { 411 return H_P2; 412 } 413 414 size_to_unbind = no_of_scm_blocks_to_unbind * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 415 if (no_of_scm_blocks_to_unbind == 0 || no_of_scm_blocks_to_unbind != 416 size_to_unbind / SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 417 return H_P3; 418 } 419 420 nvdimm = NVDIMM(drc->dev); 421 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 422 &error_abort); 423 addr = object_property_get_int(OBJECT(nvdimm), PC_DIMM_ADDR_PROP, 424 &error_abort); 425 426 range_init_nofail(&nvdimmrange, addr, size); 427 range_init_nofail(&blockrange, starting_scm_logical_addr, size_to_unbind); 428 429 if (!range_contains_range(&nvdimmrange, &blockrange)) { 430 return H_P3; 431 } 432 433 args[1] = no_of_scm_blocks_to_unbind; 434 435 /* let unplug take care of actual unbind */ 436 return H_SUCCESS; 437 } 438 439 #define H_UNBIND_SCOPE_ALL 0x1 440 #define H_UNBIND_SCOPE_DRC 0x2 441 442 static target_ulong h_scm_unbind_all(PowerPCCPU *cpu, SpaprMachineState *spapr, 443 target_ulong opcode, target_ulong *args) 444 { 445 uint64_t target_scope = args[0]; 446 uint32_t drc_index = args[1]; 447 uint64_t continue_token = args[2]; 448 NVDIMMDevice *nvdimm; 449 uint64_t size; 450 uint64_t no_of_scm_blocks_unbound = 0; 451 452 /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 453 if (continue_token > 0) { 454 return H_P4; 455 } 456 457 if (target_scope == H_UNBIND_SCOPE_DRC) { 458 SpaprDrc *drc = spapr_drc_by_index(drc_index); 459 460 if (!drc || !drc->dev || 461 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 462 return H_P2; 463 } 464 465 nvdimm = NVDIMM(drc->dev); 466 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 467 &error_abort); 468 469 no_of_scm_blocks_unbound = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 470 } else if (target_scope == H_UNBIND_SCOPE_ALL) { 471 GSList *list, *nvdimms; 472 473 nvdimms = nvdimm_get_device_list(); 474 for (list = nvdimms; list; list = list->next) { 475 nvdimm = list->data; 476 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 477 &error_abort); 478 479 no_of_scm_blocks_unbound += size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 480 } 481 g_slist_free(nvdimms); 482 } else { 483 return H_PARAMETER; 484 } 485 486 args[1] = no_of_scm_blocks_unbound; 487 488 /* let unplug take care of actual unbind */ 489 return H_SUCCESS; 490 } 491 492 static void spapr_scm_register_types(void) 493 { 494 /* qemu/scm specific hcalls */ 495 spapr_register_hypercall(H_SCM_READ_METADATA, h_scm_read_metadata); 496 spapr_register_hypercall(H_SCM_WRITE_METADATA, h_scm_write_metadata); 497 spapr_register_hypercall(H_SCM_BIND_MEM, h_scm_bind_mem); 498 spapr_register_hypercall(H_SCM_UNBIND_MEM, h_scm_unbind_mem); 499 spapr_register_hypercall(H_SCM_UNBIND_ALL, h_scm_unbind_all); 500 } 501 502 type_init(spapr_scm_register_types) 503