1 /* 2 * QEMU PAPR Storage Class Memory Interfaces 3 * 4 * Copyright (c) 2019-2020, IBM Corporation. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 #include "qemu/osdep.h" 25 #include "qapi/error.h" 26 #include "hw/ppc/spapr_drc.h" 27 #include "hw/ppc/spapr_nvdimm.h" 28 #include "hw/mem/nvdimm.h" 29 #include "qemu/nvdimm-utils.h" 30 #include "qemu/option.h" 31 #include "hw/ppc/fdt.h" 32 #include "qemu/range.h" 33 #include "sysemu/sysemu.h" 34 #include "hw/ppc/spapr_numa.h" 35 36 void spapr_nvdimm_validate(HotplugHandler *hotplug_dev, NVDIMMDevice *nvdimm, 37 uint64_t size, Error **errp) 38 { 39 const MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev); 40 const MachineState *ms = MACHINE(hotplug_dev); 41 const char *nvdimm_opt = qemu_opt_get(qemu_get_machine_opts(), "nvdimm"); 42 g_autofree char *uuidstr = NULL; 43 QemuUUID uuid; 44 int ret; 45 46 if (!mc->nvdimm_supported) { 47 error_setg(errp, "NVDIMM hotplug not supported for this machine"); 48 return; 49 } 50 51 /* 52 * NVDIMM support went live in 5.1 without considering that, in 53 * other archs, the user needs to enable NVDIMM support with the 54 * 'nvdimm' machine option and the default behavior is NVDIMM 55 * support disabled. It is too late to roll back to the standard 56 * behavior without breaking 5.1 guests. What we can do is to 57 * ensure that, if the user sets nvdimm=off, we error out 58 * regardless of being 5.1 or newer. 59 */ 60 if (!ms->nvdimms_state->is_enabled && nvdimm_opt) { 61 error_setg(errp, "nvdimm device found but 'nvdimm=off' was set"); 62 return; 63 } 64 65 if (object_property_get_int(OBJECT(nvdimm), NVDIMM_LABEL_SIZE_PROP, 66 &error_abort) == 0) { 67 error_setg(errp, "PAPR requires NVDIMM devices to have label-size set"); 68 return; 69 } 70 71 if (size % SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 72 error_setg(errp, "PAPR requires NVDIMM memory size (excluding label)" 73 " to be a multiple of %" PRIu64 "MB", 74 SPAPR_MINIMUM_SCM_BLOCK_SIZE / MiB); 75 return; 76 } 77 78 uuidstr = object_property_get_str(OBJECT(nvdimm), NVDIMM_UUID_PROP, 79 &error_abort); 80 ret = qemu_uuid_parse(uuidstr, &uuid); 81 g_assert(!ret); 82 83 if (qemu_uuid_is_null(&uuid)) { 84 error_setg(errp, "NVDIMM device requires the uuid to be set"); 85 return; 86 } 87 } 88 89 90 void spapr_add_nvdimm(DeviceState *dev, uint64_t slot, Error **errp) 91 { 92 SpaprDrc *drc; 93 bool hotplugged = spapr_drc_hotplugged(dev); 94 95 drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 96 g_assert(drc); 97 98 if (!spapr_drc_attach(drc, dev, errp)) { 99 return; 100 } 101 102 if (hotplugged) { 103 spapr_hotplug_req_add_by_index(drc); 104 } 105 } 106 107 void spapr_create_nvdimm_dr_connectors(SpaprMachineState *spapr) 108 { 109 MachineState *machine = MACHINE(spapr); 110 int i; 111 112 for (i = 0; i < machine->ram_slots; i++) { 113 spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_PMEM, i); 114 } 115 } 116 117 118 static int spapr_dt_nvdimm(SpaprMachineState *spapr, void *fdt, 119 int parent_offset, NVDIMMDevice *nvdimm) 120 { 121 int child_offset; 122 char *buf; 123 SpaprDrc *drc; 124 uint32_t drc_idx; 125 uint32_t node = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_NODE_PROP, 126 &error_abort); 127 uint64_t slot = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_SLOT_PROP, 128 &error_abort); 129 uint64_t lsize = nvdimm->label_size; 130 uint64_t size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 131 NULL); 132 133 drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 134 g_assert(drc); 135 136 drc_idx = spapr_drc_index(drc); 137 138 buf = g_strdup_printf("ibm,pmemory@%x", drc_idx); 139 child_offset = fdt_add_subnode(fdt, parent_offset, buf); 140 g_free(buf); 141 142 _FDT(child_offset); 143 144 _FDT((fdt_setprop_cell(fdt, child_offset, "reg", drc_idx))); 145 _FDT((fdt_setprop_string(fdt, child_offset, "compatible", "ibm,pmemory"))); 146 _FDT((fdt_setprop_string(fdt, child_offset, "device_type", "ibm,pmemory"))); 147 148 spapr_numa_write_associativity_dt(spapr, fdt, child_offset, node); 149 150 buf = qemu_uuid_unparse_strdup(&nvdimm->uuid); 151 _FDT((fdt_setprop_string(fdt, child_offset, "ibm,unit-guid", buf))); 152 g_free(buf); 153 154 _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,my-drc-index", drc_idx))); 155 156 _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,block-size", 157 SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 158 _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,number-of-blocks", 159 size / SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 160 _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,metadata-size", lsize))); 161 162 _FDT((fdt_setprop_string(fdt, child_offset, "ibm,pmem-application", 163 "operating-system"))); 164 _FDT(fdt_setprop(fdt, child_offset, "ibm,cache-flush-required", NULL, 0)); 165 166 return child_offset; 167 } 168 169 int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, 170 void *fdt, int *fdt_start_offset, Error **errp) 171 { 172 NVDIMMDevice *nvdimm = NVDIMM(drc->dev); 173 174 *fdt_start_offset = spapr_dt_nvdimm(spapr, fdt, 0, nvdimm); 175 176 return 0; 177 } 178 179 void spapr_dt_persistent_memory(SpaprMachineState *spapr, void *fdt) 180 { 181 int offset = fdt_subnode_offset(fdt, 0, "persistent-memory"); 182 GSList *iter, *nvdimms = nvdimm_get_device_list(); 183 184 if (offset < 0) { 185 offset = fdt_add_subnode(fdt, 0, "persistent-memory"); 186 _FDT(offset); 187 _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0x1))); 188 _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0x0))); 189 _FDT((fdt_setprop_string(fdt, offset, "device_type", 190 "ibm,persistent-memory"))); 191 } 192 193 /* Create DT entries for cold plugged NVDIMM devices */ 194 for (iter = nvdimms; iter; iter = iter->next) { 195 NVDIMMDevice *nvdimm = iter->data; 196 197 spapr_dt_nvdimm(spapr, fdt, offset, nvdimm); 198 } 199 g_slist_free(nvdimms); 200 201 return; 202 } 203 204 static target_ulong h_scm_read_metadata(PowerPCCPU *cpu, 205 SpaprMachineState *spapr, 206 target_ulong opcode, 207 target_ulong *args) 208 { 209 uint32_t drc_index = args[0]; 210 uint64_t offset = args[1]; 211 uint64_t len = args[2]; 212 SpaprDrc *drc = spapr_drc_by_index(drc_index); 213 NVDIMMDevice *nvdimm; 214 NVDIMMClass *ddc; 215 uint64_t data = 0; 216 uint8_t buf[8] = { 0 }; 217 218 if (!drc || !drc->dev || 219 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 220 return H_PARAMETER; 221 } 222 223 if (len != 1 && len != 2 && 224 len != 4 && len != 8) { 225 return H_P3; 226 } 227 228 nvdimm = NVDIMM(drc->dev); 229 if ((offset + len < offset) || 230 (nvdimm->label_size < len + offset)) { 231 return H_P2; 232 } 233 234 ddc = NVDIMM_GET_CLASS(nvdimm); 235 ddc->read_label_data(nvdimm, buf, len, offset); 236 237 switch (len) { 238 case 1: 239 data = ldub_p(buf); 240 break; 241 case 2: 242 data = lduw_be_p(buf); 243 break; 244 case 4: 245 data = ldl_be_p(buf); 246 break; 247 case 8: 248 data = ldq_be_p(buf); 249 break; 250 default: 251 g_assert_not_reached(); 252 } 253 254 args[0] = data; 255 256 return H_SUCCESS; 257 } 258 259 static target_ulong h_scm_write_metadata(PowerPCCPU *cpu, 260 SpaprMachineState *spapr, 261 target_ulong opcode, 262 target_ulong *args) 263 { 264 uint32_t drc_index = args[0]; 265 uint64_t offset = args[1]; 266 uint64_t data = args[2]; 267 uint64_t len = args[3]; 268 SpaprDrc *drc = spapr_drc_by_index(drc_index); 269 NVDIMMDevice *nvdimm; 270 NVDIMMClass *ddc; 271 uint8_t buf[8] = { 0 }; 272 273 if (!drc || !drc->dev || 274 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 275 return H_PARAMETER; 276 } 277 278 if (len != 1 && len != 2 && 279 len != 4 && len != 8) { 280 return H_P4; 281 } 282 283 nvdimm = NVDIMM(drc->dev); 284 if ((offset + len < offset) || 285 (nvdimm->label_size < len + offset)) { 286 return H_P2; 287 } 288 289 switch (len) { 290 case 1: 291 if (data & 0xffffffffffffff00) { 292 return H_P2; 293 } 294 stb_p(buf, data); 295 break; 296 case 2: 297 if (data & 0xffffffffffff0000) { 298 return H_P2; 299 } 300 stw_be_p(buf, data); 301 break; 302 case 4: 303 if (data & 0xffffffff00000000) { 304 return H_P2; 305 } 306 stl_be_p(buf, data); 307 break; 308 case 8: 309 stq_be_p(buf, data); 310 break; 311 default: 312 g_assert_not_reached(); 313 } 314 315 ddc = NVDIMM_GET_CLASS(nvdimm); 316 ddc->write_label_data(nvdimm, buf, len, offset); 317 318 return H_SUCCESS; 319 } 320 321 static target_ulong h_scm_bind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 322 target_ulong opcode, target_ulong *args) 323 { 324 uint32_t drc_index = args[0]; 325 uint64_t starting_idx = args[1]; 326 uint64_t no_of_scm_blocks_to_bind = args[2]; 327 uint64_t target_logical_mem_addr = args[3]; 328 uint64_t continue_token = args[4]; 329 uint64_t size; 330 uint64_t total_no_of_scm_blocks; 331 SpaprDrc *drc = spapr_drc_by_index(drc_index); 332 hwaddr addr; 333 NVDIMMDevice *nvdimm; 334 335 if (!drc || !drc->dev || 336 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 337 return H_PARAMETER; 338 } 339 340 /* 341 * Currently continue token should be zero qemu has already bound 342 * everything and this hcall doesnt return H_BUSY. 343 */ 344 if (continue_token > 0) { 345 return H_P5; 346 } 347 348 /* Currently qemu assigns the address. */ 349 if (target_logical_mem_addr != 0xffffffffffffffff) { 350 return H_OVERLAP; 351 } 352 353 nvdimm = NVDIMM(drc->dev); 354 355 size = object_property_get_uint(OBJECT(nvdimm), 356 PC_DIMM_SIZE_PROP, &error_abort); 357 358 total_no_of_scm_blocks = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 359 360 if (starting_idx > total_no_of_scm_blocks) { 361 return H_P2; 362 } 363 364 if (((starting_idx + no_of_scm_blocks_to_bind) < starting_idx) || 365 ((starting_idx + no_of_scm_blocks_to_bind) > total_no_of_scm_blocks)) { 366 return H_P3; 367 } 368 369 addr = object_property_get_uint(OBJECT(nvdimm), 370 PC_DIMM_ADDR_PROP, &error_abort); 371 372 addr += starting_idx * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 373 374 /* Already bound, Return target logical address in R5 */ 375 args[1] = addr; 376 args[2] = no_of_scm_blocks_to_bind; 377 378 return H_SUCCESS; 379 } 380 381 static target_ulong h_scm_unbind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 382 target_ulong opcode, target_ulong *args) 383 { 384 uint32_t drc_index = args[0]; 385 uint64_t starting_scm_logical_addr = args[1]; 386 uint64_t no_of_scm_blocks_to_unbind = args[2]; 387 uint64_t continue_token = args[3]; 388 uint64_t size_to_unbind; 389 Range blockrange = range_empty; 390 Range nvdimmrange = range_empty; 391 SpaprDrc *drc = spapr_drc_by_index(drc_index); 392 NVDIMMDevice *nvdimm; 393 uint64_t size, addr; 394 395 if (!drc || !drc->dev || 396 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 397 return H_PARAMETER; 398 } 399 400 /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 401 if (continue_token > 0) { 402 return H_P4; 403 } 404 405 /* Check if starting_scm_logical_addr is block aligned */ 406 if (!QEMU_IS_ALIGNED(starting_scm_logical_addr, 407 SPAPR_MINIMUM_SCM_BLOCK_SIZE)) { 408 return H_P2; 409 } 410 411 size_to_unbind = no_of_scm_blocks_to_unbind * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 412 if (no_of_scm_blocks_to_unbind == 0 || no_of_scm_blocks_to_unbind != 413 size_to_unbind / SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 414 return H_P3; 415 } 416 417 nvdimm = NVDIMM(drc->dev); 418 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 419 &error_abort); 420 addr = object_property_get_int(OBJECT(nvdimm), PC_DIMM_ADDR_PROP, 421 &error_abort); 422 423 range_init_nofail(&nvdimmrange, addr, size); 424 range_init_nofail(&blockrange, starting_scm_logical_addr, size_to_unbind); 425 426 if (!range_contains_range(&nvdimmrange, &blockrange)) { 427 return H_P3; 428 } 429 430 args[1] = no_of_scm_blocks_to_unbind; 431 432 /* let unplug take care of actual unbind */ 433 return H_SUCCESS; 434 } 435 436 #define H_UNBIND_SCOPE_ALL 0x1 437 #define H_UNBIND_SCOPE_DRC 0x2 438 439 static target_ulong h_scm_unbind_all(PowerPCCPU *cpu, SpaprMachineState *spapr, 440 target_ulong opcode, target_ulong *args) 441 { 442 uint64_t target_scope = args[0]; 443 uint32_t drc_index = args[1]; 444 uint64_t continue_token = args[2]; 445 NVDIMMDevice *nvdimm; 446 uint64_t size; 447 uint64_t no_of_scm_blocks_unbound = 0; 448 449 /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 450 if (continue_token > 0) { 451 return H_P4; 452 } 453 454 if (target_scope == H_UNBIND_SCOPE_DRC) { 455 SpaprDrc *drc = spapr_drc_by_index(drc_index); 456 457 if (!drc || !drc->dev || 458 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 459 return H_P2; 460 } 461 462 nvdimm = NVDIMM(drc->dev); 463 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 464 &error_abort); 465 466 no_of_scm_blocks_unbound = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 467 } else if (target_scope == H_UNBIND_SCOPE_ALL) { 468 GSList *list, *nvdimms; 469 470 nvdimms = nvdimm_get_device_list(); 471 for (list = nvdimms; list; list = list->next) { 472 nvdimm = list->data; 473 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 474 &error_abort); 475 476 no_of_scm_blocks_unbound += size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 477 } 478 g_slist_free(nvdimms); 479 } else { 480 return H_PARAMETER; 481 } 482 483 args[1] = no_of_scm_blocks_unbound; 484 485 /* let unplug take care of actual unbind */ 486 return H_SUCCESS; 487 } 488 489 static void spapr_scm_register_types(void) 490 { 491 /* qemu/scm specific hcalls */ 492 spapr_register_hypercall(H_SCM_READ_METADATA, h_scm_read_metadata); 493 spapr_register_hypercall(H_SCM_WRITE_METADATA, h_scm_write_metadata); 494 spapr_register_hypercall(H_SCM_BIND_MEM, h_scm_bind_mem); 495 spapr_register_hypercall(H_SCM_UNBIND_MEM, h_scm_unbind_mem); 496 spapr_register_hypercall(H_SCM_UNBIND_ALL, h_scm_unbind_all); 497 } 498 499 type_init(spapr_scm_register_types) 500