1 /* 2 * QEMU PAPR Storage Class Memory Interfaces 3 * 4 * Copyright (c) 2019-2020, IBM Corporation. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 #include "qemu/osdep.h" 25 #include "qapi/error.h" 26 #include "hw/ppc/spapr_drc.h" 27 #include "hw/ppc/spapr_nvdimm.h" 28 #include "hw/mem/nvdimm.h" 29 #include "qemu/nvdimm-utils.h" 30 #include "qemu/option.h" 31 #include "hw/ppc/fdt.h" 32 #include "qemu/range.h" 33 #include "sysemu/sysemu.h" 34 #include "hw/ppc/spapr_numa.h" 35 36 bool spapr_nvdimm_validate(HotplugHandler *hotplug_dev, NVDIMMDevice *nvdimm, 37 uint64_t size, Error **errp) 38 { 39 const MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev); 40 const MachineState *ms = MACHINE(hotplug_dev); 41 const char *nvdimm_opt = qemu_opt_get(qemu_get_machine_opts(), "nvdimm"); 42 g_autofree char *uuidstr = NULL; 43 QemuUUID uuid; 44 int ret; 45 46 if (!mc->nvdimm_supported) { 47 error_setg(errp, "NVDIMM hotplug not supported for this machine"); 48 return false; 49 } 50 51 /* 52 * NVDIMM support went live in 5.1 without considering that, in 53 * other archs, the user needs to enable NVDIMM support with the 54 * 'nvdimm' machine option and the default behavior is NVDIMM 55 * support disabled. It is too late to roll back to the standard 56 * behavior without breaking 5.1 guests. What we can do is to 57 * ensure that, if the user sets nvdimm=off, we error out 58 * regardless of being 5.1 or newer. 59 */ 60 if (!ms->nvdimms_state->is_enabled && nvdimm_opt) { 61 error_setg(errp, "nvdimm device found but 'nvdimm=off' was set"); 62 return false; 63 } 64 65 if (object_property_get_int(OBJECT(nvdimm), NVDIMM_LABEL_SIZE_PROP, 66 &error_abort) == 0) { 67 error_setg(errp, "PAPR requires NVDIMM devices to have label-size set"); 68 return false; 69 } 70 71 if (size % SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 72 error_setg(errp, "PAPR requires NVDIMM memory size (excluding label)" 73 " to be a multiple of %" PRIu64 "MB", 74 SPAPR_MINIMUM_SCM_BLOCK_SIZE / MiB); 75 return false; 76 } 77 78 uuidstr = object_property_get_str(OBJECT(nvdimm), NVDIMM_UUID_PROP, 79 &error_abort); 80 ret = qemu_uuid_parse(uuidstr, &uuid); 81 g_assert(!ret); 82 83 if (qemu_uuid_is_null(&uuid)) { 84 error_setg(errp, "NVDIMM device requires the uuid to be set"); 85 return false; 86 } 87 88 return true; 89 } 90 91 92 bool spapr_add_nvdimm(DeviceState *dev, uint64_t slot, Error **errp) 93 { 94 SpaprDrc *drc; 95 bool hotplugged = spapr_drc_hotplugged(dev); 96 97 drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 98 g_assert(drc); 99 100 if (!spapr_drc_attach(drc, dev, errp)) { 101 return false; 102 } 103 104 if (hotplugged) { 105 spapr_hotplug_req_add_by_index(drc); 106 } 107 return true; 108 } 109 110 static int spapr_dt_nvdimm(SpaprMachineState *spapr, void *fdt, 111 int parent_offset, NVDIMMDevice *nvdimm) 112 { 113 int child_offset; 114 char *buf; 115 SpaprDrc *drc; 116 uint32_t drc_idx; 117 uint32_t node = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_NODE_PROP, 118 &error_abort); 119 uint64_t slot = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_SLOT_PROP, 120 &error_abort); 121 uint64_t lsize = nvdimm->label_size; 122 uint64_t size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 123 NULL); 124 125 drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 126 g_assert(drc); 127 128 drc_idx = spapr_drc_index(drc); 129 130 buf = g_strdup_printf("ibm,pmemory@%x", drc_idx); 131 child_offset = fdt_add_subnode(fdt, parent_offset, buf); 132 g_free(buf); 133 134 _FDT(child_offset); 135 136 _FDT((fdt_setprop_cell(fdt, child_offset, "reg", drc_idx))); 137 _FDT((fdt_setprop_string(fdt, child_offset, "compatible", "ibm,pmemory"))); 138 _FDT((fdt_setprop_string(fdt, child_offset, "device_type", "ibm,pmemory"))); 139 140 spapr_numa_write_associativity_dt(spapr, fdt, child_offset, node); 141 142 buf = qemu_uuid_unparse_strdup(&nvdimm->uuid); 143 _FDT((fdt_setprop_string(fdt, child_offset, "ibm,unit-guid", buf))); 144 g_free(buf); 145 146 _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,my-drc-index", drc_idx))); 147 148 _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,block-size", 149 SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 150 _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,number-of-blocks", 151 size / SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 152 _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,metadata-size", lsize))); 153 154 _FDT((fdt_setprop_string(fdt, child_offset, "ibm,pmem-application", 155 "operating-system"))); 156 _FDT(fdt_setprop(fdt, child_offset, "ibm,cache-flush-required", NULL, 0)); 157 158 return child_offset; 159 } 160 161 int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, 162 void *fdt, int *fdt_start_offset, Error **errp) 163 { 164 NVDIMMDevice *nvdimm = NVDIMM(drc->dev); 165 166 *fdt_start_offset = spapr_dt_nvdimm(spapr, fdt, 0, nvdimm); 167 168 return 0; 169 } 170 171 void spapr_dt_persistent_memory(SpaprMachineState *spapr, void *fdt) 172 { 173 int offset = fdt_subnode_offset(fdt, 0, "persistent-memory"); 174 GSList *iter, *nvdimms = nvdimm_get_device_list(); 175 176 if (offset < 0) { 177 offset = fdt_add_subnode(fdt, 0, "persistent-memory"); 178 _FDT(offset); 179 _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0x1))); 180 _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0x0))); 181 _FDT((fdt_setprop_string(fdt, offset, "device_type", 182 "ibm,persistent-memory"))); 183 } 184 185 /* Create DT entries for cold plugged NVDIMM devices */ 186 for (iter = nvdimms; iter; iter = iter->next) { 187 NVDIMMDevice *nvdimm = iter->data; 188 189 spapr_dt_nvdimm(spapr, fdt, offset, nvdimm); 190 } 191 g_slist_free(nvdimms); 192 193 return; 194 } 195 196 static target_ulong h_scm_read_metadata(PowerPCCPU *cpu, 197 SpaprMachineState *spapr, 198 target_ulong opcode, 199 target_ulong *args) 200 { 201 uint32_t drc_index = args[0]; 202 uint64_t offset = args[1]; 203 uint64_t len = args[2]; 204 SpaprDrc *drc = spapr_drc_by_index(drc_index); 205 NVDIMMDevice *nvdimm; 206 NVDIMMClass *ddc; 207 uint64_t data = 0; 208 uint8_t buf[8] = { 0 }; 209 210 if (!drc || !drc->dev || 211 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 212 return H_PARAMETER; 213 } 214 215 if (len != 1 && len != 2 && 216 len != 4 && len != 8) { 217 return H_P3; 218 } 219 220 nvdimm = NVDIMM(drc->dev); 221 if ((offset + len < offset) || 222 (nvdimm->label_size < len + offset)) { 223 return H_P2; 224 } 225 226 ddc = NVDIMM_GET_CLASS(nvdimm); 227 ddc->read_label_data(nvdimm, buf, len, offset); 228 229 switch (len) { 230 case 1: 231 data = ldub_p(buf); 232 break; 233 case 2: 234 data = lduw_be_p(buf); 235 break; 236 case 4: 237 data = ldl_be_p(buf); 238 break; 239 case 8: 240 data = ldq_be_p(buf); 241 break; 242 default: 243 g_assert_not_reached(); 244 } 245 246 args[0] = data; 247 248 return H_SUCCESS; 249 } 250 251 static target_ulong h_scm_write_metadata(PowerPCCPU *cpu, 252 SpaprMachineState *spapr, 253 target_ulong opcode, 254 target_ulong *args) 255 { 256 uint32_t drc_index = args[0]; 257 uint64_t offset = args[1]; 258 uint64_t data = args[2]; 259 uint64_t len = args[3]; 260 SpaprDrc *drc = spapr_drc_by_index(drc_index); 261 NVDIMMDevice *nvdimm; 262 NVDIMMClass *ddc; 263 uint8_t buf[8] = { 0 }; 264 265 if (!drc || !drc->dev || 266 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 267 return H_PARAMETER; 268 } 269 270 if (len != 1 && len != 2 && 271 len != 4 && len != 8) { 272 return H_P4; 273 } 274 275 nvdimm = NVDIMM(drc->dev); 276 if ((offset + len < offset) || 277 (nvdimm->label_size < len + offset)) { 278 return H_P2; 279 } 280 281 switch (len) { 282 case 1: 283 if (data & 0xffffffffffffff00) { 284 return H_P2; 285 } 286 stb_p(buf, data); 287 break; 288 case 2: 289 if (data & 0xffffffffffff0000) { 290 return H_P2; 291 } 292 stw_be_p(buf, data); 293 break; 294 case 4: 295 if (data & 0xffffffff00000000) { 296 return H_P2; 297 } 298 stl_be_p(buf, data); 299 break; 300 case 8: 301 stq_be_p(buf, data); 302 break; 303 default: 304 g_assert_not_reached(); 305 } 306 307 ddc = NVDIMM_GET_CLASS(nvdimm); 308 ddc->write_label_data(nvdimm, buf, len, offset); 309 310 return H_SUCCESS; 311 } 312 313 static target_ulong h_scm_bind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 314 target_ulong opcode, target_ulong *args) 315 { 316 uint32_t drc_index = args[0]; 317 uint64_t starting_idx = args[1]; 318 uint64_t no_of_scm_blocks_to_bind = args[2]; 319 uint64_t target_logical_mem_addr = args[3]; 320 uint64_t continue_token = args[4]; 321 uint64_t size; 322 uint64_t total_no_of_scm_blocks; 323 SpaprDrc *drc = spapr_drc_by_index(drc_index); 324 hwaddr addr; 325 NVDIMMDevice *nvdimm; 326 327 if (!drc || !drc->dev || 328 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 329 return H_PARAMETER; 330 } 331 332 /* 333 * Currently continue token should be zero qemu has already bound 334 * everything and this hcall doesnt return H_BUSY. 335 */ 336 if (continue_token > 0) { 337 return H_P5; 338 } 339 340 /* Currently qemu assigns the address. */ 341 if (target_logical_mem_addr != 0xffffffffffffffff) { 342 return H_OVERLAP; 343 } 344 345 nvdimm = NVDIMM(drc->dev); 346 347 size = object_property_get_uint(OBJECT(nvdimm), 348 PC_DIMM_SIZE_PROP, &error_abort); 349 350 total_no_of_scm_blocks = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 351 352 if (starting_idx > total_no_of_scm_blocks) { 353 return H_P2; 354 } 355 356 if (((starting_idx + no_of_scm_blocks_to_bind) < starting_idx) || 357 ((starting_idx + no_of_scm_blocks_to_bind) > total_no_of_scm_blocks)) { 358 return H_P3; 359 } 360 361 addr = object_property_get_uint(OBJECT(nvdimm), 362 PC_DIMM_ADDR_PROP, &error_abort); 363 364 addr += starting_idx * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 365 366 /* Already bound, Return target logical address in R5 */ 367 args[1] = addr; 368 args[2] = no_of_scm_blocks_to_bind; 369 370 return H_SUCCESS; 371 } 372 373 static target_ulong h_scm_unbind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 374 target_ulong opcode, target_ulong *args) 375 { 376 uint32_t drc_index = args[0]; 377 uint64_t starting_scm_logical_addr = args[1]; 378 uint64_t no_of_scm_blocks_to_unbind = args[2]; 379 uint64_t continue_token = args[3]; 380 uint64_t size_to_unbind; 381 Range blockrange = range_empty; 382 Range nvdimmrange = range_empty; 383 SpaprDrc *drc = spapr_drc_by_index(drc_index); 384 NVDIMMDevice *nvdimm; 385 uint64_t size, addr; 386 387 if (!drc || !drc->dev || 388 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 389 return H_PARAMETER; 390 } 391 392 /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 393 if (continue_token > 0) { 394 return H_P4; 395 } 396 397 /* Check if starting_scm_logical_addr is block aligned */ 398 if (!QEMU_IS_ALIGNED(starting_scm_logical_addr, 399 SPAPR_MINIMUM_SCM_BLOCK_SIZE)) { 400 return H_P2; 401 } 402 403 size_to_unbind = no_of_scm_blocks_to_unbind * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 404 if (no_of_scm_blocks_to_unbind == 0 || no_of_scm_blocks_to_unbind != 405 size_to_unbind / SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 406 return H_P3; 407 } 408 409 nvdimm = NVDIMM(drc->dev); 410 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 411 &error_abort); 412 addr = object_property_get_int(OBJECT(nvdimm), PC_DIMM_ADDR_PROP, 413 &error_abort); 414 415 range_init_nofail(&nvdimmrange, addr, size); 416 range_init_nofail(&blockrange, starting_scm_logical_addr, size_to_unbind); 417 418 if (!range_contains_range(&nvdimmrange, &blockrange)) { 419 return H_P3; 420 } 421 422 args[1] = no_of_scm_blocks_to_unbind; 423 424 /* let unplug take care of actual unbind */ 425 return H_SUCCESS; 426 } 427 428 #define H_UNBIND_SCOPE_ALL 0x1 429 #define H_UNBIND_SCOPE_DRC 0x2 430 431 static target_ulong h_scm_unbind_all(PowerPCCPU *cpu, SpaprMachineState *spapr, 432 target_ulong opcode, target_ulong *args) 433 { 434 uint64_t target_scope = args[0]; 435 uint32_t drc_index = args[1]; 436 uint64_t continue_token = args[2]; 437 NVDIMMDevice *nvdimm; 438 uint64_t size; 439 uint64_t no_of_scm_blocks_unbound = 0; 440 441 /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 442 if (continue_token > 0) { 443 return H_P4; 444 } 445 446 if (target_scope == H_UNBIND_SCOPE_DRC) { 447 SpaprDrc *drc = spapr_drc_by_index(drc_index); 448 449 if (!drc || !drc->dev || 450 spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 451 return H_P2; 452 } 453 454 nvdimm = NVDIMM(drc->dev); 455 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 456 &error_abort); 457 458 no_of_scm_blocks_unbound = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 459 } else if (target_scope == H_UNBIND_SCOPE_ALL) { 460 GSList *list, *nvdimms; 461 462 nvdimms = nvdimm_get_device_list(); 463 for (list = nvdimms; list; list = list->next) { 464 nvdimm = list->data; 465 size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 466 &error_abort); 467 468 no_of_scm_blocks_unbound += size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 469 } 470 g_slist_free(nvdimms); 471 } else { 472 return H_PARAMETER; 473 } 474 475 args[1] = no_of_scm_blocks_unbound; 476 477 /* let unplug take care of actual unbind */ 478 return H_SUCCESS; 479 } 480 481 static void spapr_scm_register_types(void) 482 { 483 /* qemu/scm specific hcalls */ 484 spapr_register_hypercall(H_SCM_READ_METADATA, h_scm_read_metadata); 485 spapr_register_hypercall(H_SCM_WRITE_METADATA, h_scm_write_metadata); 486 spapr_register_hypercall(H_SCM_BIND_MEM, h_scm_bind_mem); 487 spapr_register_hypercall(H_SCM_UNBIND_MEM, h_scm_unbind_mem); 488 spapr_register_hypercall(H_SCM_UNBIND_ALL, h_scm_unbind_all); 489 } 490 491 type_init(spapr_scm_register_types) 492