1ee3a71e3SShivaprasad G Bhat /* 2ee3a71e3SShivaprasad G Bhat * QEMU PAPR Storage Class Memory Interfaces 3ee3a71e3SShivaprasad G Bhat * 4ee3a71e3SShivaprasad G Bhat * Copyright (c) 2019-2020, IBM Corporation. 5ee3a71e3SShivaprasad G Bhat * 6ee3a71e3SShivaprasad G Bhat * Permission is hereby granted, free of charge, to any person obtaining a copy 7ee3a71e3SShivaprasad G Bhat * of this software and associated documentation files (the "Software"), to deal 8ee3a71e3SShivaprasad G Bhat * in the Software without restriction, including without limitation the rights 9ee3a71e3SShivaprasad G Bhat * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10ee3a71e3SShivaprasad G Bhat * copies of the Software, and to permit persons to whom the Software is 11ee3a71e3SShivaprasad G Bhat * furnished to do so, subject to the following conditions: 12ee3a71e3SShivaprasad G Bhat * 13ee3a71e3SShivaprasad G Bhat * The above copyright notice and this permission notice shall be included in 14ee3a71e3SShivaprasad G Bhat * all copies or substantial portions of the Software. 15ee3a71e3SShivaprasad G Bhat * 16ee3a71e3SShivaprasad G Bhat * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17ee3a71e3SShivaprasad G Bhat * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18ee3a71e3SShivaprasad G Bhat * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19ee3a71e3SShivaprasad G Bhat * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20ee3a71e3SShivaprasad G Bhat * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21ee3a71e3SShivaprasad G Bhat * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22ee3a71e3SShivaprasad G Bhat * THE SOFTWARE. 23ee3a71e3SShivaprasad G Bhat */ 24ee3a71e3SShivaprasad G Bhat #include "qemu/osdep.h" 25ee3a71e3SShivaprasad G Bhat #include "qapi/error.h" 26ee3a71e3SShivaprasad G Bhat #include "hw/ppc/spapr_drc.h" 27ee3a71e3SShivaprasad G Bhat #include "hw/ppc/spapr_nvdimm.h" 28ee3a71e3SShivaprasad G Bhat #include "hw/mem/nvdimm.h" 29ee3a71e3SShivaprasad G Bhat #include "qemu/nvdimm-utils.h" 30ee3a71e3SShivaprasad G Bhat #include "hw/ppc/fdt.h" 31b5fca656SShivaprasad G Bhat #include "qemu/range.h" 32ee3a71e3SShivaprasad G Bhat 33*beb6073fSDaniel Henrique Barboza void spapr_nvdimm_validate(HotplugHandler *hotplug_dev, NVDIMMDevice *nvdimm, 34*beb6073fSDaniel Henrique Barboza uint64_t size, Error **errp) 35ee3a71e3SShivaprasad G Bhat { 36*beb6073fSDaniel Henrique Barboza const MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev); 3790d282d0SDaniel Henrique Barboza g_autofree char *uuidstr = NULL; 38ee3a71e3SShivaprasad G Bhat QemuUUID uuid; 39af7084e7SShivaprasad G Bhat int ret; 40ee3a71e3SShivaprasad G Bhat 41*beb6073fSDaniel Henrique Barboza if (!mc->nvdimm_supported) { 42*beb6073fSDaniel Henrique Barboza error_setg(errp, "NVDIMM hotplug not supported for this machine"); 43*beb6073fSDaniel Henrique Barboza return; 44*beb6073fSDaniel Henrique Barboza } 45*beb6073fSDaniel Henrique Barboza 4670fc9cb0SDaniel Henrique Barboza if (object_property_get_int(OBJECT(nvdimm), NVDIMM_LABEL_SIZE_PROP, 4770fc9cb0SDaniel Henrique Barboza &error_abort) == 0) { 486c0f0cb3SDavid Gibson error_setg(errp, "PAPR requires NVDIMM devices to have label-size set"); 4970fc9cb0SDaniel Henrique Barboza return; 5070fc9cb0SDaniel Henrique Barboza } 5170fc9cb0SDaniel Henrique Barboza 52ee3a71e3SShivaprasad G Bhat if (size % SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 536c0f0cb3SDavid Gibson error_setg(errp, "PAPR requires NVDIMM memory size (excluding label)" 546c0f0cb3SDavid Gibson " to be a multiple of %" PRIu64 "MB", 55ee3a71e3SShivaprasad G Bhat SPAPR_MINIMUM_SCM_BLOCK_SIZE / MiB); 56ee3a71e3SShivaprasad G Bhat return; 57ee3a71e3SShivaprasad G Bhat } 58ee3a71e3SShivaprasad G Bhat 59af7084e7SShivaprasad G Bhat uuidstr = object_property_get_str(OBJECT(nvdimm), NVDIMM_UUID_PROP, 60af7084e7SShivaprasad G Bhat &error_abort); 61af7084e7SShivaprasad G Bhat ret = qemu_uuid_parse(uuidstr, &uuid); 62af7084e7SShivaprasad G Bhat g_assert(!ret); 63ee3a71e3SShivaprasad G Bhat 64ee3a71e3SShivaprasad G Bhat if (qemu_uuid_is_null(&uuid)) { 65ee3a71e3SShivaprasad G Bhat error_setg(errp, "NVDIMM device requires the uuid to be set"); 66ee3a71e3SShivaprasad G Bhat return; 67ee3a71e3SShivaprasad G Bhat } 68ee3a71e3SShivaprasad G Bhat } 69ee3a71e3SShivaprasad G Bhat 70ee3a71e3SShivaprasad G Bhat 71ee3a71e3SShivaprasad G Bhat void spapr_add_nvdimm(DeviceState *dev, uint64_t slot, Error **errp) 72ee3a71e3SShivaprasad G Bhat { 73ee3a71e3SShivaprasad G Bhat SpaprDrc *drc; 74ee3a71e3SShivaprasad G Bhat bool hotplugged = spapr_drc_hotplugged(dev); 75ee3a71e3SShivaprasad G Bhat Error *local_err = NULL; 76ee3a71e3SShivaprasad G Bhat 77ee3a71e3SShivaprasad G Bhat drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 78ee3a71e3SShivaprasad G Bhat g_assert(drc); 79ee3a71e3SShivaprasad G Bhat 80ee3a71e3SShivaprasad G Bhat spapr_drc_attach(drc, dev, &local_err); 81ee3a71e3SShivaprasad G Bhat if (local_err) { 82ee3a71e3SShivaprasad G Bhat error_propagate(errp, local_err); 83ee3a71e3SShivaprasad G Bhat return; 84ee3a71e3SShivaprasad G Bhat } 85ee3a71e3SShivaprasad G Bhat 86ee3a71e3SShivaprasad G Bhat if (hotplugged) { 87ee3a71e3SShivaprasad G Bhat spapr_hotplug_req_add_by_index(drc); 88ee3a71e3SShivaprasad G Bhat } 89ee3a71e3SShivaprasad G Bhat } 90ee3a71e3SShivaprasad G Bhat 91ee3a71e3SShivaprasad G Bhat int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, 92ee3a71e3SShivaprasad G Bhat void *fdt, int *fdt_start_offset, Error **errp) 93ee3a71e3SShivaprasad G Bhat { 94ee3a71e3SShivaprasad G Bhat NVDIMMDevice *nvdimm = NVDIMM(drc->dev); 95ee3a71e3SShivaprasad G Bhat 96ee3a71e3SShivaprasad G Bhat *fdt_start_offset = spapr_dt_nvdimm(fdt, 0, nvdimm); 97ee3a71e3SShivaprasad G Bhat 98ee3a71e3SShivaprasad G Bhat return 0; 99ee3a71e3SShivaprasad G Bhat } 100ee3a71e3SShivaprasad G Bhat 101ee3a71e3SShivaprasad G Bhat void spapr_create_nvdimm_dr_connectors(SpaprMachineState *spapr) 102ee3a71e3SShivaprasad G Bhat { 103ee3a71e3SShivaprasad G Bhat MachineState *machine = MACHINE(spapr); 104ee3a71e3SShivaprasad G Bhat int i; 105ee3a71e3SShivaprasad G Bhat 106ee3a71e3SShivaprasad G Bhat for (i = 0; i < machine->ram_slots; i++) { 107ee3a71e3SShivaprasad G Bhat spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_PMEM, i); 108ee3a71e3SShivaprasad G Bhat } 109ee3a71e3SShivaprasad G Bhat } 110ee3a71e3SShivaprasad G Bhat 111ee3a71e3SShivaprasad G Bhat 112ee3a71e3SShivaprasad G Bhat int spapr_dt_nvdimm(void *fdt, int parent_offset, 113ee3a71e3SShivaprasad G Bhat NVDIMMDevice *nvdimm) 114ee3a71e3SShivaprasad G Bhat { 115ee3a71e3SShivaprasad G Bhat int child_offset; 116ee3a71e3SShivaprasad G Bhat char *buf; 117ee3a71e3SShivaprasad G Bhat SpaprDrc *drc; 118ee3a71e3SShivaprasad G Bhat uint32_t drc_idx; 119ee3a71e3SShivaprasad G Bhat uint32_t node = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_NODE_PROP, 120ee3a71e3SShivaprasad G Bhat &error_abort); 121ee3a71e3SShivaprasad G Bhat uint64_t slot = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_SLOT_PROP, 122ee3a71e3SShivaprasad G Bhat &error_abort); 123ee3a71e3SShivaprasad G Bhat uint32_t associativity[] = { 124ee3a71e3SShivaprasad G Bhat cpu_to_be32(0x4), /* length */ 125ee3a71e3SShivaprasad G Bhat cpu_to_be32(0x0), cpu_to_be32(0x0), 126ee3a71e3SShivaprasad G Bhat cpu_to_be32(0x0), cpu_to_be32(node) 127ee3a71e3SShivaprasad G Bhat }; 128ee3a71e3SShivaprasad G Bhat uint64_t lsize = nvdimm->label_size; 129ee3a71e3SShivaprasad G Bhat uint64_t size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 130ee3a71e3SShivaprasad G Bhat NULL); 131ee3a71e3SShivaprasad G Bhat 132ee3a71e3SShivaprasad G Bhat drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot); 133ee3a71e3SShivaprasad G Bhat g_assert(drc); 134ee3a71e3SShivaprasad G Bhat 135ee3a71e3SShivaprasad G Bhat drc_idx = spapr_drc_index(drc); 136ee3a71e3SShivaprasad G Bhat 137ee3a71e3SShivaprasad G Bhat buf = g_strdup_printf("ibm,pmemory@%x", drc_idx); 138ee3a71e3SShivaprasad G Bhat child_offset = fdt_add_subnode(fdt, parent_offset, buf); 139ee3a71e3SShivaprasad G Bhat g_free(buf); 140ee3a71e3SShivaprasad G Bhat 141ee3a71e3SShivaprasad G Bhat _FDT(child_offset); 142ee3a71e3SShivaprasad G Bhat 143ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_cell(fdt, child_offset, "reg", drc_idx))); 144ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_string(fdt, child_offset, "compatible", "ibm,pmemory"))); 145ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_string(fdt, child_offset, "device_type", "ibm,pmemory"))); 146ee3a71e3SShivaprasad G Bhat 147ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop(fdt, child_offset, "ibm,associativity", associativity, 148ee3a71e3SShivaprasad G Bhat sizeof(associativity)))); 149ee3a71e3SShivaprasad G Bhat 150ee3a71e3SShivaprasad G Bhat buf = qemu_uuid_unparse_strdup(&nvdimm->uuid); 151ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_string(fdt, child_offset, "ibm,unit-guid", buf))); 152ee3a71e3SShivaprasad G Bhat g_free(buf); 153ee3a71e3SShivaprasad G Bhat 154ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,my-drc-index", drc_idx))); 155ee3a71e3SShivaprasad G Bhat 156ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,block-size", 157ee3a71e3SShivaprasad G Bhat SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 158ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_u64(fdt, child_offset, "ibm,number-of-blocks", 159ee3a71e3SShivaprasad G Bhat size / SPAPR_MINIMUM_SCM_BLOCK_SIZE))); 160ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_cell(fdt, child_offset, "ibm,metadata-size", lsize))); 161ee3a71e3SShivaprasad G Bhat 162ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_string(fdt, child_offset, "ibm,pmem-application", 163ee3a71e3SShivaprasad G Bhat "operating-system"))); 164ee3a71e3SShivaprasad G Bhat _FDT(fdt_setprop(fdt, child_offset, "ibm,cache-flush-required", NULL, 0)); 165ee3a71e3SShivaprasad G Bhat 166ee3a71e3SShivaprasad G Bhat return child_offset; 167ee3a71e3SShivaprasad G Bhat } 168ee3a71e3SShivaprasad G Bhat 169ee3a71e3SShivaprasad G Bhat void spapr_dt_persistent_memory(void *fdt) 170ee3a71e3SShivaprasad G Bhat { 171ee3a71e3SShivaprasad G Bhat int offset = fdt_subnode_offset(fdt, 0, "persistent-memory"); 172ee3a71e3SShivaprasad G Bhat GSList *iter, *nvdimms = nvdimm_get_device_list(); 173ee3a71e3SShivaprasad G Bhat 174ee3a71e3SShivaprasad G Bhat if (offset < 0) { 175ee3a71e3SShivaprasad G Bhat offset = fdt_add_subnode(fdt, 0, "persistent-memory"); 176ee3a71e3SShivaprasad G Bhat _FDT(offset); 177ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0x1))); 178ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0x0))); 179ee3a71e3SShivaprasad G Bhat _FDT((fdt_setprop_string(fdt, offset, "device_type", 180ee3a71e3SShivaprasad G Bhat "ibm,persistent-memory"))); 181ee3a71e3SShivaprasad G Bhat } 182ee3a71e3SShivaprasad G Bhat 183ee3a71e3SShivaprasad G Bhat /* Create DT entries for cold plugged NVDIMM devices */ 184ee3a71e3SShivaprasad G Bhat for (iter = nvdimms; iter; iter = iter->next) { 185ee3a71e3SShivaprasad G Bhat NVDIMMDevice *nvdimm = iter->data; 186ee3a71e3SShivaprasad G Bhat 187ee3a71e3SShivaprasad G Bhat spapr_dt_nvdimm(fdt, offset, nvdimm); 188ee3a71e3SShivaprasad G Bhat } 189ee3a71e3SShivaprasad G Bhat g_slist_free(nvdimms); 190ee3a71e3SShivaprasad G Bhat 191ee3a71e3SShivaprasad G Bhat return; 192ee3a71e3SShivaprasad G Bhat } 193b5fca656SShivaprasad G Bhat 194b5fca656SShivaprasad G Bhat static target_ulong h_scm_read_metadata(PowerPCCPU *cpu, 195b5fca656SShivaprasad G Bhat SpaprMachineState *spapr, 196b5fca656SShivaprasad G Bhat target_ulong opcode, 197b5fca656SShivaprasad G Bhat target_ulong *args) 198b5fca656SShivaprasad G Bhat { 199b5fca656SShivaprasad G Bhat uint32_t drc_index = args[0]; 200b5fca656SShivaprasad G Bhat uint64_t offset = args[1]; 201b5fca656SShivaprasad G Bhat uint64_t len = args[2]; 202b5fca656SShivaprasad G Bhat SpaprDrc *drc = spapr_drc_by_index(drc_index); 203b5fca656SShivaprasad G Bhat NVDIMMDevice *nvdimm; 204b5fca656SShivaprasad G Bhat NVDIMMClass *ddc; 205b5fca656SShivaprasad G Bhat uint64_t data = 0; 206b5fca656SShivaprasad G Bhat uint8_t buf[8] = { 0 }; 207b5fca656SShivaprasad G Bhat 208b5fca656SShivaprasad G Bhat if (!drc || !drc->dev || 209b5fca656SShivaprasad G Bhat spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 210b5fca656SShivaprasad G Bhat return H_PARAMETER; 211b5fca656SShivaprasad G Bhat } 212b5fca656SShivaprasad G Bhat 213b5fca656SShivaprasad G Bhat if (len != 1 && len != 2 && 214b5fca656SShivaprasad G Bhat len != 4 && len != 8) { 215b5fca656SShivaprasad G Bhat return H_P3; 216b5fca656SShivaprasad G Bhat } 217b5fca656SShivaprasad G Bhat 218b5fca656SShivaprasad G Bhat nvdimm = NVDIMM(drc->dev); 219b5fca656SShivaprasad G Bhat if ((offset + len < offset) || 220b5fca656SShivaprasad G Bhat (nvdimm->label_size < len + offset)) { 221b5fca656SShivaprasad G Bhat return H_P2; 222b5fca656SShivaprasad G Bhat } 223b5fca656SShivaprasad G Bhat 224b5fca656SShivaprasad G Bhat ddc = NVDIMM_GET_CLASS(nvdimm); 225b5fca656SShivaprasad G Bhat ddc->read_label_data(nvdimm, buf, len, offset); 226b5fca656SShivaprasad G Bhat 227b5fca656SShivaprasad G Bhat switch (len) { 228b5fca656SShivaprasad G Bhat case 1: 229b5fca656SShivaprasad G Bhat data = ldub_p(buf); 230b5fca656SShivaprasad G Bhat break; 231b5fca656SShivaprasad G Bhat case 2: 232b5fca656SShivaprasad G Bhat data = lduw_be_p(buf); 233b5fca656SShivaprasad G Bhat break; 234b5fca656SShivaprasad G Bhat case 4: 235b5fca656SShivaprasad G Bhat data = ldl_be_p(buf); 236b5fca656SShivaprasad G Bhat break; 237b5fca656SShivaprasad G Bhat case 8: 238b5fca656SShivaprasad G Bhat data = ldq_be_p(buf); 239b5fca656SShivaprasad G Bhat break; 240b5fca656SShivaprasad G Bhat default: 241b5fca656SShivaprasad G Bhat g_assert_not_reached(); 242b5fca656SShivaprasad G Bhat } 243b5fca656SShivaprasad G Bhat 244b5fca656SShivaprasad G Bhat args[0] = data; 245b5fca656SShivaprasad G Bhat 246b5fca656SShivaprasad G Bhat return H_SUCCESS; 247b5fca656SShivaprasad G Bhat } 248b5fca656SShivaprasad G Bhat 249b5fca656SShivaprasad G Bhat static target_ulong h_scm_write_metadata(PowerPCCPU *cpu, 250b5fca656SShivaprasad G Bhat SpaprMachineState *spapr, 251b5fca656SShivaprasad G Bhat target_ulong opcode, 252b5fca656SShivaprasad G Bhat target_ulong *args) 253b5fca656SShivaprasad G Bhat { 254b5fca656SShivaprasad G Bhat uint32_t drc_index = args[0]; 255b5fca656SShivaprasad G Bhat uint64_t offset = args[1]; 256b5fca656SShivaprasad G Bhat uint64_t data = args[2]; 257b5fca656SShivaprasad G Bhat uint64_t len = args[3]; 258b5fca656SShivaprasad G Bhat SpaprDrc *drc = spapr_drc_by_index(drc_index); 259b5fca656SShivaprasad G Bhat NVDIMMDevice *nvdimm; 260b5fca656SShivaprasad G Bhat NVDIMMClass *ddc; 261b5fca656SShivaprasad G Bhat uint8_t buf[8] = { 0 }; 262b5fca656SShivaprasad G Bhat 263b5fca656SShivaprasad G Bhat if (!drc || !drc->dev || 264b5fca656SShivaprasad G Bhat spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 265b5fca656SShivaprasad G Bhat return H_PARAMETER; 266b5fca656SShivaprasad G Bhat } 267b5fca656SShivaprasad G Bhat 268b5fca656SShivaprasad G Bhat if (len != 1 && len != 2 && 269b5fca656SShivaprasad G Bhat len != 4 && len != 8) { 270b5fca656SShivaprasad G Bhat return H_P4; 271b5fca656SShivaprasad G Bhat } 272b5fca656SShivaprasad G Bhat 273b5fca656SShivaprasad G Bhat nvdimm = NVDIMM(drc->dev); 274b5fca656SShivaprasad G Bhat if ((offset + len < offset) || 275b5fca656SShivaprasad G Bhat (nvdimm->label_size < len + offset)) { 276b5fca656SShivaprasad G Bhat return H_P2; 277b5fca656SShivaprasad G Bhat } 278b5fca656SShivaprasad G Bhat 279b5fca656SShivaprasad G Bhat switch (len) { 280b5fca656SShivaprasad G Bhat case 1: 281b5fca656SShivaprasad G Bhat if (data & 0xffffffffffffff00) { 282b5fca656SShivaprasad G Bhat return H_P2; 283b5fca656SShivaprasad G Bhat } 284b5fca656SShivaprasad G Bhat stb_p(buf, data); 285b5fca656SShivaprasad G Bhat break; 286b5fca656SShivaprasad G Bhat case 2: 287b5fca656SShivaprasad G Bhat if (data & 0xffffffffffff0000) { 288b5fca656SShivaprasad G Bhat return H_P2; 289b5fca656SShivaprasad G Bhat } 290b5fca656SShivaprasad G Bhat stw_be_p(buf, data); 291b5fca656SShivaprasad G Bhat break; 292b5fca656SShivaprasad G Bhat case 4: 293b5fca656SShivaprasad G Bhat if (data & 0xffffffff00000000) { 294b5fca656SShivaprasad G Bhat return H_P2; 295b5fca656SShivaprasad G Bhat } 296b5fca656SShivaprasad G Bhat stl_be_p(buf, data); 297b5fca656SShivaprasad G Bhat break; 298b5fca656SShivaprasad G Bhat case 8: 299b5fca656SShivaprasad G Bhat stq_be_p(buf, data); 300b5fca656SShivaprasad G Bhat break; 301b5fca656SShivaprasad G Bhat default: 302b5fca656SShivaprasad G Bhat g_assert_not_reached(); 303b5fca656SShivaprasad G Bhat } 304b5fca656SShivaprasad G Bhat 305b5fca656SShivaprasad G Bhat ddc = NVDIMM_GET_CLASS(nvdimm); 306b5fca656SShivaprasad G Bhat ddc->write_label_data(nvdimm, buf, len, offset); 307b5fca656SShivaprasad G Bhat 308b5fca656SShivaprasad G Bhat return H_SUCCESS; 309b5fca656SShivaprasad G Bhat } 310b5fca656SShivaprasad G Bhat 311b5fca656SShivaprasad G Bhat static target_ulong h_scm_bind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 312b5fca656SShivaprasad G Bhat target_ulong opcode, target_ulong *args) 313b5fca656SShivaprasad G Bhat { 314b5fca656SShivaprasad G Bhat uint32_t drc_index = args[0]; 315b5fca656SShivaprasad G Bhat uint64_t starting_idx = args[1]; 316b5fca656SShivaprasad G Bhat uint64_t no_of_scm_blocks_to_bind = args[2]; 317b5fca656SShivaprasad G Bhat uint64_t target_logical_mem_addr = args[3]; 318b5fca656SShivaprasad G Bhat uint64_t continue_token = args[4]; 319b5fca656SShivaprasad G Bhat uint64_t size; 320b5fca656SShivaprasad G Bhat uint64_t total_no_of_scm_blocks; 321b5fca656SShivaprasad G Bhat SpaprDrc *drc = spapr_drc_by_index(drc_index); 322b5fca656SShivaprasad G Bhat hwaddr addr; 323b5fca656SShivaprasad G Bhat NVDIMMDevice *nvdimm; 324b5fca656SShivaprasad G Bhat 325b5fca656SShivaprasad G Bhat if (!drc || !drc->dev || 326b5fca656SShivaprasad G Bhat spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 327b5fca656SShivaprasad G Bhat return H_PARAMETER; 328b5fca656SShivaprasad G Bhat } 329b5fca656SShivaprasad G Bhat 330b5fca656SShivaprasad G Bhat /* 331b5fca656SShivaprasad G Bhat * Currently continue token should be zero qemu has already bound 332b5fca656SShivaprasad G Bhat * everything and this hcall doesnt return H_BUSY. 333b5fca656SShivaprasad G Bhat */ 334b5fca656SShivaprasad G Bhat if (continue_token > 0) { 335b5fca656SShivaprasad G Bhat return H_P5; 336b5fca656SShivaprasad G Bhat } 337b5fca656SShivaprasad G Bhat 338b5fca656SShivaprasad G Bhat /* Currently qemu assigns the address. */ 339b5fca656SShivaprasad G Bhat if (target_logical_mem_addr != 0xffffffffffffffff) { 340b5fca656SShivaprasad G Bhat return H_OVERLAP; 341b5fca656SShivaprasad G Bhat } 342b5fca656SShivaprasad G Bhat 343b5fca656SShivaprasad G Bhat nvdimm = NVDIMM(drc->dev); 344b5fca656SShivaprasad G Bhat 345b5fca656SShivaprasad G Bhat size = object_property_get_uint(OBJECT(nvdimm), 346b5fca656SShivaprasad G Bhat PC_DIMM_SIZE_PROP, &error_abort); 347b5fca656SShivaprasad G Bhat 348b5fca656SShivaprasad G Bhat total_no_of_scm_blocks = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 349b5fca656SShivaprasad G Bhat 350b5fca656SShivaprasad G Bhat if (starting_idx > total_no_of_scm_blocks) { 351b5fca656SShivaprasad G Bhat return H_P2; 352b5fca656SShivaprasad G Bhat } 353b5fca656SShivaprasad G Bhat 354b5fca656SShivaprasad G Bhat if (((starting_idx + no_of_scm_blocks_to_bind) < starting_idx) || 355b5fca656SShivaprasad G Bhat ((starting_idx + no_of_scm_blocks_to_bind) > total_no_of_scm_blocks)) { 356b5fca656SShivaprasad G Bhat return H_P3; 357b5fca656SShivaprasad G Bhat } 358b5fca656SShivaprasad G Bhat 359b5fca656SShivaprasad G Bhat addr = object_property_get_uint(OBJECT(nvdimm), 360b5fca656SShivaprasad G Bhat PC_DIMM_ADDR_PROP, &error_abort); 361b5fca656SShivaprasad G Bhat 362b5fca656SShivaprasad G Bhat addr += starting_idx * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 363b5fca656SShivaprasad G Bhat 364b5fca656SShivaprasad G Bhat /* Already bound, Return target logical address in R5 */ 365b5fca656SShivaprasad G Bhat args[1] = addr; 366b5fca656SShivaprasad G Bhat args[2] = no_of_scm_blocks_to_bind; 367b5fca656SShivaprasad G Bhat 368b5fca656SShivaprasad G Bhat return H_SUCCESS; 369b5fca656SShivaprasad G Bhat } 370b5fca656SShivaprasad G Bhat 371b5fca656SShivaprasad G Bhat static target_ulong h_scm_unbind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr, 372b5fca656SShivaprasad G Bhat target_ulong opcode, target_ulong *args) 373b5fca656SShivaprasad G Bhat { 374b5fca656SShivaprasad G Bhat uint32_t drc_index = args[0]; 375b5fca656SShivaprasad G Bhat uint64_t starting_scm_logical_addr = args[1]; 376b5fca656SShivaprasad G Bhat uint64_t no_of_scm_blocks_to_unbind = args[2]; 377b5fca656SShivaprasad G Bhat uint64_t continue_token = args[3]; 378b5fca656SShivaprasad G Bhat uint64_t size_to_unbind; 379b5fca656SShivaprasad G Bhat Range blockrange = range_empty; 380b5fca656SShivaprasad G Bhat Range nvdimmrange = range_empty; 381b5fca656SShivaprasad G Bhat SpaprDrc *drc = spapr_drc_by_index(drc_index); 382b5fca656SShivaprasad G Bhat NVDIMMDevice *nvdimm; 383b5fca656SShivaprasad G Bhat uint64_t size, addr; 384b5fca656SShivaprasad G Bhat 385b5fca656SShivaprasad G Bhat if (!drc || !drc->dev || 386b5fca656SShivaprasad G Bhat spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 387b5fca656SShivaprasad G Bhat return H_PARAMETER; 388b5fca656SShivaprasad G Bhat } 389b5fca656SShivaprasad G Bhat 390b5fca656SShivaprasad G Bhat /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 391b5fca656SShivaprasad G Bhat if (continue_token > 0) { 392b5fca656SShivaprasad G Bhat return H_P4; 393b5fca656SShivaprasad G Bhat } 394b5fca656SShivaprasad G Bhat 395b5fca656SShivaprasad G Bhat /* Check if starting_scm_logical_addr is block aligned */ 396b5fca656SShivaprasad G Bhat if (!QEMU_IS_ALIGNED(starting_scm_logical_addr, 397b5fca656SShivaprasad G Bhat SPAPR_MINIMUM_SCM_BLOCK_SIZE)) { 398b5fca656SShivaprasad G Bhat return H_P2; 399b5fca656SShivaprasad G Bhat } 400b5fca656SShivaprasad G Bhat 401b5fca656SShivaprasad G Bhat size_to_unbind = no_of_scm_blocks_to_unbind * SPAPR_MINIMUM_SCM_BLOCK_SIZE; 402b5fca656SShivaprasad G Bhat if (no_of_scm_blocks_to_unbind == 0 || no_of_scm_blocks_to_unbind != 403b5fca656SShivaprasad G Bhat size_to_unbind / SPAPR_MINIMUM_SCM_BLOCK_SIZE) { 404b5fca656SShivaprasad G Bhat return H_P3; 405b5fca656SShivaprasad G Bhat } 406b5fca656SShivaprasad G Bhat 407b5fca656SShivaprasad G Bhat nvdimm = NVDIMM(drc->dev); 408b5fca656SShivaprasad G Bhat size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 409b5fca656SShivaprasad G Bhat &error_abort); 410b5fca656SShivaprasad G Bhat addr = object_property_get_int(OBJECT(nvdimm), PC_DIMM_ADDR_PROP, 411b5fca656SShivaprasad G Bhat &error_abort); 412b5fca656SShivaprasad G Bhat 413b5fca656SShivaprasad G Bhat range_init_nofail(&nvdimmrange, addr, size); 414b5fca656SShivaprasad G Bhat range_init_nofail(&blockrange, starting_scm_logical_addr, size_to_unbind); 415b5fca656SShivaprasad G Bhat 416b5fca656SShivaprasad G Bhat if (!range_contains_range(&nvdimmrange, &blockrange)) { 417b5fca656SShivaprasad G Bhat return H_P3; 418b5fca656SShivaprasad G Bhat } 419b5fca656SShivaprasad G Bhat 420b5fca656SShivaprasad G Bhat args[1] = no_of_scm_blocks_to_unbind; 421b5fca656SShivaprasad G Bhat 422b5fca656SShivaprasad G Bhat /* let unplug take care of actual unbind */ 423b5fca656SShivaprasad G Bhat return H_SUCCESS; 424b5fca656SShivaprasad G Bhat } 425b5fca656SShivaprasad G Bhat 426b5fca656SShivaprasad G Bhat #define H_UNBIND_SCOPE_ALL 0x1 427b5fca656SShivaprasad G Bhat #define H_UNBIND_SCOPE_DRC 0x2 428b5fca656SShivaprasad G Bhat 429b5fca656SShivaprasad G Bhat static target_ulong h_scm_unbind_all(PowerPCCPU *cpu, SpaprMachineState *spapr, 430b5fca656SShivaprasad G Bhat target_ulong opcode, target_ulong *args) 431b5fca656SShivaprasad G Bhat { 432b5fca656SShivaprasad G Bhat uint64_t target_scope = args[0]; 433b5fca656SShivaprasad G Bhat uint32_t drc_index = args[1]; 434b5fca656SShivaprasad G Bhat uint64_t continue_token = args[2]; 435b5fca656SShivaprasad G Bhat NVDIMMDevice *nvdimm; 436b5fca656SShivaprasad G Bhat uint64_t size; 437b5fca656SShivaprasad G Bhat uint64_t no_of_scm_blocks_unbound = 0; 438b5fca656SShivaprasad G Bhat 439b5fca656SShivaprasad G Bhat /* continue_token should be zero as this hcall doesn't return H_BUSY. */ 440b5fca656SShivaprasad G Bhat if (continue_token > 0) { 441b5fca656SShivaprasad G Bhat return H_P4; 442b5fca656SShivaprasad G Bhat } 443b5fca656SShivaprasad G Bhat 444b5fca656SShivaprasad G Bhat if (target_scope == H_UNBIND_SCOPE_DRC) { 445b5fca656SShivaprasad G Bhat SpaprDrc *drc = spapr_drc_by_index(drc_index); 446b5fca656SShivaprasad G Bhat 447b5fca656SShivaprasad G Bhat if (!drc || !drc->dev || 448b5fca656SShivaprasad G Bhat spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) { 449b5fca656SShivaprasad G Bhat return H_P2; 450b5fca656SShivaprasad G Bhat } 451b5fca656SShivaprasad G Bhat 452b5fca656SShivaprasad G Bhat nvdimm = NVDIMM(drc->dev); 453b5fca656SShivaprasad G Bhat size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 454b5fca656SShivaprasad G Bhat &error_abort); 455b5fca656SShivaprasad G Bhat 456b5fca656SShivaprasad G Bhat no_of_scm_blocks_unbound = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 457b5fca656SShivaprasad G Bhat } else if (target_scope == H_UNBIND_SCOPE_ALL) { 458b5fca656SShivaprasad G Bhat GSList *list, *nvdimms; 459b5fca656SShivaprasad G Bhat 460b5fca656SShivaprasad G Bhat nvdimms = nvdimm_get_device_list(); 461b5fca656SShivaprasad G Bhat for (list = nvdimms; list; list = list->next) { 462b5fca656SShivaprasad G Bhat nvdimm = list->data; 463b5fca656SShivaprasad G Bhat size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP, 464b5fca656SShivaprasad G Bhat &error_abort); 465b5fca656SShivaprasad G Bhat 466b5fca656SShivaprasad G Bhat no_of_scm_blocks_unbound += size / SPAPR_MINIMUM_SCM_BLOCK_SIZE; 467b5fca656SShivaprasad G Bhat } 468b5fca656SShivaprasad G Bhat g_slist_free(nvdimms); 469b5fca656SShivaprasad G Bhat } else { 470b5fca656SShivaprasad G Bhat return H_PARAMETER; 471b5fca656SShivaprasad G Bhat } 472b5fca656SShivaprasad G Bhat 473b5fca656SShivaprasad G Bhat args[1] = no_of_scm_blocks_unbound; 474b5fca656SShivaprasad G Bhat 475b5fca656SShivaprasad G Bhat /* let unplug take care of actual unbind */ 476b5fca656SShivaprasad G Bhat return H_SUCCESS; 477b5fca656SShivaprasad G Bhat } 478b5fca656SShivaprasad G Bhat 479b5fca656SShivaprasad G Bhat static void spapr_scm_register_types(void) 480b5fca656SShivaprasad G Bhat { 481b5fca656SShivaprasad G Bhat /* qemu/scm specific hcalls */ 482b5fca656SShivaprasad G Bhat spapr_register_hypercall(H_SCM_READ_METADATA, h_scm_read_metadata); 483b5fca656SShivaprasad G Bhat spapr_register_hypercall(H_SCM_WRITE_METADATA, h_scm_write_metadata); 484b5fca656SShivaprasad G Bhat spapr_register_hypercall(H_SCM_BIND_MEM, h_scm_bind_mem); 485b5fca656SShivaprasad G Bhat spapr_register_hypercall(H_SCM_UNBIND_MEM, h_scm_unbind_mem); 486b5fca656SShivaprasad G Bhat spapr_register_hypercall(H_SCM_UNBIND_ALL, h_scm_unbind_all); 487b5fca656SShivaprasad G Bhat } 488b5fca656SShivaprasad G Bhat 489b5fca656SShivaprasad G Bhat type_init(spapr_scm_register_types) 490