1 /* 2 * QEMU PowerPC pSeries Logical Partition NUMA associativity handling 3 * 4 * Copyright IBM Corp. 2020 5 * 6 * Authors: 7 * Daniel Henrique Barboza <danielhb413@gmail.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu-common.h" 15 #include "hw/ppc/spapr_numa.h" 16 #include "hw/pci-host/spapr.h" 17 #include "hw/ppc/fdt.h" 18 19 /* Moved from hw/ppc/spapr_pci_nvlink2.c */ 20 #define SPAPR_GPU_NUMA_ID (cpu_to_be32(1)) 21 22 static bool spapr_numa_is_symmetrical(MachineState *ms) 23 { 24 int src, dst; 25 int nb_numa_nodes = ms->numa_state->num_nodes; 26 NodeInfo *numa_info = ms->numa_state->nodes; 27 28 for (src = 0; src < nb_numa_nodes; src++) { 29 for (dst = src; dst < nb_numa_nodes; dst++) { 30 if (numa_info[src].distance[dst] != 31 numa_info[dst].distance[src]) { 32 return false; 33 } 34 } 35 } 36 37 return true; 38 } 39 40 void spapr_numa_associativity_init(SpaprMachineState *spapr, 41 MachineState *machine) 42 { 43 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); 44 int nb_numa_nodes = machine->numa_state->num_nodes; 45 int i, j, max_nodes_with_gpus; 46 47 /* 48 * For all associativity arrays: first position is the size, 49 * position MAX_DISTANCE_REF_POINTS is always the numa_id, 50 * represented by the index 'i'. 51 * 52 * This will break on sparse NUMA setups, when/if QEMU starts 53 * to support it, because there will be no more guarantee that 54 * 'i' will be a valid node_id set by the user. 55 */ 56 for (i = 0; i < nb_numa_nodes; i++) { 57 spapr->numa_assoc_array[i][0] = cpu_to_be32(MAX_DISTANCE_REF_POINTS); 58 spapr->numa_assoc_array[i][MAX_DISTANCE_REF_POINTS] = cpu_to_be32(i); 59 } 60 61 /* 62 * Initialize NVLink GPU associativity arrays. We know that 63 * the first GPU will take the first available NUMA id, and 64 * we'll have a maximum of NVGPU_MAX_NUM GPUs in the machine. 65 * At this point we're not sure if there are GPUs or not, but 66 * let's initialize the associativity arrays and allow NVLink 67 * GPUs to be handled like regular NUMA nodes later on. 68 */ 69 max_nodes_with_gpus = nb_numa_nodes + NVGPU_MAX_NUM; 70 71 for (i = nb_numa_nodes; i < max_nodes_with_gpus; i++) { 72 spapr->numa_assoc_array[i][0] = cpu_to_be32(MAX_DISTANCE_REF_POINTS); 73 74 for (j = 1; j < MAX_DISTANCE_REF_POINTS; j++) { 75 uint32_t gpu_assoc = smc->pre_5_1_assoc_refpoints ? 76 SPAPR_GPU_NUMA_ID : cpu_to_be32(i); 77 spapr->numa_assoc_array[i][j] = gpu_assoc; 78 } 79 80 spapr->numa_assoc_array[i][MAX_DISTANCE_REF_POINTS] = cpu_to_be32(i); 81 } 82 83 /* 84 * Legacy NUMA guests (pseries-5.1 and older, or guests with only 85 * 1 NUMA node) will not benefit from anything we're going to do 86 * after this point. 87 */ 88 if (spapr_machine_using_legacy_numa(spapr)) { 89 return; 90 } 91 92 if (!spapr_numa_is_symmetrical(machine)) { 93 error_report("Asymmetrical NUMA topologies aren't supported " 94 "in the pSeries machine"); 95 exit(EXIT_FAILURE); 96 } 97 98 } 99 100 void spapr_numa_write_associativity_dt(SpaprMachineState *spapr, void *fdt, 101 int offset, int nodeid) 102 { 103 _FDT((fdt_setprop(fdt, offset, "ibm,associativity", 104 spapr->numa_assoc_array[nodeid], 105 sizeof(spapr->numa_assoc_array[nodeid])))); 106 } 107 108 static uint32_t *spapr_numa_get_vcpu_assoc(SpaprMachineState *spapr, 109 PowerPCCPU *cpu) 110 { 111 uint32_t *vcpu_assoc = g_new(uint32_t, VCPU_ASSOC_SIZE); 112 int index = spapr_get_vcpu_id(cpu); 113 114 /* 115 * VCPUs have an extra 'cpu_id' value in ibm,associativity 116 * compared to other resources. Increment the size at index 117 * 0, put cpu_id last, then copy the remaining associativity 118 * domains. 119 */ 120 vcpu_assoc[0] = cpu_to_be32(MAX_DISTANCE_REF_POINTS + 1); 121 vcpu_assoc[VCPU_ASSOC_SIZE - 1] = cpu_to_be32(index); 122 memcpy(vcpu_assoc + 1, spapr->numa_assoc_array[cpu->node_id] + 1, 123 (VCPU_ASSOC_SIZE - 2) * sizeof(uint32_t)); 124 125 return vcpu_assoc; 126 } 127 128 int spapr_numa_fixup_cpu_dt(SpaprMachineState *spapr, void *fdt, 129 int offset, PowerPCCPU *cpu) 130 { 131 g_autofree uint32_t *vcpu_assoc = NULL; 132 133 vcpu_assoc = spapr_numa_get_vcpu_assoc(spapr, cpu); 134 135 /* Advertise NUMA via ibm,associativity */ 136 return fdt_setprop(fdt, offset, "ibm,associativity", vcpu_assoc, 137 VCPU_ASSOC_SIZE * sizeof(uint32_t)); 138 } 139 140 141 int spapr_numa_write_assoc_lookup_arrays(SpaprMachineState *spapr, void *fdt, 142 int offset) 143 { 144 MachineState *machine = MACHINE(spapr); 145 int nb_numa_nodes = machine->numa_state->num_nodes; 146 int nr_nodes = nb_numa_nodes ? nb_numa_nodes : 1; 147 uint32_t *int_buf, *cur_index, buf_len; 148 int ret, i; 149 150 /* ibm,associativity-lookup-arrays */ 151 buf_len = (nr_nodes * MAX_DISTANCE_REF_POINTS + 2) * sizeof(uint32_t); 152 cur_index = int_buf = g_malloc0(buf_len); 153 int_buf[0] = cpu_to_be32(nr_nodes); 154 /* Number of entries per associativity list */ 155 int_buf[1] = cpu_to_be32(MAX_DISTANCE_REF_POINTS); 156 cur_index += 2; 157 for (i = 0; i < nr_nodes; i++) { 158 /* 159 * For the lookup-array we use the ibm,associativity array, 160 * from numa_assoc_array. without the first element (size). 161 */ 162 uint32_t *associativity = spapr->numa_assoc_array[i]; 163 memcpy(cur_index, ++associativity, 164 sizeof(uint32_t) * MAX_DISTANCE_REF_POINTS); 165 cur_index += MAX_DISTANCE_REF_POINTS; 166 } 167 ret = fdt_setprop(fdt, offset, "ibm,associativity-lookup-arrays", int_buf, 168 (cur_index - int_buf) * sizeof(uint32_t)); 169 g_free(int_buf); 170 171 return ret; 172 } 173 174 /* 175 * Helper that writes ibm,associativity-reference-points and 176 * max-associativity-domains in the RTAS pointed by @rtas 177 * in the DT @fdt. 178 */ 179 void spapr_numa_write_rtas_dt(SpaprMachineState *spapr, void *fdt, int rtas) 180 { 181 MachineState *ms = MACHINE(spapr); 182 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); 183 uint32_t refpoints[] = { 184 cpu_to_be32(0x4), 185 cpu_to_be32(0x3), 186 cpu_to_be32(0x2), 187 cpu_to_be32(0x1), 188 }; 189 uint32_t nr_refpoints = ARRAY_SIZE(refpoints); 190 uint32_t maxdomain = ms->numa_state->num_nodes + spapr->gpu_numa_id; 191 uint32_t maxdomains[] = { 192 cpu_to_be32(4), 193 cpu_to_be32(maxdomain), 194 cpu_to_be32(maxdomain), 195 cpu_to_be32(maxdomain), 196 cpu_to_be32(maxdomain) 197 }; 198 199 if (spapr_machine_using_legacy_numa(spapr)) { 200 uint32_t legacy_refpoints[] = { 201 cpu_to_be32(0x4), 202 cpu_to_be32(0x4), 203 cpu_to_be32(0x2), 204 }; 205 uint32_t legacy_maxdomain = spapr->gpu_numa_id > 1 ? 1 : 0; 206 uint32_t legacy_maxdomains[] = { 207 cpu_to_be32(4), 208 cpu_to_be32(legacy_maxdomain), 209 cpu_to_be32(legacy_maxdomain), 210 cpu_to_be32(legacy_maxdomain), 211 cpu_to_be32(spapr->gpu_numa_id), 212 }; 213 214 G_STATIC_ASSERT(sizeof(legacy_refpoints) <= sizeof(refpoints)); 215 G_STATIC_ASSERT(sizeof(legacy_maxdomains) <= sizeof(maxdomains)); 216 217 nr_refpoints = 3; 218 219 memcpy(refpoints, legacy_refpoints, sizeof(legacy_refpoints)); 220 memcpy(maxdomains, legacy_maxdomains, sizeof(legacy_maxdomains)); 221 222 /* pseries-5.0 and older reference-points array is {0x4, 0x4} */ 223 if (smc->pre_5_1_assoc_refpoints) { 224 nr_refpoints = 2; 225 } 226 } 227 228 _FDT(fdt_setprop(fdt, rtas, "ibm,associativity-reference-points", 229 refpoints, nr_refpoints * sizeof(refpoints[0]))); 230 231 _FDT(fdt_setprop(fdt, rtas, "ibm,max-associativity-domains", 232 maxdomains, sizeof(maxdomains))); 233 } 234 235 static target_ulong h_home_node_associativity(PowerPCCPU *cpu, 236 SpaprMachineState *spapr, 237 target_ulong opcode, 238 target_ulong *args) 239 { 240 g_autofree uint32_t *vcpu_assoc = NULL; 241 target_ulong flags = args[0]; 242 target_ulong procno = args[1]; 243 PowerPCCPU *tcpu; 244 int idx, assoc_idx; 245 246 /* only support procno from H_REGISTER_VPA */ 247 if (flags != 0x1) { 248 return H_FUNCTION; 249 } 250 251 tcpu = spapr_find_cpu(procno); 252 if (tcpu == NULL) { 253 return H_P2; 254 } 255 256 /* 257 * Given that we want to be flexible with the sizes and indexes, 258 * we must consider that there is a hard limit of how many 259 * associativities domain we can fit in R4 up to R9, which would be 260 * 12 associativity domains for vcpus. Assert and bail if that's 261 * not the case. 262 */ 263 G_STATIC_ASSERT((VCPU_ASSOC_SIZE - 1) <= 12); 264 265 vcpu_assoc = spapr_numa_get_vcpu_assoc(spapr, tcpu); 266 /* assoc_idx starts at 1 to skip associativity size */ 267 assoc_idx = 1; 268 269 #define ASSOCIATIVITY(a, b) (((uint64_t)(a) << 32) | \ 270 ((uint64_t)(b) & 0xffffffff)) 271 272 for (idx = 0; idx < 6; idx++) { 273 int32_t a, b; 274 275 /* 276 * vcpu_assoc[] will contain the associativity domains for tcpu, 277 * including tcpu->node_id and procno, meaning that we don't 278 * need to use these variables here. 279 * 280 * We'll read 2 values at a time to fill up the ASSOCIATIVITY() 281 * macro. The ternary will fill the remaining registers with -1 282 * after we went through vcpu_assoc[]. 283 */ 284 a = assoc_idx < VCPU_ASSOC_SIZE ? 285 be32_to_cpu(vcpu_assoc[assoc_idx++]) : -1; 286 b = assoc_idx < VCPU_ASSOC_SIZE ? 287 be32_to_cpu(vcpu_assoc[assoc_idx++]) : -1; 288 289 args[idx] = ASSOCIATIVITY(a, b); 290 } 291 #undef ASSOCIATIVITY 292 293 return H_SUCCESS; 294 } 295 296 static void spapr_numa_register_types(void) 297 { 298 /* Virtual Processor Home Node */ 299 spapr_register_hypercall(H_HOME_NODE_ASSOCIATIVITY, 300 h_home_node_associativity); 301 } 302 303 type_init(spapr_numa_register_types) 304