19f64bd8aSPaolo Bonzini #include "sysemu/sysemu.h" 29f64bd8aSPaolo Bonzini #include "cpu.h" 39f64bd8aSPaolo Bonzini #include "sysemu/sysemu.h" 49f64bd8aSPaolo Bonzini #include "helper_regs.h" 59f64bd8aSPaolo Bonzini #include "hw/spapr.h" 6d5aea6f3SDavid Gibson #include "mmu-hash64.h" 79f64bd8aSPaolo Bonzini 89f64bd8aSPaolo Bonzini static target_ulong compute_tlbie_rb(target_ulong v, target_ulong r, 99f64bd8aSPaolo Bonzini target_ulong pte_index) 109f64bd8aSPaolo Bonzini { 119f64bd8aSPaolo Bonzini target_ulong rb, va_low; 129f64bd8aSPaolo Bonzini 139f64bd8aSPaolo Bonzini rb = (v & ~0x7fULL) << 16; /* AVA field */ 149f64bd8aSPaolo Bonzini va_low = pte_index >> 3; 15d5aea6f3SDavid Gibson if (v & HPTE64_V_SECONDARY) { 169f64bd8aSPaolo Bonzini va_low = ~va_low; 179f64bd8aSPaolo Bonzini } 189f64bd8aSPaolo Bonzini /* xor vsid from AVA */ 19d5aea6f3SDavid Gibson if (!(v & HPTE64_V_1TB_SEG)) { 209f64bd8aSPaolo Bonzini va_low ^= v >> 12; 219f64bd8aSPaolo Bonzini } else { 229f64bd8aSPaolo Bonzini va_low ^= v >> 24; 239f64bd8aSPaolo Bonzini } 249f64bd8aSPaolo Bonzini va_low &= 0x7ff; 25d5aea6f3SDavid Gibson if (v & HPTE64_V_LARGE) { 269f64bd8aSPaolo Bonzini rb |= 1; /* L field */ 279f64bd8aSPaolo Bonzini #if 0 /* Disable that P7 specific bit for now */ 289f64bd8aSPaolo Bonzini if (r & 0xff000) { 299f64bd8aSPaolo Bonzini /* non-16MB large page, must be 64k */ 309f64bd8aSPaolo Bonzini /* (masks depend on page size) */ 319f64bd8aSPaolo Bonzini rb |= 0x1000; /* page encoding in LP field */ 329f64bd8aSPaolo Bonzini rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */ 339f64bd8aSPaolo Bonzini rb |= (va_low & 0xfe); /* AVAL field */ 349f64bd8aSPaolo Bonzini } 359f64bd8aSPaolo Bonzini #endif 369f64bd8aSPaolo Bonzini } else { 379f64bd8aSPaolo Bonzini /* 4kB page */ 389f64bd8aSPaolo Bonzini rb |= (va_low & 0x7ff) << 12; /* remaining 11b of AVA */ 399f64bd8aSPaolo Bonzini } 409f64bd8aSPaolo Bonzini rb |= (v >> 54) & 0x300; /* B field */ 419f64bd8aSPaolo Bonzini return rb; 429f64bd8aSPaolo Bonzini } 439f64bd8aSPaolo Bonzini 449f64bd8aSPaolo Bonzini static target_ulong h_enter(PowerPCCPU *cpu, sPAPREnvironment *spapr, 459f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 469f64bd8aSPaolo Bonzini { 479f64bd8aSPaolo Bonzini CPUPPCState *env = &cpu->env; 489f64bd8aSPaolo Bonzini target_ulong flags = args[0]; 499f64bd8aSPaolo Bonzini target_ulong pte_index = args[1]; 509f64bd8aSPaolo Bonzini target_ulong pteh = args[2]; 519f64bd8aSPaolo Bonzini target_ulong ptel = args[3]; 529f64bd8aSPaolo Bonzini target_ulong page_shift = 12; 539f64bd8aSPaolo Bonzini target_ulong raddr; 549f64bd8aSPaolo Bonzini target_ulong i; 55*dffdaf61SDavid Gibson hwaddr hpte; 569f64bd8aSPaolo Bonzini 579f64bd8aSPaolo Bonzini /* only handle 4k and 16M pages for now */ 58d5aea6f3SDavid Gibson if (pteh & HPTE64_V_LARGE) { 599f64bd8aSPaolo Bonzini #if 0 /* We don't support 64k pages yet */ 609f64bd8aSPaolo Bonzini if ((ptel & 0xf000) == 0x1000) { 619f64bd8aSPaolo Bonzini /* 64k page */ 629f64bd8aSPaolo Bonzini } else 639f64bd8aSPaolo Bonzini #endif 649f64bd8aSPaolo Bonzini if ((ptel & 0xff000) == 0) { 659f64bd8aSPaolo Bonzini /* 16M page */ 669f64bd8aSPaolo Bonzini page_shift = 24; 679f64bd8aSPaolo Bonzini /* lowest AVA bit must be 0 for 16M pages */ 689f64bd8aSPaolo Bonzini if (pteh & 0x80) { 699f64bd8aSPaolo Bonzini return H_PARAMETER; 709f64bd8aSPaolo Bonzini } 719f64bd8aSPaolo Bonzini } else { 729f64bd8aSPaolo Bonzini return H_PARAMETER; 739f64bd8aSPaolo Bonzini } 749f64bd8aSPaolo Bonzini } 759f64bd8aSPaolo Bonzini 76d5aea6f3SDavid Gibson raddr = (ptel & HPTE64_R_RPN) & ~((1ULL << page_shift) - 1); 779f64bd8aSPaolo Bonzini 789f64bd8aSPaolo Bonzini if (raddr < spapr->ram_limit) { 799f64bd8aSPaolo Bonzini /* Regular RAM - should have WIMG=0010 */ 80d5aea6f3SDavid Gibson if ((ptel & HPTE64_R_WIMG) != HPTE64_R_M) { 819f64bd8aSPaolo Bonzini return H_PARAMETER; 829f64bd8aSPaolo Bonzini } 839f64bd8aSPaolo Bonzini } else { 849f64bd8aSPaolo Bonzini /* Looks like an IO address */ 859f64bd8aSPaolo Bonzini /* FIXME: What WIMG combinations could be sensible for IO? 869f64bd8aSPaolo Bonzini * For now we allow WIMG=010x, but are there others? */ 879f64bd8aSPaolo Bonzini /* FIXME: Should we check against registered IO addresses? */ 88d5aea6f3SDavid Gibson if ((ptel & (HPTE64_R_W | HPTE64_R_I | HPTE64_R_M)) != HPTE64_R_I) { 899f64bd8aSPaolo Bonzini return H_PARAMETER; 909f64bd8aSPaolo Bonzini } 919f64bd8aSPaolo Bonzini } 929f64bd8aSPaolo Bonzini 939f64bd8aSPaolo Bonzini pteh &= ~0x60ULL; 949f64bd8aSPaolo Bonzini 959f64bd8aSPaolo Bonzini if ((pte_index * HASH_PTE_SIZE_64) & ~env->htab_mask) { 969f64bd8aSPaolo Bonzini return H_PARAMETER; 979f64bd8aSPaolo Bonzini } 989f64bd8aSPaolo Bonzini if (likely((flags & H_EXACT) == 0)) { 999f64bd8aSPaolo Bonzini pte_index &= ~7ULL; 100*dffdaf61SDavid Gibson hpte = pte_index * HASH_PTE_SIZE_64; 1019f64bd8aSPaolo Bonzini for (i = 0; ; ++i) { 1029f64bd8aSPaolo Bonzini if (i == 8) { 1039f64bd8aSPaolo Bonzini return H_PTEG_FULL; 1049f64bd8aSPaolo Bonzini } 105*dffdaf61SDavid Gibson if ((ppc_hash64_load_hpte0(env, hpte) & HPTE64_V_VALID) == 0) { 1069f64bd8aSPaolo Bonzini break; 1079f64bd8aSPaolo Bonzini } 1089f64bd8aSPaolo Bonzini hpte += HASH_PTE_SIZE_64; 1099f64bd8aSPaolo Bonzini } 1109f64bd8aSPaolo Bonzini } else { 1119f64bd8aSPaolo Bonzini i = 0; 112*dffdaf61SDavid Gibson hpte = pte_index * HASH_PTE_SIZE_64; 113*dffdaf61SDavid Gibson if (ppc_hash64_load_hpte0(env, hpte) & HPTE64_V_VALID) { 1149f64bd8aSPaolo Bonzini return H_PTEG_FULL; 1159f64bd8aSPaolo Bonzini } 1169f64bd8aSPaolo Bonzini } 117*dffdaf61SDavid Gibson ppc_hash64_store_hpte1(env, hpte, ptel); 1189f64bd8aSPaolo Bonzini /* eieio(); FIXME: need some sort of barrier for smp? */ 119*dffdaf61SDavid Gibson ppc_hash64_store_hpte0(env, hpte, pteh); 1209f64bd8aSPaolo Bonzini 1219f64bd8aSPaolo Bonzini args[0] = pte_index + i; 1229f64bd8aSPaolo Bonzini return H_SUCCESS; 1239f64bd8aSPaolo Bonzini } 1249f64bd8aSPaolo Bonzini 1259f64bd8aSPaolo Bonzini enum { 1269f64bd8aSPaolo Bonzini REMOVE_SUCCESS = 0, 1279f64bd8aSPaolo Bonzini REMOVE_NOT_FOUND = 1, 1289f64bd8aSPaolo Bonzini REMOVE_PARM = 2, 1299f64bd8aSPaolo Bonzini REMOVE_HW = 3, 1309f64bd8aSPaolo Bonzini }; 1319f64bd8aSPaolo Bonzini 1329f64bd8aSPaolo Bonzini static target_ulong remove_hpte(CPUPPCState *env, target_ulong ptex, 1339f64bd8aSPaolo Bonzini target_ulong avpn, 1349f64bd8aSPaolo Bonzini target_ulong flags, 1359f64bd8aSPaolo Bonzini target_ulong *vp, target_ulong *rp) 1369f64bd8aSPaolo Bonzini { 137*dffdaf61SDavid Gibson hwaddr hpte; 1389f64bd8aSPaolo Bonzini target_ulong v, r, rb; 1399f64bd8aSPaolo Bonzini 1409f64bd8aSPaolo Bonzini if ((ptex * HASH_PTE_SIZE_64) & ~env->htab_mask) { 1419f64bd8aSPaolo Bonzini return REMOVE_PARM; 1429f64bd8aSPaolo Bonzini } 1439f64bd8aSPaolo Bonzini 144*dffdaf61SDavid Gibson hpte = ptex * HASH_PTE_SIZE_64; 1459f64bd8aSPaolo Bonzini 146*dffdaf61SDavid Gibson v = ppc_hash64_load_hpte0(env, hpte); 147*dffdaf61SDavid Gibson r = ppc_hash64_load_hpte1(env, hpte); 1489f64bd8aSPaolo Bonzini 149d5aea6f3SDavid Gibson if ((v & HPTE64_V_VALID) == 0 || 1509f64bd8aSPaolo Bonzini ((flags & H_AVPN) && (v & ~0x7fULL) != avpn) || 1519f64bd8aSPaolo Bonzini ((flags & H_ANDCOND) && (v & avpn) != 0)) { 1529f64bd8aSPaolo Bonzini return REMOVE_NOT_FOUND; 1539f64bd8aSPaolo Bonzini } 1549f64bd8aSPaolo Bonzini *vp = v; 1559f64bd8aSPaolo Bonzini *rp = r; 156*dffdaf61SDavid Gibson ppc_hash64_store_hpte0(env, hpte, 0); 1579f64bd8aSPaolo Bonzini rb = compute_tlbie_rb(v, r, ptex); 1589f64bd8aSPaolo Bonzini ppc_tlb_invalidate_one(env, rb); 1599f64bd8aSPaolo Bonzini return REMOVE_SUCCESS; 1609f64bd8aSPaolo Bonzini } 1619f64bd8aSPaolo Bonzini 1629f64bd8aSPaolo Bonzini static target_ulong h_remove(PowerPCCPU *cpu, sPAPREnvironment *spapr, 1639f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 1649f64bd8aSPaolo Bonzini { 1659f64bd8aSPaolo Bonzini CPUPPCState *env = &cpu->env; 1669f64bd8aSPaolo Bonzini target_ulong flags = args[0]; 1679f64bd8aSPaolo Bonzini target_ulong pte_index = args[1]; 1689f64bd8aSPaolo Bonzini target_ulong avpn = args[2]; 1699f64bd8aSPaolo Bonzini int ret; 1709f64bd8aSPaolo Bonzini 1719f64bd8aSPaolo Bonzini ret = remove_hpte(env, pte_index, avpn, flags, 1729f64bd8aSPaolo Bonzini &args[0], &args[1]); 1739f64bd8aSPaolo Bonzini 1749f64bd8aSPaolo Bonzini switch (ret) { 1759f64bd8aSPaolo Bonzini case REMOVE_SUCCESS: 1769f64bd8aSPaolo Bonzini return H_SUCCESS; 1779f64bd8aSPaolo Bonzini 1789f64bd8aSPaolo Bonzini case REMOVE_NOT_FOUND: 1799f64bd8aSPaolo Bonzini return H_NOT_FOUND; 1809f64bd8aSPaolo Bonzini 1819f64bd8aSPaolo Bonzini case REMOVE_PARM: 1829f64bd8aSPaolo Bonzini return H_PARAMETER; 1839f64bd8aSPaolo Bonzini 1849f64bd8aSPaolo Bonzini case REMOVE_HW: 1859f64bd8aSPaolo Bonzini return H_HARDWARE; 1869f64bd8aSPaolo Bonzini } 1879f64bd8aSPaolo Bonzini 1889f64bd8aSPaolo Bonzini assert(0); 1899f64bd8aSPaolo Bonzini } 1909f64bd8aSPaolo Bonzini 1919f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_TYPE 0xc000000000000000ULL 1929f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_REQUEST 0x4000000000000000ULL 1939f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_RESPONSE 0x8000000000000000ULL 1949f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_END 0xc000000000000000ULL 1959f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_CODE 0x3000000000000000ULL 1969f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_SUCCESS 0x0000000000000000ULL 1979f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_NOT_FOUND 0x1000000000000000ULL 1989f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_PARM 0x2000000000000000ULL 1999f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_HW 0x3000000000000000ULL 2009f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_RC 0x0c00000000000000ULL 2019f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_FLAGS 0x0300000000000000ULL 2029f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_ABSOLUTE 0x0000000000000000ULL 2039f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_ANDCOND 0x0100000000000000ULL 2049f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_AVPN 0x0200000000000000ULL 2059f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_PTEX 0x00ffffffffffffffULL 2069f64bd8aSPaolo Bonzini 2079f64bd8aSPaolo Bonzini #define H_BULK_REMOVE_MAX_BATCH 4 2089f64bd8aSPaolo Bonzini 2099f64bd8aSPaolo Bonzini static target_ulong h_bulk_remove(PowerPCCPU *cpu, sPAPREnvironment *spapr, 2109f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 2119f64bd8aSPaolo Bonzini { 2129f64bd8aSPaolo Bonzini CPUPPCState *env = &cpu->env; 2139f64bd8aSPaolo Bonzini int i; 2149f64bd8aSPaolo Bonzini 2159f64bd8aSPaolo Bonzini for (i = 0; i < H_BULK_REMOVE_MAX_BATCH; i++) { 2169f64bd8aSPaolo Bonzini target_ulong *tsh = &args[i*2]; 2179f64bd8aSPaolo Bonzini target_ulong tsl = args[i*2 + 1]; 2189f64bd8aSPaolo Bonzini target_ulong v, r, ret; 2199f64bd8aSPaolo Bonzini 2209f64bd8aSPaolo Bonzini if ((*tsh & H_BULK_REMOVE_TYPE) == H_BULK_REMOVE_END) { 2219f64bd8aSPaolo Bonzini break; 2229f64bd8aSPaolo Bonzini } else if ((*tsh & H_BULK_REMOVE_TYPE) != H_BULK_REMOVE_REQUEST) { 2239f64bd8aSPaolo Bonzini return H_PARAMETER; 2249f64bd8aSPaolo Bonzini } 2259f64bd8aSPaolo Bonzini 2269f64bd8aSPaolo Bonzini *tsh &= H_BULK_REMOVE_PTEX | H_BULK_REMOVE_FLAGS; 2279f64bd8aSPaolo Bonzini *tsh |= H_BULK_REMOVE_RESPONSE; 2289f64bd8aSPaolo Bonzini 2299f64bd8aSPaolo Bonzini if ((*tsh & H_BULK_REMOVE_ANDCOND) && (*tsh & H_BULK_REMOVE_AVPN)) { 2309f64bd8aSPaolo Bonzini *tsh |= H_BULK_REMOVE_PARM; 2319f64bd8aSPaolo Bonzini return H_PARAMETER; 2329f64bd8aSPaolo Bonzini } 2339f64bd8aSPaolo Bonzini 2349f64bd8aSPaolo Bonzini ret = remove_hpte(env, *tsh & H_BULK_REMOVE_PTEX, tsl, 2359f64bd8aSPaolo Bonzini (*tsh & H_BULK_REMOVE_FLAGS) >> 26, 2369f64bd8aSPaolo Bonzini &v, &r); 2379f64bd8aSPaolo Bonzini 2389f64bd8aSPaolo Bonzini *tsh |= ret << 60; 2399f64bd8aSPaolo Bonzini 2409f64bd8aSPaolo Bonzini switch (ret) { 2419f64bd8aSPaolo Bonzini case REMOVE_SUCCESS: 242d5aea6f3SDavid Gibson *tsh |= (r & (HPTE64_R_C | HPTE64_R_R)) << 43; 2439f64bd8aSPaolo Bonzini break; 2449f64bd8aSPaolo Bonzini 2459f64bd8aSPaolo Bonzini case REMOVE_PARM: 2469f64bd8aSPaolo Bonzini return H_PARAMETER; 2479f64bd8aSPaolo Bonzini 2489f64bd8aSPaolo Bonzini case REMOVE_HW: 2499f64bd8aSPaolo Bonzini return H_HARDWARE; 2509f64bd8aSPaolo Bonzini } 2519f64bd8aSPaolo Bonzini } 2529f64bd8aSPaolo Bonzini 2539f64bd8aSPaolo Bonzini return H_SUCCESS; 2549f64bd8aSPaolo Bonzini } 2559f64bd8aSPaolo Bonzini 2569f64bd8aSPaolo Bonzini static target_ulong h_protect(PowerPCCPU *cpu, sPAPREnvironment *spapr, 2579f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 2589f64bd8aSPaolo Bonzini { 2599f64bd8aSPaolo Bonzini CPUPPCState *env = &cpu->env; 2609f64bd8aSPaolo Bonzini target_ulong flags = args[0]; 2619f64bd8aSPaolo Bonzini target_ulong pte_index = args[1]; 2629f64bd8aSPaolo Bonzini target_ulong avpn = args[2]; 263*dffdaf61SDavid Gibson hwaddr hpte; 2649f64bd8aSPaolo Bonzini target_ulong v, r, rb; 2659f64bd8aSPaolo Bonzini 2669f64bd8aSPaolo Bonzini if ((pte_index * HASH_PTE_SIZE_64) & ~env->htab_mask) { 2679f64bd8aSPaolo Bonzini return H_PARAMETER; 2689f64bd8aSPaolo Bonzini } 2699f64bd8aSPaolo Bonzini 270*dffdaf61SDavid Gibson hpte = pte_index * HASH_PTE_SIZE_64; 2719f64bd8aSPaolo Bonzini 272*dffdaf61SDavid Gibson v = ppc_hash64_load_hpte0(env, hpte); 273*dffdaf61SDavid Gibson r = ppc_hash64_load_hpte1(env, hpte); 2749f64bd8aSPaolo Bonzini 275d5aea6f3SDavid Gibson if ((v & HPTE64_V_VALID) == 0 || 2769f64bd8aSPaolo Bonzini ((flags & H_AVPN) && (v & ~0x7fULL) != avpn)) { 2779f64bd8aSPaolo Bonzini return H_NOT_FOUND; 2789f64bd8aSPaolo Bonzini } 2799f64bd8aSPaolo Bonzini 280d5aea6f3SDavid Gibson r &= ~(HPTE64_R_PP0 | HPTE64_R_PP | HPTE64_R_N | 281d5aea6f3SDavid Gibson HPTE64_R_KEY_HI | HPTE64_R_KEY_LO); 282d5aea6f3SDavid Gibson r |= (flags << 55) & HPTE64_R_PP0; 283d5aea6f3SDavid Gibson r |= (flags << 48) & HPTE64_R_KEY_HI; 284d5aea6f3SDavid Gibson r |= flags & (HPTE64_R_PP | HPTE64_R_N | HPTE64_R_KEY_LO); 2859f64bd8aSPaolo Bonzini rb = compute_tlbie_rb(v, r, pte_index); 286*dffdaf61SDavid Gibson ppc_hash64_store_hpte0(env, hpte, v & ~HPTE64_V_VALID); 2879f64bd8aSPaolo Bonzini ppc_tlb_invalidate_one(env, rb); 288*dffdaf61SDavid Gibson ppc_hash64_store_hpte1(env, hpte, r); 2899f64bd8aSPaolo Bonzini /* Don't need a memory barrier, due to qemu's global lock */ 290*dffdaf61SDavid Gibson ppc_hash64_store_hpte0(env, hpte, v); 2919f64bd8aSPaolo Bonzini return H_SUCCESS; 2929f64bd8aSPaolo Bonzini } 2939f64bd8aSPaolo Bonzini 294fa388916SAnthony Liguori static target_ulong h_read(PowerPCCPU *cpu, sPAPREnvironment *spapr, 295fa388916SAnthony Liguori target_ulong opcode, target_ulong *args) 296fa388916SAnthony Liguori { 297fa388916SAnthony Liguori CPUPPCState *env = &cpu->env; 298fa388916SAnthony Liguori target_ulong flags = args[0]; 299fa388916SAnthony Liguori target_ulong pte_index = args[1]; 300fa388916SAnthony Liguori uint8_t *hpte; 301fa388916SAnthony Liguori int i, ridx, n_entries = 1; 302fa388916SAnthony Liguori 303fa388916SAnthony Liguori if ((pte_index * HASH_PTE_SIZE_64) & ~env->htab_mask) { 304fa388916SAnthony Liguori return H_PARAMETER; 305fa388916SAnthony Liguori } 306fa388916SAnthony Liguori 307fa388916SAnthony Liguori if (flags & H_READ_4) { 308fa388916SAnthony Liguori /* Clear the two low order bits */ 309fa388916SAnthony Liguori pte_index &= ~(3ULL); 310fa388916SAnthony Liguori n_entries = 4; 311fa388916SAnthony Liguori } 312fa388916SAnthony Liguori 313fa388916SAnthony Liguori hpte = env->external_htab + (pte_index * HASH_PTE_SIZE_64); 314fa388916SAnthony Liguori 315fa388916SAnthony Liguori for (i = 0, ridx = 0; i < n_entries; i++) { 316fa388916SAnthony Liguori args[ridx++] = ldq_p(hpte); 317fa388916SAnthony Liguori args[ridx++] = ldq_p(hpte + (HASH_PTE_SIZE_64/2)); 318fa388916SAnthony Liguori hpte += HASH_PTE_SIZE_64; 319fa388916SAnthony Liguori } 320fa388916SAnthony Liguori 321fa388916SAnthony Liguori return H_SUCCESS; 322fa388916SAnthony Liguori } 323fa388916SAnthony Liguori 3249f64bd8aSPaolo Bonzini static target_ulong h_set_dabr(PowerPCCPU *cpu, sPAPREnvironment *spapr, 3259f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 3269f64bd8aSPaolo Bonzini { 3279f64bd8aSPaolo Bonzini /* FIXME: actually implement this */ 3289f64bd8aSPaolo Bonzini return H_HARDWARE; 3299f64bd8aSPaolo Bonzini } 3309f64bd8aSPaolo Bonzini 3319f64bd8aSPaolo Bonzini #define FLAGS_REGISTER_VPA 0x0000200000000000ULL 3329f64bd8aSPaolo Bonzini #define FLAGS_REGISTER_DTL 0x0000400000000000ULL 3339f64bd8aSPaolo Bonzini #define FLAGS_REGISTER_SLBSHADOW 0x0000600000000000ULL 3349f64bd8aSPaolo Bonzini #define FLAGS_DEREGISTER_VPA 0x0000a00000000000ULL 3359f64bd8aSPaolo Bonzini #define FLAGS_DEREGISTER_DTL 0x0000c00000000000ULL 3369f64bd8aSPaolo Bonzini #define FLAGS_DEREGISTER_SLBSHADOW 0x0000e00000000000ULL 3379f64bd8aSPaolo Bonzini 3389f64bd8aSPaolo Bonzini #define VPA_MIN_SIZE 640 3399f64bd8aSPaolo Bonzini #define VPA_SIZE_OFFSET 0x4 3409f64bd8aSPaolo Bonzini #define VPA_SHARED_PROC_OFFSET 0x9 3419f64bd8aSPaolo Bonzini #define VPA_SHARED_PROC_VAL 0x2 3429f64bd8aSPaolo Bonzini 3439f64bd8aSPaolo Bonzini static target_ulong register_vpa(CPUPPCState *env, target_ulong vpa) 3449f64bd8aSPaolo Bonzini { 3459f64bd8aSPaolo Bonzini uint16_t size; 3469f64bd8aSPaolo Bonzini uint8_t tmp; 3479f64bd8aSPaolo Bonzini 3489f64bd8aSPaolo Bonzini if (vpa == 0) { 3499f64bd8aSPaolo Bonzini hcall_dprintf("Can't cope with registering a VPA at logical 0\n"); 3509f64bd8aSPaolo Bonzini return H_HARDWARE; 3519f64bd8aSPaolo Bonzini } 3529f64bd8aSPaolo Bonzini 3539f64bd8aSPaolo Bonzini if (vpa % env->dcache_line_size) { 3549f64bd8aSPaolo Bonzini return H_PARAMETER; 3559f64bd8aSPaolo Bonzini } 3569f64bd8aSPaolo Bonzini /* FIXME: bounds check the address */ 3579f64bd8aSPaolo Bonzini 3589f64bd8aSPaolo Bonzini size = lduw_be_phys(vpa + 0x4); 3599f64bd8aSPaolo Bonzini 3609f64bd8aSPaolo Bonzini if (size < VPA_MIN_SIZE) { 3619f64bd8aSPaolo Bonzini return H_PARAMETER; 3629f64bd8aSPaolo Bonzini } 3639f64bd8aSPaolo Bonzini 3649f64bd8aSPaolo Bonzini /* VPA is not allowed to cross a page boundary */ 3659f64bd8aSPaolo Bonzini if ((vpa / 4096) != ((vpa + size - 1) / 4096)) { 3669f64bd8aSPaolo Bonzini return H_PARAMETER; 3679f64bd8aSPaolo Bonzini } 3689f64bd8aSPaolo Bonzini 3699f64bd8aSPaolo Bonzini env->vpa_addr = vpa; 3709f64bd8aSPaolo Bonzini 3719f64bd8aSPaolo Bonzini tmp = ldub_phys(env->vpa_addr + VPA_SHARED_PROC_OFFSET); 3729f64bd8aSPaolo Bonzini tmp |= VPA_SHARED_PROC_VAL; 3739f64bd8aSPaolo Bonzini stb_phys(env->vpa_addr + VPA_SHARED_PROC_OFFSET, tmp); 3749f64bd8aSPaolo Bonzini 3759f64bd8aSPaolo Bonzini return H_SUCCESS; 3769f64bd8aSPaolo Bonzini } 3779f64bd8aSPaolo Bonzini 3789f64bd8aSPaolo Bonzini static target_ulong deregister_vpa(CPUPPCState *env, target_ulong vpa) 3799f64bd8aSPaolo Bonzini { 3809f64bd8aSPaolo Bonzini if (env->slb_shadow_addr) { 3819f64bd8aSPaolo Bonzini return H_RESOURCE; 3829f64bd8aSPaolo Bonzini } 3839f64bd8aSPaolo Bonzini 3849f64bd8aSPaolo Bonzini if (env->dtl_addr) { 3859f64bd8aSPaolo Bonzini return H_RESOURCE; 3869f64bd8aSPaolo Bonzini } 3879f64bd8aSPaolo Bonzini 3889f64bd8aSPaolo Bonzini env->vpa_addr = 0; 3899f64bd8aSPaolo Bonzini return H_SUCCESS; 3909f64bd8aSPaolo Bonzini } 3919f64bd8aSPaolo Bonzini 3929f64bd8aSPaolo Bonzini static target_ulong register_slb_shadow(CPUPPCState *env, target_ulong addr) 3939f64bd8aSPaolo Bonzini { 3949f64bd8aSPaolo Bonzini uint32_t size; 3959f64bd8aSPaolo Bonzini 3969f64bd8aSPaolo Bonzini if (addr == 0) { 3979f64bd8aSPaolo Bonzini hcall_dprintf("Can't cope with SLB shadow at logical 0\n"); 3989f64bd8aSPaolo Bonzini return H_HARDWARE; 3999f64bd8aSPaolo Bonzini } 4009f64bd8aSPaolo Bonzini 4019f64bd8aSPaolo Bonzini size = ldl_be_phys(addr + 0x4); 4029f64bd8aSPaolo Bonzini if (size < 0x8) { 4039f64bd8aSPaolo Bonzini return H_PARAMETER; 4049f64bd8aSPaolo Bonzini } 4059f64bd8aSPaolo Bonzini 4069f64bd8aSPaolo Bonzini if ((addr / 4096) != ((addr + size - 1) / 4096)) { 4079f64bd8aSPaolo Bonzini return H_PARAMETER; 4089f64bd8aSPaolo Bonzini } 4099f64bd8aSPaolo Bonzini 4109f64bd8aSPaolo Bonzini if (!env->vpa_addr) { 4119f64bd8aSPaolo Bonzini return H_RESOURCE; 4129f64bd8aSPaolo Bonzini } 4139f64bd8aSPaolo Bonzini 4149f64bd8aSPaolo Bonzini env->slb_shadow_addr = addr; 4159f64bd8aSPaolo Bonzini env->slb_shadow_size = size; 4169f64bd8aSPaolo Bonzini 4179f64bd8aSPaolo Bonzini return H_SUCCESS; 4189f64bd8aSPaolo Bonzini } 4199f64bd8aSPaolo Bonzini 4209f64bd8aSPaolo Bonzini static target_ulong deregister_slb_shadow(CPUPPCState *env, target_ulong addr) 4219f64bd8aSPaolo Bonzini { 4229f64bd8aSPaolo Bonzini env->slb_shadow_addr = 0; 4239f64bd8aSPaolo Bonzini env->slb_shadow_size = 0; 4249f64bd8aSPaolo Bonzini return H_SUCCESS; 4259f64bd8aSPaolo Bonzini } 4269f64bd8aSPaolo Bonzini 4279f64bd8aSPaolo Bonzini static target_ulong register_dtl(CPUPPCState *env, target_ulong addr) 4289f64bd8aSPaolo Bonzini { 4299f64bd8aSPaolo Bonzini uint32_t size; 4309f64bd8aSPaolo Bonzini 4319f64bd8aSPaolo Bonzini if (addr == 0) { 4329f64bd8aSPaolo Bonzini hcall_dprintf("Can't cope with DTL at logical 0\n"); 4339f64bd8aSPaolo Bonzini return H_HARDWARE; 4349f64bd8aSPaolo Bonzini } 4359f64bd8aSPaolo Bonzini 4369f64bd8aSPaolo Bonzini size = ldl_be_phys(addr + 0x4); 4379f64bd8aSPaolo Bonzini 4389f64bd8aSPaolo Bonzini if (size < 48) { 4399f64bd8aSPaolo Bonzini return H_PARAMETER; 4409f64bd8aSPaolo Bonzini } 4419f64bd8aSPaolo Bonzini 4429f64bd8aSPaolo Bonzini if (!env->vpa_addr) { 4439f64bd8aSPaolo Bonzini return H_RESOURCE; 4449f64bd8aSPaolo Bonzini } 4459f64bd8aSPaolo Bonzini 4469f64bd8aSPaolo Bonzini env->dtl_addr = addr; 4479f64bd8aSPaolo Bonzini env->dtl_size = size; 4489f64bd8aSPaolo Bonzini 4499f64bd8aSPaolo Bonzini return H_SUCCESS; 4509f64bd8aSPaolo Bonzini } 4519f64bd8aSPaolo Bonzini 4529f64bd8aSPaolo Bonzini static target_ulong deregister_dtl(CPUPPCState *env, target_ulong addr) 4539f64bd8aSPaolo Bonzini { 4549f64bd8aSPaolo Bonzini env->dtl_addr = 0; 4559f64bd8aSPaolo Bonzini env->dtl_size = 0; 4569f64bd8aSPaolo Bonzini 4579f64bd8aSPaolo Bonzini return H_SUCCESS; 4589f64bd8aSPaolo Bonzini } 4599f64bd8aSPaolo Bonzini 4609f64bd8aSPaolo Bonzini static target_ulong h_register_vpa(PowerPCCPU *cpu, sPAPREnvironment *spapr, 4619f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 4629f64bd8aSPaolo Bonzini { 4639f64bd8aSPaolo Bonzini target_ulong flags = args[0]; 4649f64bd8aSPaolo Bonzini target_ulong procno = args[1]; 4659f64bd8aSPaolo Bonzini target_ulong vpa = args[2]; 4669f64bd8aSPaolo Bonzini target_ulong ret = H_PARAMETER; 4679f64bd8aSPaolo Bonzini CPUPPCState *tenv; 4689f64bd8aSPaolo Bonzini CPUState *tcpu; 4699f64bd8aSPaolo Bonzini 4709f64bd8aSPaolo Bonzini tcpu = qemu_get_cpu(procno); 4719f64bd8aSPaolo Bonzini if (!tcpu) { 4729f64bd8aSPaolo Bonzini return H_PARAMETER; 4739f64bd8aSPaolo Bonzini } 4749f64bd8aSPaolo Bonzini tenv = tcpu->env_ptr; 4759f64bd8aSPaolo Bonzini 4769f64bd8aSPaolo Bonzini switch (flags) { 4779f64bd8aSPaolo Bonzini case FLAGS_REGISTER_VPA: 4789f64bd8aSPaolo Bonzini ret = register_vpa(tenv, vpa); 4799f64bd8aSPaolo Bonzini break; 4809f64bd8aSPaolo Bonzini 4819f64bd8aSPaolo Bonzini case FLAGS_DEREGISTER_VPA: 4829f64bd8aSPaolo Bonzini ret = deregister_vpa(tenv, vpa); 4839f64bd8aSPaolo Bonzini break; 4849f64bd8aSPaolo Bonzini 4859f64bd8aSPaolo Bonzini case FLAGS_REGISTER_SLBSHADOW: 4869f64bd8aSPaolo Bonzini ret = register_slb_shadow(tenv, vpa); 4879f64bd8aSPaolo Bonzini break; 4889f64bd8aSPaolo Bonzini 4899f64bd8aSPaolo Bonzini case FLAGS_DEREGISTER_SLBSHADOW: 4909f64bd8aSPaolo Bonzini ret = deregister_slb_shadow(tenv, vpa); 4919f64bd8aSPaolo Bonzini break; 4929f64bd8aSPaolo Bonzini 4939f64bd8aSPaolo Bonzini case FLAGS_REGISTER_DTL: 4949f64bd8aSPaolo Bonzini ret = register_dtl(tenv, vpa); 4959f64bd8aSPaolo Bonzini break; 4969f64bd8aSPaolo Bonzini 4979f64bd8aSPaolo Bonzini case FLAGS_DEREGISTER_DTL: 4989f64bd8aSPaolo Bonzini ret = deregister_dtl(tenv, vpa); 4999f64bd8aSPaolo Bonzini break; 5009f64bd8aSPaolo Bonzini } 5019f64bd8aSPaolo Bonzini 5029f64bd8aSPaolo Bonzini return ret; 5039f64bd8aSPaolo Bonzini } 5049f64bd8aSPaolo Bonzini 5059f64bd8aSPaolo Bonzini static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr, 5069f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 5079f64bd8aSPaolo Bonzini { 5089f64bd8aSPaolo Bonzini CPUPPCState *env = &cpu->env; 5099f64bd8aSPaolo Bonzini CPUState *cs = CPU(cpu); 5109f64bd8aSPaolo Bonzini 5119f64bd8aSPaolo Bonzini env->msr |= (1ULL << MSR_EE); 5129f64bd8aSPaolo Bonzini hreg_compute_hflags(env); 5139f64bd8aSPaolo Bonzini if (!cpu_has_work(cs)) { 514259186a7SAndreas Färber cs->halted = 1; 5159f64bd8aSPaolo Bonzini env->exception_index = EXCP_HLT; 5169f64bd8aSPaolo Bonzini cs->exit_request = 1; 5179f64bd8aSPaolo Bonzini } 5189f64bd8aSPaolo Bonzini return H_SUCCESS; 5199f64bd8aSPaolo Bonzini } 5209f64bd8aSPaolo Bonzini 5219f64bd8aSPaolo Bonzini static target_ulong h_rtas(PowerPCCPU *cpu, sPAPREnvironment *spapr, 5229f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 5239f64bd8aSPaolo Bonzini { 5249f64bd8aSPaolo Bonzini target_ulong rtas_r3 = args[0]; 5259f64bd8aSPaolo Bonzini uint32_t token = ldl_be_phys(rtas_r3); 5269f64bd8aSPaolo Bonzini uint32_t nargs = ldl_be_phys(rtas_r3 + 4); 5279f64bd8aSPaolo Bonzini uint32_t nret = ldl_be_phys(rtas_r3 + 8); 5289f64bd8aSPaolo Bonzini 5299f64bd8aSPaolo Bonzini return spapr_rtas_call(spapr, token, nargs, rtas_r3 + 12, 5309f64bd8aSPaolo Bonzini nret, rtas_r3 + 12 + 4*nargs); 5319f64bd8aSPaolo Bonzini } 5329f64bd8aSPaolo Bonzini 5339f64bd8aSPaolo Bonzini static target_ulong h_logical_load(PowerPCCPU *cpu, sPAPREnvironment *spapr, 5349f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 5359f64bd8aSPaolo Bonzini { 5369f64bd8aSPaolo Bonzini target_ulong size = args[0]; 5379f64bd8aSPaolo Bonzini target_ulong addr = args[1]; 5389f64bd8aSPaolo Bonzini 5399f64bd8aSPaolo Bonzini switch (size) { 5409f64bd8aSPaolo Bonzini case 1: 5419f64bd8aSPaolo Bonzini args[0] = ldub_phys(addr); 5429f64bd8aSPaolo Bonzini return H_SUCCESS; 5439f64bd8aSPaolo Bonzini case 2: 5449f64bd8aSPaolo Bonzini args[0] = lduw_phys(addr); 5459f64bd8aSPaolo Bonzini return H_SUCCESS; 5469f64bd8aSPaolo Bonzini case 4: 5479f64bd8aSPaolo Bonzini args[0] = ldl_phys(addr); 5489f64bd8aSPaolo Bonzini return H_SUCCESS; 5499f64bd8aSPaolo Bonzini case 8: 5509f64bd8aSPaolo Bonzini args[0] = ldq_phys(addr); 5519f64bd8aSPaolo Bonzini return H_SUCCESS; 5529f64bd8aSPaolo Bonzini } 5539f64bd8aSPaolo Bonzini return H_PARAMETER; 5549f64bd8aSPaolo Bonzini } 5559f64bd8aSPaolo Bonzini 5569f64bd8aSPaolo Bonzini static target_ulong h_logical_store(PowerPCCPU *cpu, sPAPREnvironment *spapr, 5579f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 5589f64bd8aSPaolo Bonzini { 5599f64bd8aSPaolo Bonzini target_ulong size = args[0]; 5609f64bd8aSPaolo Bonzini target_ulong addr = args[1]; 5619f64bd8aSPaolo Bonzini target_ulong val = args[2]; 5629f64bd8aSPaolo Bonzini 5639f64bd8aSPaolo Bonzini switch (size) { 5649f64bd8aSPaolo Bonzini case 1: 5659f64bd8aSPaolo Bonzini stb_phys(addr, val); 5669f64bd8aSPaolo Bonzini return H_SUCCESS; 5679f64bd8aSPaolo Bonzini case 2: 5689f64bd8aSPaolo Bonzini stw_phys(addr, val); 5699f64bd8aSPaolo Bonzini return H_SUCCESS; 5709f64bd8aSPaolo Bonzini case 4: 5719f64bd8aSPaolo Bonzini stl_phys(addr, val); 5729f64bd8aSPaolo Bonzini return H_SUCCESS; 5739f64bd8aSPaolo Bonzini case 8: 5749f64bd8aSPaolo Bonzini stq_phys(addr, val); 5759f64bd8aSPaolo Bonzini return H_SUCCESS; 5769f64bd8aSPaolo Bonzini } 5779f64bd8aSPaolo Bonzini return H_PARAMETER; 5789f64bd8aSPaolo Bonzini } 5799f64bd8aSPaolo Bonzini 5809f64bd8aSPaolo Bonzini static target_ulong h_logical_memop(PowerPCCPU *cpu, sPAPREnvironment *spapr, 5819f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 5829f64bd8aSPaolo Bonzini { 5839f64bd8aSPaolo Bonzini target_ulong dst = args[0]; /* Destination address */ 5849f64bd8aSPaolo Bonzini target_ulong src = args[1]; /* Source address */ 5859f64bd8aSPaolo Bonzini target_ulong esize = args[2]; /* Element size (0=1,1=2,2=4,3=8) */ 5869f64bd8aSPaolo Bonzini target_ulong count = args[3]; /* Element count */ 5879f64bd8aSPaolo Bonzini target_ulong op = args[4]; /* 0 = copy, 1 = invert */ 5889f64bd8aSPaolo Bonzini uint64_t tmp; 5899f64bd8aSPaolo Bonzini unsigned int mask = (1 << esize) - 1; 5909f64bd8aSPaolo Bonzini int step = 1 << esize; 5919f64bd8aSPaolo Bonzini 5929f64bd8aSPaolo Bonzini if (count > 0x80000000) { 5939f64bd8aSPaolo Bonzini return H_PARAMETER; 5949f64bd8aSPaolo Bonzini } 5959f64bd8aSPaolo Bonzini 5969f64bd8aSPaolo Bonzini if ((dst & mask) || (src & mask) || (op > 1)) { 5979f64bd8aSPaolo Bonzini return H_PARAMETER; 5989f64bd8aSPaolo Bonzini } 5999f64bd8aSPaolo Bonzini 6009f64bd8aSPaolo Bonzini if (dst >= src && dst < (src + (count << esize))) { 6019f64bd8aSPaolo Bonzini dst = dst + ((count - 1) << esize); 6029f64bd8aSPaolo Bonzini src = src + ((count - 1) << esize); 6039f64bd8aSPaolo Bonzini step = -step; 6049f64bd8aSPaolo Bonzini } 6059f64bd8aSPaolo Bonzini 6069f64bd8aSPaolo Bonzini while (count--) { 6079f64bd8aSPaolo Bonzini switch (esize) { 6089f64bd8aSPaolo Bonzini case 0: 6099f64bd8aSPaolo Bonzini tmp = ldub_phys(src); 6109f64bd8aSPaolo Bonzini break; 6119f64bd8aSPaolo Bonzini case 1: 6129f64bd8aSPaolo Bonzini tmp = lduw_phys(src); 6139f64bd8aSPaolo Bonzini break; 6149f64bd8aSPaolo Bonzini case 2: 6159f64bd8aSPaolo Bonzini tmp = ldl_phys(src); 6169f64bd8aSPaolo Bonzini break; 6179f64bd8aSPaolo Bonzini case 3: 6189f64bd8aSPaolo Bonzini tmp = ldq_phys(src); 6199f64bd8aSPaolo Bonzini break; 6209f64bd8aSPaolo Bonzini default: 6219f64bd8aSPaolo Bonzini return H_PARAMETER; 6229f64bd8aSPaolo Bonzini } 6239f64bd8aSPaolo Bonzini if (op == 1) { 6249f64bd8aSPaolo Bonzini tmp = ~tmp; 6259f64bd8aSPaolo Bonzini } 6269f64bd8aSPaolo Bonzini switch (esize) { 6279f64bd8aSPaolo Bonzini case 0: 6289f64bd8aSPaolo Bonzini stb_phys(dst, tmp); 6299f64bd8aSPaolo Bonzini break; 6309f64bd8aSPaolo Bonzini case 1: 6319f64bd8aSPaolo Bonzini stw_phys(dst, tmp); 6329f64bd8aSPaolo Bonzini break; 6339f64bd8aSPaolo Bonzini case 2: 6349f64bd8aSPaolo Bonzini stl_phys(dst, tmp); 6359f64bd8aSPaolo Bonzini break; 6369f64bd8aSPaolo Bonzini case 3: 6379f64bd8aSPaolo Bonzini stq_phys(dst, tmp); 6389f64bd8aSPaolo Bonzini break; 6399f64bd8aSPaolo Bonzini } 6409f64bd8aSPaolo Bonzini dst = dst + step; 6419f64bd8aSPaolo Bonzini src = src + step; 6429f64bd8aSPaolo Bonzini } 6439f64bd8aSPaolo Bonzini 6449f64bd8aSPaolo Bonzini return H_SUCCESS; 6459f64bd8aSPaolo Bonzini } 6469f64bd8aSPaolo Bonzini 6479f64bd8aSPaolo Bonzini static target_ulong h_logical_icbi(PowerPCCPU *cpu, sPAPREnvironment *spapr, 6489f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 6499f64bd8aSPaolo Bonzini { 6509f64bd8aSPaolo Bonzini /* Nothing to do on emulation, KVM will trap this in the kernel */ 6519f64bd8aSPaolo Bonzini return H_SUCCESS; 6529f64bd8aSPaolo Bonzini } 6539f64bd8aSPaolo Bonzini 6549f64bd8aSPaolo Bonzini static target_ulong h_logical_dcbf(PowerPCCPU *cpu, sPAPREnvironment *spapr, 6559f64bd8aSPaolo Bonzini target_ulong opcode, target_ulong *args) 6569f64bd8aSPaolo Bonzini { 6579f64bd8aSPaolo Bonzini /* Nothing to do on emulation, KVM will trap this in the kernel */ 6589f64bd8aSPaolo Bonzini return H_SUCCESS; 6599f64bd8aSPaolo Bonzini } 6609f64bd8aSPaolo Bonzini 6619f64bd8aSPaolo Bonzini static spapr_hcall_fn papr_hypercall_table[(MAX_HCALL_OPCODE / 4) + 1]; 6629f64bd8aSPaolo Bonzini static spapr_hcall_fn kvmppc_hypercall_table[KVMPPC_HCALL_MAX - KVMPPC_HCALL_BASE + 1]; 6639f64bd8aSPaolo Bonzini 6649f64bd8aSPaolo Bonzini void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn) 6659f64bd8aSPaolo Bonzini { 6669f64bd8aSPaolo Bonzini spapr_hcall_fn *slot; 6679f64bd8aSPaolo Bonzini 6689f64bd8aSPaolo Bonzini if (opcode <= MAX_HCALL_OPCODE) { 6699f64bd8aSPaolo Bonzini assert((opcode & 0x3) == 0); 6709f64bd8aSPaolo Bonzini 6719f64bd8aSPaolo Bonzini slot = &papr_hypercall_table[opcode / 4]; 6729f64bd8aSPaolo Bonzini } else { 6739f64bd8aSPaolo Bonzini assert((opcode >= KVMPPC_HCALL_BASE) && (opcode <= KVMPPC_HCALL_MAX)); 6749f64bd8aSPaolo Bonzini 6759f64bd8aSPaolo Bonzini slot = &kvmppc_hypercall_table[opcode - KVMPPC_HCALL_BASE]; 6769f64bd8aSPaolo Bonzini } 6779f64bd8aSPaolo Bonzini 6789f64bd8aSPaolo Bonzini assert(!(*slot)); 6799f64bd8aSPaolo Bonzini *slot = fn; 6809f64bd8aSPaolo Bonzini } 6819f64bd8aSPaolo Bonzini 6829f64bd8aSPaolo Bonzini target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode, 6839f64bd8aSPaolo Bonzini target_ulong *args) 6849f64bd8aSPaolo Bonzini { 6859f64bd8aSPaolo Bonzini if ((opcode <= MAX_HCALL_OPCODE) 6869f64bd8aSPaolo Bonzini && ((opcode & 0x3) == 0)) { 6879f64bd8aSPaolo Bonzini spapr_hcall_fn fn = papr_hypercall_table[opcode / 4]; 6889f64bd8aSPaolo Bonzini 6899f64bd8aSPaolo Bonzini if (fn) { 6909f64bd8aSPaolo Bonzini return fn(cpu, spapr, opcode, args); 6919f64bd8aSPaolo Bonzini } 6929f64bd8aSPaolo Bonzini } else if ((opcode >= KVMPPC_HCALL_BASE) && 6939f64bd8aSPaolo Bonzini (opcode <= KVMPPC_HCALL_MAX)) { 6949f64bd8aSPaolo Bonzini spapr_hcall_fn fn = kvmppc_hypercall_table[opcode - KVMPPC_HCALL_BASE]; 6959f64bd8aSPaolo Bonzini 6969f64bd8aSPaolo Bonzini if (fn) { 6979f64bd8aSPaolo Bonzini return fn(cpu, spapr, opcode, args); 6989f64bd8aSPaolo Bonzini } 6999f64bd8aSPaolo Bonzini } 7009f64bd8aSPaolo Bonzini 7019f64bd8aSPaolo Bonzini hcall_dprintf("Unimplemented hcall 0x" TARGET_FMT_lx "\n", opcode); 7029f64bd8aSPaolo Bonzini return H_FUNCTION; 7039f64bd8aSPaolo Bonzini } 7049f64bd8aSPaolo Bonzini 7059f64bd8aSPaolo Bonzini static void hypercall_register_types(void) 7069f64bd8aSPaolo Bonzini { 7079f64bd8aSPaolo Bonzini /* hcall-pft */ 7089f64bd8aSPaolo Bonzini spapr_register_hypercall(H_ENTER, h_enter); 7099f64bd8aSPaolo Bonzini spapr_register_hypercall(H_REMOVE, h_remove); 7109f64bd8aSPaolo Bonzini spapr_register_hypercall(H_PROTECT, h_protect); 711fa388916SAnthony Liguori spapr_register_hypercall(H_READ, h_read); 7129f64bd8aSPaolo Bonzini 7139f64bd8aSPaolo Bonzini /* hcall-bulk */ 7149f64bd8aSPaolo Bonzini spapr_register_hypercall(H_BULK_REMOVE, h_bulk_remove); 7159f64bd8aSPaolo Bonzini 7169f64bd8aSPaolo Bonzini /* hcall-dabr */ 7179f64bd8aSPaolo Bonzini spapr_register_hypercall(H_SET_DABR, h_set_dabr); 7189f64bd8aSPaolo Bonzini 7199f64bd8aSPaolo Bonzini /* hcall-splpar */ 7209f64bd8aSPaolo Bonzini spapr_register_hypercall(H_REGISTER_VPA, h_register_vpa); 7219f64bd8aSPaolo Bonzini spapr_register_hypercall(H_CEDE, h_cede); 7229f64bd8aSPaolo Bonzini 7239f64bd8aSPaolo Bonzini /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenciate 7249f64bd8aSPaolo Bonzini * here between the "CI" and the "CACHE" variants, they will use whatever 7259f64bd8aSPaolo Bonzini * mapping attributes qemu is using. When using KVM, the kernel will 7269f64bd8aSPaolo Bonzini * enforce the attributes more strongly 7279f64bd8aSPaolo Bonzini */ 7289f64bd8aSPaolo Bonzini spapr_register_hypercall(H_LOGICAL_CI_LOAD, h_logical_load); 7299f64bd8aSPaolo Bonzini spapr_register_hypercall(H_LOGICAL_CI_STORE, h_logical_store); 7309f64bd8aSPaolo Bonzini spapr_register_hypercall(H_LOGICAL_CACHE_LOAD, h_logical_load); 7319f64bd8aSPaolo Bonzini spapr_register_hypercall(H_LOGICAL_CACHE_STORE, h_logical_store); 7329f64bd8aSPaolo Bonzini spapr_register_hypercall(H_LOGICAL_ICBI, h_logical_icbi); 7339f64bd8aSPaolo Bonzini spapr_register_hypercall(H_LOGICAL_DCBF, h_logical_dcbf); 7349f64bd8aSPaolo Bonzini spapr_register_hypercall(KVMPPC_H_LOGICAL_MEMOP, h_logical_memop); 7359f64bd8aSPaolo Bonzini 7369f64bd8aSPaolo Bonzini /* qemu/KVM-PPC specific hcalls */ 7379f64bd8aSPaolo Bonzini spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas); 7389f64bd8aSPaolo Bonzini } 7399f64bd8aSPaolo Bonzini 7409f64bd8aSPaolo Bonzini type_init(hypercall_register_types) 741