1 /* 2 * sPAPR CPU core device, acts as container of CPU thread devices. 3 * 4 * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com> 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 #include "hw/cpu/core.h" 10 #include "hw/ppc/spapr_cpu_core.h" 11 #include "target/ppc/cpu.h" 12 #include "hw/ppc/spapr.h" 13 #include "hw/boards.h" 14 #include "qapi/error.h" 15 #include "sysemu/cpus.h" 16 #include "sysemu/kvm.h" 17 #include "target/ppc/kvm_ppc.h" 18 #include "hw/ppc/ppc.h" 19 #include "target/ppc/mmu-hash64.h" 20 #include "sysemu/numa.h" 21 #include "sysemu/hw_accel.h" 22 #include "qemu/error-report.h" 23 24 static void spapr_cpu_reset(void *opaque) 25 { 26 PowerPCCPU *cpu = opaque; 27 CPUState *cs = CPU(cpu); 28 CPUPPCState *env = &cpu->env; 29 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); 30 31 cpu_reset(cs); 32 33 /* All CPUs start halted. CPU0 is unhalted from the machine level 34 * reset code and the rest are explicitly started up by the guest 35 * using an RTAS call */ 36 cs->halted = 1; 37 38 env->spr[SPR_HIOR] = 0; 39 40 /* Disable Power-saving mode Exit Cause exceptions for the CPU. 41 * This can cause issues when rebooting the guest if a secondary 42 * is awaken */ 43 if (cs != first_cpu) { 44 env->spr[SPR_LPCR] &= ~pcc->lpcr_pm; 45 } 46 } 47 48 static void spapr_cpu_destroy(PowerPCCPU *cpu) 49 { 50 qemu_unregister_reset(spapr_cpu_reset, cpu); 51 } 52 53 static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, 54 Error **errp) 55 { 56 CPUPPCState *env = &cpu->env; 57 58 /* Set time-base frequency to 512 MHz */ 59 cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ); 60 61 /* Enable PAPR mode in TCG or KVM */ 62 cpu_ppc_set_papr(cpu, PPC_VIRTUAL_HYPERVISOR(spapr)); 63 64 qemu_register_reset(spapr_cpu_reset, cpu); 65 spapr_cpu_reset(cpu); 66 } 67 68 /* 69 * Return the sPAPR CPU core type for @model which essentially is the CPU 70 * model specified with -cpu cmdline option. 71 */ 72 const char *spapr_get_cpu_core_type(const char *cpu_type) 73 { 74 int len = strlen(cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX); 75 char *core_type = g_strdup_printf(SPAPR_CPU_CORE_TYPE_NAME("%.*s"), 76 len, cpu_type); 77 ObjectClass *oc = object_class_by_name(core_type); 78 79 g_free(core_type); 80 if (!oc) { 81 return NULL; 82 } 83 84 return object_class_get_name(oc); 85 } 86 87 static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp) 88 { 89 sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); 90 CPUCore *cc = CPU_CORE(dev); 91 int i; 92 93 for (i = 0; i < cc->nr_threads; i++) { 94 Object *obj = OBJECT(sc->threads[i]); 95 DeviceState *dev = DEVICE(obj); 96 CPUState *cs = CPU(dev); 97 PowerPCCPU *cpu = POWERPC_CPU(cs); 98 99 spapr_cpu_destroy(cpu); 100 object_unparent(cpu->intc); 101 cpu_remove_sync(cs); 102 object_unparent(obj); 103 } 104 g_free(sc->threads); 105 } 106 107 static void spapr_cpu_core_realize_child(Object *child, 108 sPAPRMachineState *spapr, Error **errp) 109 { 110 Error *local_err = NULL; 111 CPUState *cs = CPU(child); 112 PowerPCCPU *cpu = POWERPC_CPU(cs); 113 114 object_property_set_bool(child, true, "realized", &local_err); 115 if (local_err) { 116 goto error; 117 } 118 119 spapr_cpu_init(spapr, cpu, &local_err); 120 if (local_err) { 121 goto error; 122 } 123 124 icp_create(child, spapr->icp_type, XICS_FABRIC(spapr), &local_err); 125 if (local_err) { 126 goto error; 127 } 128 129 return; 130 131 error: 132 error_propagate(errp, local_err); 133 } 134 135 static void spapr_cpu_core_realize(DeviceState *dev, Error **errp) 136 { 137 /* We don't use SPAPR_MACHINE() in order to exit gracefully if the user 138 * tries to add a sPAPR CPU core to a non-pseries machine. 139 */ 140 sPAPRMachineState *spapr = 141 (sPAPRMachineState *) object_dynamic_cast(qdev_get_machine(), 142 TYPE_SPAPR_MACHINE); 143 sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); 144 sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev)); 145 CPUCore *cc = CPU_CORE(OBJECT(dev)); 146 Error *local_err = NULL; 147 Object *obj; 148 int i, j; 149 150 if (!spapr) { 151 error_setg(errp, TYPE_SPAPR_CPU_CORE " needs a pseries machine"); 152 return; 153 } 154 155 sc->threads = g_new(PowerPCCPU *, cc->nr_threads); 156 for (i = 0; i < cc->nr_threads; i++) { 157 char id[32]; 158 CPUState *cs; 159 PowerPCCPU *cpu; 160 161 obj = object_new(scc->cpu_type); 162 163 cs = CPU(obj); 164 cpu = sc->threads[i] = POWERPC_CPU(obj); 165 cs->cpu_index = cc->core_id + i; 166 cpu->vcpu_id = (cc->core_id * spapr->vsmt / smp_threads) + i; 167 if (kvm_enabled() && !kvm_vcpu_id_is_valid(cpu->vcpu_id)) { 168 error_setg(&local_err, "Can't create CPU with id %d in KVM", 169 cpu->vcpu_id); 170 error_append_hint(&local_err, "Adjust the number of cpus to %d " 171 "or try to raise the number of threads per core\n", 172 cpu->vcpu_id * smp_threads / spapr->vsmt); 173 goto err; 174 } 175 176 177 /* Set NUMA node for the threads belonged to core */ 178 cpu->node_id = sc->node_id; 179 180 snprintf(id, sizeof(id), "thread[%d]", i); 181 object_property_add_child(OBJECT(sc), id, obj, &local_err); 182 if (local_err) { 183 goto err; 184 } 185 object_unref(obj); 186 } 187 188 for (j = 0; j < cc->nr_threads; j++) { 189 obj = OBJECT(sc->threads[j]); 190 191 spapr_cpu_core_realize_child(obj, spapr, &local_err); 192 if (local_err) { 193 goto err; 194 } 195 } 196 return; 197 198 err: 199 while (--i >= 0) { 200 obj = OBJECT(sc->threads[i]); 201 object_unparent(obj); 202 } 203 g_free(sc->threads); 204 error_propagate(errp, local_err); 205 } 206 207 static Property spapr_cpu_core_properties[] = { 208 DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID), 209 DEFINE_PROP_END_OF_LIST() 210 }; 211 212 static void spapr_cpu_core_class_init(ObjectClass *oc, void *data) 213 { 214 DeviceClass *dc = DEVICE_CLASS(oc); 215 sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc); 216 217 dc->realize = spapr_cpu_core_realize; 218 dc->unrealize = spapr_cpu_core_unrealizefn; 219 dc->props = spapr_cpu_core_properties; 220 scc->cpu_type = data; 221 } 222 223 #define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \ 224 { \ 225 .parent = TYPE_SPAPR_CPU_CORE, \ 226 .class_data = (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \ 227 .class_init = spapr_cpu_core_class_init, \ 228 .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \ 229 } 230 231 static const TypeInfo spapr_cpu_core_type_infos[] = { 232 { 233 .name = TYPE_SPAPR_CPU_CORE, 234 .parent = TYPE_CPU_CORE, 235 .abstract = true, 236 .instance_size = sizeof(sPAPRCPUCore), 237 .class_size = sizeof(sPAPRCPUCoreClass), 238 }, 239 DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"), 240 DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"), 241 DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"), 242 DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"), 243 DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"), 244 DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"), 245 DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"), 246 DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"), 247 DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"), 248 DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"), 249 DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"), 250 #ifdef CONFIG_KVM 251 DEFINE_SPAPR_CPU_CORE_TYPE("host"), 252 #endif 253 }; 254 255 DEFINE_TYPES(spapr_cpu_core_type_infos) 256