1 /* 2 * QEMU PowerPC pSeries Logical Partition capabilities handling 3 * 4 * Copyright (c) 2017 David Gibson, Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/error-report.h" 27 #include "qapi/error.h" 28 #include "qapi/visitor.h" 29 #include "sysemu/hw_accel.h" 30 #include "exec/ram_addr.h" 31 #include "target/ppc/cpu.h" 32 #include "target/ppc/mmu-hash64.h" 33 #include "cpu-models.h" 34 #include "kvm_ppc.h" 35 #include "migration/vmstate.h" 36 #include "sysemu/tcg.h" 37 38 #include "hw/ppc/spapr.h" 39 40 typedef struct SpaprCapPossible { 41 int num; /* size of vals array below */ 42 const char *help; /* help text for vals */ 43 /* 44 * Note: 45 * - because of the way compatibility is determined vals MUST be ordered 46 * such that later options are a superset of all preceding options. 47 * - the order of vals must be preserved, that is their index is important, 48 * however vals may be added to the end of the list so long as the above 49 * point is observed 50 */ 51 const char *vals[]; 52 } SpaprCapPossible; 53 54 typedef struct SpaprCapabilityInfo { 55 const char *name; 56 const char *description; 57 int index; 58 59 /* Getter and Setter Function Pointers */ 60 ObjectPropertyAccessor *get; 61 ObjectPropertyAccessor *set; 62 const char *type; 63 /* Possible values if this is a custom string type */ 64 SpaprCapPossible *possible; 65 /* Make sure the virtual hardware can support this capability */ 66 void (*apply)(SpaprMachineState *spapr, uint8_t val, Error **errp); 67 void (*cpu_apply)(SpaprMachineState *spapr, PowerPCCPU *cpu, 68 uint8_t val, Error **errp); 69 bool (*migrate_needed)(void *opaque); 70 } SpaprCapabilityInfo; 71 72 static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name, 73 void *opaque, Error **errp) 74 { 75 SpaprCapabilityInfo *cap = opaque; 76 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 77 bool value = spapr_get_cap(spapr, cap->index) == SPAPR_CAP_ON; 78 79 visit_type_bool(v, name, &value, errp); 80 } 81 82 static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name, 83 void *opaque, Error **errp) 84 { 85 SpaprCapabilityInfo *cap = opaque; 86 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 87 bool value; 88 89 if (!visit_type_bool(v, name, &value, errp)) { 90 return; 91 } 92 93 spapr->cmd_line_caps[cap->index] = true; 94 spapr->eff.caps[cap->index] = value ? SPAPR_CAP_ON : SPAPR_CAP_OFF; 95 } 96 97 98 static void spapr_cap_get_string(Object *obj, Visitor *v, const char *name, 99 void *opaque, Error **errp) 100 { 101 SpaprCapabilityInfo *cap = opaque; 102 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 103 char *val = NULL; 104 uint8_t value = spapr_get_cap(spapr, cap->index); 105 106 if (value >= cap->possible->num) { 107 error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name); 108 return; 109 } 110 111 val = g_strdup(cap->possible->vals[value]); 112 113 visit_type_str(v, name, &val, errp); 114 g_free(val); 115 } 116 117 static void spapr_cap_set_string(Object *obj, Visitor *v, const char *name, 118 void *opaque, Error **errp) 119 { 120 SpaprCapabilityInfo *cap = opaque; 121 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 122 uint8_t i; 123 char *val; 124 125 if (!visit_type_str(v, name, &val, errp)) { 126 return; 127 } 128 129 if (!strcmp(val, "?")) { 130 error_setg(errp, "%s", cap->possible->help); 131 goto out; 132 } 133 for (i = 0; i < cap->possible->num; i++) { 134 if (!strcasecmp(val, cap->possible->vals[i])) { 135 spapr->cmd_line_caps[cap->index] = true; 136 spapr->eff.caps[cap->index] = i; 137 goto out; 138 } 139 } 140 141 error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val, 142 cap->name); 143 out: 144 g_free(val); 145 } 146 147 static void spapr_cap_get_pagesize(Object *obj, Visitor *v, const char *name, 148 void *opaque, Error **errp) 149 { 150 SpaprCapabilityInfo *cap = opaque; 151 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 152 uint8_t val = spapr_get_cap(spapr, cap->index); 153 uint64_t pagesize = (1ULL << val); 154 155 visit_type_size(v, name, &pagesize, errp); 156 } 157 158 static void spapr_cap_set_pagesize(Object *obj, Visitor *v, const char *name, 159 void *opaque, Error **errp) 160 { 161 SpaprCapabilityInfo *cap = opaque; 162 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 163 uint64_t pagesize; 164 uint8_t val; 165 166 if (!visit_type_size(v, name, &pagesize, errp)) { 167 return; 168 } 169 170 if (!is_power_of_2(pagesize)) { 171 error_setg(errp, "cap-%s must be a power of 2", cap->name); 172 return; 173 } 174 175 val = ctz64(pagesize); 176 spapr->cmd_line_caps[cap->index] = true; 177 spapr->eff.caps[cap->index] = val; 178 } 179 180 static void cap_htm_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 181 { 182 ERRP_GUARD(); 183 if (!val) { 184 /* TODO: We don't support disabling htm yet */ 185 return; 186 } 187 if (tcg_enabled()) { 188 error_setg(errp, "No Transactional Memory support in TCG"); 189 error_append_hint(errp, "Try appending -machine cap-htm=off\n"); 190 } else if (kvm_enabled() && !kvmppc_has_cap_htm()) { 191 error_setg(errp, 192 "KVM implementation does not support Transactional Memory"); 193 error_append_hint(errp, "Try appending -machine cap-htm=off\n"); 194 } 195 } 196 197 static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 198 { 199 ERRP_GUARD(); 200 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 201 CPUPPCState *env = &cpu->env; 202 203 if (!val) { 204 /* TODO: We don't support disabling vsx yet */ 205 return; 206 } 207 /* Allowable CPUs in spapr_cpu_core.c should already have gotten 208 * rid of anything that doesn't do VMX */ 209 g_assert(env->insns_flags & PPC_ALTIVEC); 210 if (!(env->insns_flags2 & PPC2_VSX)) { 211 error_setg(errp, "VSX support not available"); 212 error_append_hint(errp, "Try appending -machine cap-vsx=off\n"); 213 } 214 } 215 216 static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 217 { 218 ERRP_GUARD(); 219 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 220 CPUPPCState *env = &cpu->env; 221 222 if (!val) { 223 /* TODO: We don't support disabling dfp yet */ 224 return; 225 } 226 if (!(env->insns_flags2 & PPC2_DFP)) { 227 error_setg(errp, "DFP support not available"); 228 error_append_hint(errp, "Try appending -machine cap-dfp=off\n"); 229 } 230 } 231 232 SpaprCapPossible cap_cfpc_possible = { 233 .num = 3, 234 .vals = {"broken", "workaround", "fixed"}, 235 .help = "broken - no protection, workaround - workaround available," 236 " fixed - fixed in hardware", 237 }; 238 239 static void cap_safe_cache_apply(SpaprMachineState *spapr, uint8_t val, 240 Error **errp) 241 { 242 ERRP_GUARD(); 243 uint8_t kvm_val = kvmppc_get_cap_safe_cache(); 244 245 if (tcg_enabled() && val) { 246 /* TCG only supports broken, allow other values and print a warning */ 247 warn_report("TCG doesn't support requested feature, cap-cfpc=%s", 248 cap_cfpc_possible.vals[val]); 249 } else if (kvm_enabled() && (val > kvm_val)) { 250 error_setg(errp, 251 "Requested safe cache capability level not supported by KVM"); 252 error_append_hint(errp, "Try appending -machine cap-cfpc=%s\n", 253 cap_cfpc_possible.vals[kvm_val]); 254 } 255 } 256 257 SpaprCapPossible cap_sbbc_possible = { 258 .num = 3, 259 .vals = {"broken", "workaround", "fixed"}, 260 .help = "broken - no protection, workaround - workaround available," 261 " fixed - fixed in hardware", 262 }; 263 264 static void cap_safe_bounds_check_apply(SpaprMachineState *spapr, uint8_t val, 265 Error **errp) 266 { 267 ERRP_GUARD(); 268 uint8_t kvm_val = kvmppc_get_cap_safe_bounds_check(); 269 270 if (tcg_enabled() && val) { 271 /* TCG only supports broken, allow other values and print a warning */ 272 warn_report("TCG doesn't support requested feature, cap-sbbc=%s", 273 cap_sbbc_possible.vals[val]); 274 } else if (kvm_enabled() && (val > kvm_val)) { 275 error_setg(errp, 276 "Requested safe bounds check capability level not supported by KVM"); 277 error_append_hint(errp, "Try appending -machine cap-sbbc=%s\n", 278 cap_sbbc_possible.vals[kvm_val]); 279 } 280 } 281 282 SpaprCapPossible cap_ibs_possible = { 283 .num = 5, 284 /* Note workaround only maintained for compatibility */ 285 .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"}, 286 .help = "broken - no protection, workaround - count cache flush" 287 ", fixed-ibs - indirect branch serialisation," 288 " fixed-ccd - cache count disabled," 289 " fixed-na - fixed in hardware (no longer applicable)", 290 }; 291 292 static void cap_safe_indirect_branch_apply(SpaprMachineState *spapr, 293 uint8_t val, Error **errp) 294 { 295 ERRP_GUARD(); 296 uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch(); 297 298 if (tcg_enabled() && val) { 299 /* TCG only supports broken, allow other values and print a warning */ 300 warn_report("TCG doesn't support requested feature, cap-ibs=%s", 301 cap_ibs_possible.vals[val]); 302 } else if (kvm_enabled() && (val > kvm_val)) { 303 error_setg(errp, 304 "Requested safe indirect branch capability level not supported by KVM"); 305 error_append_hint(errp, "Try appending -machine cap-ibs=%s\n", 306 cap_ibs_possible.vals[kvm_val]); 307 } 308 } 309 310 #define VALUE_DESC_TRISTATE " (broken, workaround, fixed)" 311 312 bool spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize, 313 Error **errp) 314 { 315 hwaddr maxpagesize = (1ULL << spapr->eff.caps[SPAPR_CAP_HPT_MAXPAGESIZE]); 316 317 if (!kvmppc_hpt_needs_host_contiguous_pages()) { 318 return true; 319 } 320 321 if (maxpagesize > pagesize) { 322 error_setg(errp, 323 "Can't support %"HWADDR_PRIu" kiB guest pages with %" 324 HWADDR_PRIu" kiB host pages with this KVM implementation", 325 maxpagesize >> 10, pagesize >> 10); 326 return false; 327 } 328 329 return true; 330 } 331 332 static void cap_hpt_maxpagesize_apply(SpaprMachineState *spapr, 333 uint8_t val, Error **errp) 334 { 335 if (val < 12) { 336 error_setg(errp, "Require at least 4kiB hpt-max-page-size"); 337 return; 338 } else if (val < 16) { 339 warn_report("Many guests require at least 64kiB hpt-max-page-size"); 340 } 341 342 spapr_check_pagesize(spapr, qemu_minrampagesize(), errp); 343 } 344 345 static bool cap_hpt_maxpagesize_migrate_needed(void *opaque) 346 { 347 return !SPAPR_MACHINE_GET_CLASS(opaque)->pre_4_1_migration; 348 } 349 350 static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift, 351 uint32_t pshift) 352 { 353 unsigned maxshift = *((unsigned *)opaque); 354 355 assert(pshift >= seg_pshift); 356 357 /* Don't allow the guest to use pages bigger than the configured 358 * maximum size */ 359 if (pshift > maxshift) { 360 return false; 361 } 362 363 /* For whatever reason, KVM doesn't allow multiple pagesizes 364 * within a segment, *except* for the case of 16M pages in a 4k or 365 * 64k segment. Always exclude other cases, so that TCG and KVM 366 * guests see a consistent environment */ 367 if ((pshift != seg_pshift) && (pshift != 24)) { 368 return false; 369 } 370 371 return true; 372 } 373 374 static void cap_hpt_maxpagesize_cpu_apply(SpaprMachineState *spapr, 375 PowerPCCPU *cpu, 376 uint8_t val, Error **errp) 377 { 378 unsigned maxshift = val; 379 380 ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift); 381 } 382 383 static void cap_nested_kvm_hv_apply(SpaprMachineState *spapr, 384 uint8_t val, Error **errp) 385 { 386 ERRP_GUARD(); 387 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 388 389 if (!val) { 390 /* capability disabled by default */ 391 return; 392 } 393 394 if (tcg_enabled()) { 395 error_setg(errp, "No Nested KVM-HV support in TCG"); 396 error_append_hint(errp, "Try appending -machine cap-nested-hv=off\n"); 397 } else if (kvm_enabled()) { 398 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, 399 spapr->max_compat_pvr)) { 400 error_setg(errp, "Nested KVM-HV only supported on POWER9"); 401 error_append_hint(errp, 402 "Try appending -machine max-cpu-compat=power9\n"); 403 return; 404 } 405 406 if (!kvmppc_has_cap_nested_kvm_hv()) { 407 error_setg(errp, 408 "KVM implementation does not support Nested KVM-HV"); 409 error_append_hint(errp, 410 "Try appending -machine cap-nested-hv=off\n"); 411 } else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) { 412 error_setg(errp, "Error enabling cap-nested-hv with KVM"); 413 error_append_hint(errp, 414 "Try appending -machine cap-nested-hv=off\n"); 415 } 416 } 417 } 418 419 static void cap_large_decr_apply(SpaprMachineState *spapr, 420 uint8_t val, Error **errp) 421 { 422 ERRP_GUARD(); 423 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 424 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); 425 426 if (!val) { 427 return; /* Disabled by default */ 428 } 429 430 if (tcg_enabled()) { 431 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, 432 spapr->max_compat_pvr)) { 433 error_setg(errp, "Large decrementer only supported on POWER9"); 434 error_append_hint(errp, "Try -cpu POWER9\n"); 435 return; 436 } 437 } else if (kvm_enabled()) { 438 int kvm_nr_bits = kvmppc_get_cap_large_decr(); 439 440 if (!kvm_nr_bits) { 441 error_setg(errp, "No large decrementer support"); 442 error_append_hint(errp, 443 "Try appending -machine cap-large-decr=off\n"); 444 } else if (pcc->lrg_decr_bits != kvm_nr_bits) { 445 error_setg(errp, 446 "KVM large decrementer size (%d) differs to model (%d)", 447 kvm_nr_bits, pcc->lrg_decr_bits); 448 error_append_hint(errp, 449 "Try appending -machine cap-large-decr=off\n"); 450 } 451 } 452 } 453 454 static void cap_large_decr_cpu_apply(SpaprMachineState *spapr, 455 PowerPCCPU *cpu, 456 uint8_t val, Error **errp) 457 { 458 ERRP_GUARD(); 459 CPUPPCState *env = &cpu->env; 460 target_ulong lpcr = env->spr[SPR_LPCR]; 461 462 if (kvm_enabled()) { 463 if (kvmppc_enable_cap_large_decr(cpu, val)) { 464 error_setg(errp, "No large decrementer support"); 465 error_append_hint(errp, 466 "Try appending -machine cap-large-decr=off\n"); 467 } 468 } 469 470 if (val) { 471 lpcr |= LPCR_LD; 472 } else { 473 lpcr &= ~LPCR_LD; 474 } 475 ppc_store_lpcr(cpu, lpcr); 476 } 477 478 static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val, 479 Error **errp) 480 { 481 ERRP_GUARD(); 482 uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist(); 483 484 if (tcg_enabled() && val) { 485 /* TCG doesn't implement anything here, but allow with a warning */ 486 warn_report("TCG doesn't support requested feature, cap-ccf-assist=on"); 487 } else if (kvm_enabled() && (val > kvm_val)) { 488 uint8_t kvm_ibs = kvmppc_get_cap_safe_indirect_branch(); 489 490 if (kvm_ibs == SPAPR_CAP_FIXED_CCD) { 491 /* 492 * If we don't have CCF assist on the host, the assist 493 * instruction is a harmless no-op. It won't correctly 494 * implement the cache count flush *but* if we have 495 * count-cache-disabled in the host, that flush is 496 * unnnecessary. So, specifically allow this case. This 497 * allows us to have better performance on POWER9 DD2.3, 498 * while still working on POWER9 DD2.2 and POWER8 host 499 * cpus. 500 */ 501 return; 502 } 503 error_setg(errp, 504 "Requested count cache flush assist capability level not supported by KVM"); 505 error_append_hint(errp, "Try appending -machine cap-ccf-assist=off\n"); 506 } 507 } 508 509 static void cap_fwnmi_apply(SpaprMachineState *spapr, uint8_t val, 510 Error **errp) 511 { 512 ERRP_GUARD(); 513 if (!val) { 514 return; /* Disabled by default */ 515 } 516 517 if (kvm_enabled()) { 518 if (!kvmppc_get_fwnmi()) { 519 error_setg(errp, 520 "Firmware Assisted Non-Maskable Interrupts(FWNMI) not supported by KVM."); 521 error_append_hint(errp, "Try appending -machine cap-fwnmi=off\n"); 522 } 523 } 524 } 525 526 SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = { 527 [SPAPR_CAP_HTM] = { 528 .name = "htm", 529 .description = "Allow Hardware Transactional Memory (HTM)", 530 .index = SPAPR_CAP_HTM, 531 .get = spapr_cap_get_bool, 532 .set = spapr_cap_set_bool, 533 .type = "bool", 534 .apply = cap_htm_apply, 535 }, 536 [SPAPR_CAP_VSX] = { 537 .name = "vsx", 538 .description = "Allow Vector Scalar Extensions (VSX)", 539 .index = SPAPR_CAP_VSX, 540 .get = spapr_cap_get_bool, 541 .set = spapr_cap_set_bool, 542 .type = "bool", 543 .apply = cap_vsx_apply, 544 }, 545 [SPAPR_CAP_DFP] = { 546 .name = "dfp", 547 .description = "Allow Decimal Floating Point (DFP)", 548 .index = SPAPR_CAP_DFP, 549 .get = spapr_cap_get_bool, 550 .set = spapr_cap_set_bool, 551 .type = "bool", 552 .apply = cap_dfp_apply, 553 }, 554 [SPAPR_CAP_CFPC] = { 555 .name = "cfpc", 556 .description = "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE, 557 .index = SPAPR_CAP_CFPC, 558 .get = spapr_cap_get_string, 559 .set = spapr_cap_set_string, 560 .type = "string", 561 .possible = &cap_cfpc_possible, 562 .apply = cap_safe_cache_apply, 563 }, 564 [SPAPR_CAP_SBBC] = { 565 .name = "sbbc", 566 .description = "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE, 567 .index = SPAPR_CAP_SBBC, 568 .get = spapr_cap_get_string, 569 .set = spapr_cap_set_string, 570 .type = "string", 571 .possible = &cap_sbbc_possible, 572 .apply = cap_safe_bounds_check_apply, 573 }, 574 [SPAPR_CAP_IBS] = { 575 .name = "ibs", 576 .description = 577 "Indirect Branch Speculation (broken, workaround, fixed-ibs," 578 "fixed-ccd, fixed-na)", 579 .index = SPAPR_CAP_IBS, 580 .get = spapr_cap_get_string, 581 .set = spapr_cap_set_string, 582 .type = "string", 583 .possible = &cap_ibs_possible, 584 .apply = cap_safe_indirect_branch_apply, 585 }, 586 [SPAPR_CAP_HPT_MAXPAGESIZE] = { 587 .name = "hpt-max-page-size", 588 .description = "Maximum page size for Hash Page Table guests", 589 .index = SPAPR_CAP_HPT_MAXPAGESIZE, 590 .get = spapr_cap_get_pagesize, 591 .set = spapr_cap_set_pagesize, 592 .type = "int", 593 .apply = cap_hpt_maxpagesize_apply, 594 .cpu_apply = cap_hpt_maxpagesize_cpu_apply, 595 .migrate_needed = cap_hpt_maxpagesize_migrate_needed, 596 }, 597 [SPAPR_CAP_NESTED_KVM_HV] = { 598 .name = "nested-hv", 599 .description = "Allow Nested KVM-HV", 600 .index = SPAPR_CAP_NESTED_KVM_HV, 601 .get = spapr_cap_get_bool, 602 .set = spapr_cap_set_bool, 603 .type = "bool", 604 .apply = cap_nested_kvm_hv_apply, 605 }, 606 [SPAPR_CAP_LARGE_DECREMENTER] = { 607 .name = "large-decr", 608 .description = "Allow Large Decrementer", 609 .index = SPAPR_CAP_LARGE_DECREMENTER, 610 .get = spapr_cap_get_bool, 611 .set = spapr_cap_set_bool, 612 .type = "bool", 613 .apply = cap_large_decr_apply, 614 .cpu_apply = cap_large_decr_cpu_apply, 615 }, 616 [SPAPR_CAP_CCF_ASSIST] = { 617 .name = "ccf-assist", 618 .description = "Count Cache Flush Assist via HW Instruction", 619 .index = SPAPR_CAP_CCF_ASSIST, 620 .get = spapr_cap_get_bool, 621 .set = spapr_cap_set_bool, 622 .type = "bool", 623 .apply = cap_ccf_assist_apply, 624 }, 625 [SPAPR_CAP_FWNMI] = { 626 .name = "fwnmi", 627 .description = "Implements PAPR FWNMI option", 628 .index = SPAPR_CAP_FWNMI, 629 .get = spapr_cap_get_bool, 630 .set = spapr_cap_set_bool, 631 .type = "bool", 632 .apply = cap_fwnmi_apply, 633 }, 634 }; 635 636 static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr, 637 const char *cputype) 638 { 639 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); 640 SpaprCapabilities caps; 641 642 caps = smc->default_caps; 643 644 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_3_00, 645 0, spapr->max_compat_pvr)) { 646 caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF; 647 } 648 649 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07, 650 0, spapr->max_compat_pvr)) { 651 caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF; 652 caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN; 653 } 654 655 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS, 656 0, spapr->max_compat_pvr)) { 657 caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN; 658 } 659 660 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06, 661 0, spapr->max_compat_pvr)) { 662 caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF; 663 caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF; 664 caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN; 665 } 666 667 /* This is for pseries-2.12 and older */ 668 if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) { 669 uint8_t mps; 670 671 if (kvmppc_hpt_needs_host_contiguous_pages()) { 672 mps = ctz64(qemu_minrampagesize()); 673 } else { 674 mps = 34; /* allow everything up to 16GiB, i.e. everything */ 675 } 676 677 caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = mps; 678 } 679 680 return caps; 681 } 682 683 int spapr_caps_pre_load(void *opaque) 684 { 685 SpaprMachineState *spapr = opaque; 686 687 /* Set to default so we can tell if this came in with the migration */ 688 spapr->mig = spapr->def; 689 return 0; 690 } 691 692 int spapr_caps_pre_save(void *opaque) 693 { 694 SpaprMachineState *spapr = opaque; 695 696 spapr->mig = spapr->eff; 697 return 0; 698 } 699 700 /* This has to be called from the top-level spapr post_load, not the 701 * caps specific one. Otherwise it wouldn't be called when the source 702 * caps are all defaults, which could still conflict with overridden 703 * caps on the destination */ 704 int spapr_caps_post_migration(SpaprMachineState *spapr) 705 { 706 int i; 707 bool ok = true; 708 SpaprCapabilities dstcaps = spapr->eff; 709 SpaprCapabilities srccaps; 710 711 srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type); 712 for (i = 0; i < SPAPR_CAP_NUM; i++) { 713 /* If not default value then assume came in with the migration */ 714 if (spapr->mig.caps[i] != spapr->def.caps[i]) { 715 srccaps.caps[i] = spapr->mig.caps[i]; 716 } 717 } 718 719 for (i = 0; i < SPAPR_CAP_NUM; i++) { 720 SpaprCapabilityInfo *info = &capability_table[i]; 721 722 if (srccaps.caps[i] > dstcaps.caps[i]) { 723 error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)", 724 info->name, srccaps.caps[i], dstcaps.caps[i]); 725 ok = false; 726 } 727 728 if (srccaps.caps[i] < dstcaps.caps[i]) { 729 warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)", 730 info->name, srccaps.caps[i], dstcaps.caps[i]); 731 } 732 } 733 734 return ok ? 0 : -EINVAL; 735 } 736 737 /* Used to generate the migration field and needed function for a spapr cap */ 738 #define SPAPR_CAP_MIG_STATE(sname, cap) \ 739 static bool spapr_cap_##sname##_needed(void *opaque) \ 740 { \ 741 SpaprMachineState *spapr = opaque; \ 742 bool (*needed)(void *opaque) = \ 743 capability_table[cap].migrate_needed; \ 744 \ 745 return needed ? needed(opaque) : true && \ 746 spapr->cmd_line_caps[cap] && \ 747 (spapr->eff.caps[cap] != \ 748 spapr->def.caps[cap]); \ 749 } \ 750 \ 751 const VMStateDescription vmstate_spapr_cap_##sname = { \ 752 .name = "spapr/cap/" #sname, \ 753 .version_id = 1, \ 754 .minimum_version_id = 1, \ 755 .needed = spapr_cap_##sname##_needed, \ 756 .fields = (VMStateField[]) { \ 757 VMSTATE_UINT8(mig.caps[cap], \ 758 SpaprMachineState), \ 759 VMSTATE_END_OF_LIST() \ 760 }, \ 761 } 762 763 SPAPR_CAP_MIG_STATE(htm, SPAPR_CAP_HTM); 764 SPAPR_CAP_MIG_STATE(vsx, SPAPR_CAP_VSX); 765 SPAPR_CAP_MIG_STATE(dfp, SPAPR_CAP_DFP); 766 SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC); 767 SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC); 768 SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS); 769 SPAPR_CAP_MIG_STATE(hpt_maxpagesize, SPAPR_CAP_HPT_MAXPAGESIZE); 770 SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV); 771 SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER); 772 SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST); 773 SPAPR_CAP_MIG_STATE(fwnmi, SPAPR_CAP_FWNMI); 774 775 void spapr_caps_init(SpaprMachineState *spapr) 776 { 777 SpaprCapabilities default_caps; 778 int i; 779 780 /* Compute the actual set of caps we should run with */ 781 default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type); 782 783 for (i = 0; i < SPAPR_CAP_NUM; i++) { 784 /* Store the defaults */ 785 spapr->def.caps[i] = default_caps.caps[i]; 786 /* If not set on the command line then apply the default value */ 787 if (!spapr->cmd_line_caps[i]) { 788 spapr->eff.caps[i] = default_caps.caps[i]; 789 } 790 } 791 } 792 793 void spapr_caps_apply(SpaprMachineState *spapr) 794 { 795 int i; 796 797 for (i = 0; i < SPAPR_CAP_NUM; i++) { 798 SpaprCapabilityInfo *info = &capability_table[i]; 799 800 /* 801 * If the apply function can't set the desired level and thinks it's 802 * fatal, it should cause that. 803 */ 804 info->apply(spapr, spapr->eff.caps[i], &error_fatal); 805 } 806 } 807 808 void spapr_caps_cpu_apply(SpaprMachineState *spapr, PowerPCCPU *cpu) 809 { 810 int i; 811 812 for (i = 0; i < SPAPR_CAP_NUM; i++) { 813 SpaprCapabilityInfo *info = &capability_table[i]; 814 815 /* 816 * If the apply function can't set the desired level and thinks it's 817 * fatal, it should cause that. 818 */ 819 if (info->cpu_apply) { 820 info->cpu_apply(spapr, cpu, spapr->eff.caps[i], &error_fatal); 821 } 822 } 823 } 824 825 void spapr_caps_add_properties(SpaprMachineClass *smc) 826 { 827 ObjectClass *klass = OBJECT_CLASS(smc); 828 int i; 829 830 for (i = 0; i < ARRAY_SIZE(capability_table); i++) { 831 SpaprCapabilityInfo *cap = &capability_table[i]; 832 char *name = g_strdup_printf("cap-%s", cap->name); 833 char *desc; 834 835 object_class_property_add(klass, name, cap->type, 836 cap->get, cap->set, 837 NULL, cap); 838 839 desc = g_strdup_printf("%s", cap->description); 840 object_class_property_set_description(klass, name, desc); 841 g_free(name); 842 g_free(desc); 843 } 844 } 845