1 /* 2 * QEMU PowerPC pSeries Logical Partition capabilities handling 3 * 4 * Copyright (c) 2017 David Gibson, Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/error-report.h" 27 #include "qapi/error.h" 28 #include "qapi/visitor.h" 29 #include "sysemu/hw_accel.h" 30 #include "exec/ram_addr.h" 31 #include "target/ppc/cpu.h" 32 #include "target/ppc/mmu-hash64.h" 33 #include "cpu-models.h" 34 #include "kvm_ppc.h" 35 #include "migration/vmstate.h" 36 #include "sysemu/tcg.h" 37 38 #include "hw/ppc/spapr.h" 39 40 typedef struct SpaprCapPossible { 41 int num; /* size of vals array below */ 42 const char *help; /* help text for vals */ 43 /* 44 * Note: 45 * - because of the way compatibility is determined vals MUST be ordered 46 * such that later options are a superset of all preceding options. 47 * - the order of vals must be preserved, that is their index is important, 48 * however vals may be added to the end of the list so long as the above 49 * point is observed 50 */ 51 const char *vals[]; 52 } SpaprCapPossible; 53 54 typedef struct SpaprCapabilityInfo { 55 const char *name; 56 const char *description; 57 int index; 58 59 /* Getter and Setter Function Pointers */ 60 ObjectPropertyAccessor *get; 61 ObjectPropertyAccessor *set; 62 const char *type; 63 /* Possible values if this is a custom string type */ 64 SpaprCapPossible *possible; 65 /* Make sure the virtual hardware can support this capability */ 66 void (*apply)(SpaprMachineState *spapr, uint8_t val, Error **errp); 67 void (*cpu_apply)(SpaprMachineState *spapr, PowerPCCPU *cpu, 68 uint8_t val, Error **errp); 69 bool (*migrate_needed)(void *opaque); 70 } SpaprCapabilityInfo; 71 72 static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name, 73 void *opaque, Error **errp) 74 { 75 SpaprCapabilityInfo *cap = opaque; 76 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 77 bool value = spapr_get_cap(spapr, cap->index) == SPAPR_CAP_ON; 78 79 visit_type_bool(v, name, &value, errp); 80 } 81 82 static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name, 83 void *opaque, Error **errp) 84 { 85 SpaprCapabilityInfo *cap = opaque; 86 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 87 bool value; 88 89 if (!visit_type_bool(v, name, &value, errp)) { 90 return; 91 } 92 93 spapr->cmd_line_caps[cap->index] = true; 94 spapr->eff.caps[cap->index] = value ? SPAPR_CAP_ON : SPAPR_CAP_OFF; 95 } 96 97 98 static void spapr_cap_get_string(Object *obj, Visitor *v, const char *name, 99 void *opaque, Error **errp) 100 { 101 SpaprCapabilityInfo *cap = opaque; 102 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 103 char *val = NULL; 104 uint8_t value = spapr_get_cap(spapr, cap->index); 105 106 if (value >= cap->possible->num) { 107 error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name); 108 return; 109 } 110 111 val = g_strdup(cap->possible->vals[value]); 112 113 visit_type_str(v, name, &val, errp); 114 g_free(val); 115 } 116 117 static void spapr_cap_set_string(Object *obj, Visitor *v, const char *name, 118 void *opaque, Error **errp) 119 { 120 SpaprCapabilityInfo *cap = opaque; 121 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 122 uint8_t i; 123 char *val; 124 125 if (!visit_type_str(v, name, &val, errp)) { 126 return; 127 } 128 129 if (!strcmp(val, "?")) { 130 error_setg(errp, "%s", cap->possible->help); 131 goto out; 132 } 133 for (i = 0; i < cap->possible->num; i++) { 134 if (!strcasecmp(val, cap->possible->vals[i])) { 135 spapr->cmd_line_caps[cap->index] = true; 136 spapr->eff.caps[cap->index] = i; 137 goto out; 138 } 139 } 140 141 error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val, 142 cap->name); 143 out: 144 g_free(val); 145 } 146 147 static void spapr_cap_get_pagesize(Object *obj, Visitor *v, const char *name, 148 void *opaque, Error **errp) 149 { 150 SpaprCapabilityInfo *cap = opaque; 151 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 152 uint8_t val = spapr_get_cap(spapr, cap->index); 153 uint64_t pagesize = (1ULL << val); 154 155 visit_type_size(v, name, &pagesize, errp); 156 } 157 158 static void spapr_cap_set_pagesize(Object *obj, Visitor *v, const char *name, 159 void *opaque, Error **errp) 160 { 161 SpaprCapabilityInfo *cap = opaque; 162 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 163 uint64_t pagesize; 164 uint8_t val; 165 166 if (!visit_type_size(v, name, &pagesize, errp)) { 167 return; 168 } 169 170 if (!is_power_of_2(pagesize)) { 171 error_setg(errp, "cap-%s must be a power of 2", cap->name); 172 return; 173 } 174 175 val = ctz64(pagesize); 176 spapr->cmd_line_caps[cap->index] = true; 177 spapr->eff.caps[cap->index] = val; 178 } 179 180 static void cap_htm_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 181 { 182 ERRP_GUARD(); 183 if (!val) { 184 /* TODO: We don't support disabling htm yet */ 185 return; 186 } 187 if (tcg_enabled()) { 188 error_setg(errp, "No Transactional Memory support in TCG"); 189 error_append_hint(errp, "Try appending -machine cap-htm=off\n"); 190 } else if (kvm_enabled() && !kvmppc_has_cap_htm()) { 191 error_setg(errp, 192 "KVM implementation does not support Transactional Memory"); 193 error_append_hint(errp, "Try appending -machine cap-htm=off\n"); 194 } 195 } 196 197 static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 198 { 199 ERRP_GUARD(); 200 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 201 CPUPPCState *env = &cpu->env; 202 203 if (!val) { 204 /* TODO: We don't support disabling vsx yet */ 205 return; 206 } 207 /* Allowable CPUs in spapr_cpu_core.c should already have gotten 208 * rid of anything that doesn't do VMX */ 209 g_assert(env->insns_flags & PPC_ALTIVEC); 210 if (!(env->insns_flags2 & PPC2_VSX)) { 211 error_setg(errp, "VSX support not available"); 212 error_append_hint(errp, "Try appending -machine cap-vsx=off\n"); 213 } 214 } 215 216 static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 217 { 218 ERRP_GUARD(); 219 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 220 CPUPPCState *env = &cpu->env; 221 222 if (!val) { 223 /* TODO: We don't support disabling dfp yet */ 224 return; 225 } 226 if (!(env->insns_flags2 & PPC2_DFP)) { 227 error_setg(errp, "DFP support not available"); 228 error_append_hint(errp, "Try appending -machine cap-dfp=off\n"); 229 } 230 } 231 232 SpaprCapPossible cap_cfpc_possible = { 233 .num = 3, 234 .vals = {"broken", "workaround", "fixed"}, 235 .help = "broken - no protection, workaround - workaround available," 236 " fixed - fixed in hardware", 237 }; 238 239 static void cap_safe_cache_apply(SpaprMachineState *spapr, uint8_t val, 240 Error **errp) 241 { 242 ERRP_GUARD(); 243 uint8_t kvm_val = kvmppc_get_cap_safe_cache(); 244 245 if (tcg_enabled() && val) { 246 /* TCG only supports broken, allow other values and print a warning */ 247 warn_report("TCG doesn't support requested feature, cap-cfpc=%s", 248 cap_cfpc_possible.vals[val]); 249 } else if (kvm_enabled() && (val > kvm_val)) { 250 error_setg(errp, 251 "Requested safe cache capability level not supported by KVM"); 252 error_append_hint(errp, "Try appending -machine cap-cfpc=%s\n", 253 cap_cfpc_possible.vals[kvm_val]); 254 } 255 } 256 257 SpaprCapPossible cap_sbbc_possible = { 258 .num = 3, 259 .vals = {"broken", "workaround", "fixed"}, 260 .help = "broken - no protection, workaround - workaround available," 261 " fixed - fixed in hardware", 262 }; 263 264 static void cap_safe_bounds_check_apply(SpaprMachineState *spapr, uint8_t val, 265 Error **errp) 266 { 267 ERRP_GUARD(); 268 uint8_t kvm_val = kvmppc_get_cap_safe_bounds_check(); 269 270 if (tcg_enabled() && val) { 271 /* TCG only supports broken, allow other values and print a warning */ 272 warn_report("TCG doesn't support requested feature, cap-sbbc=%s", 273 cap_sbbc_possible.vals[val]); 274 } else if (kvm_enabled() && (val > kvm_val)) { 275 error_setg(errp, 276 "Requested safe bounds check capability level not supported by KVM"); 277 error_append_hint(errp, "Try appending -machine cap-sbbc=%s\n", 278 cap_sbbc_possible.vals[kvm_val]); 279 } 280 } 281 282 SpaprCapPossible cap_ibs_possible = { 283 .num = 5, 284 /* Note workaround only maintained for compatibility */ 285 .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"}, 286 .help = "broken - no protection, workaround - count cache flush" 287 ", fixed-ibs - indirect branch serialisation," 288 " fixed-ccd - cache count disabled," 289 " fixed-na - fixed in hardware (no longer applicable)", 290 }; 291 292 static void cap_safe_indirect_branch_apply(SpaprMachineState *spapr, 293 uint8_t val, Error **errp) 294 { 295 ERRP_GUARD(); 296 uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch(); 297 298 if (tcg_enabled() && val) { 299 /* TCG only supports broken, allow other values and print a warning */ 300 warn_report("TCG doesn't support requested feature, cap-ibs=%s", 301 cap_ibs_possible.vals[val]); 302 } else if (kvm_enabled() && (val > kvm_val)) { 303 error_setg(errp, 304 "Requested safe indirect branch capability level not supported by KVM"); 305 error_append_hint(errp, "Try appending -machine cap-ibs=%s\n", 306 cap_ibs_possible.vals[kvm_val]); 307 } 308 } 309 310 #define VALUE_DESC_TRISTATE " (broken, workaround, fixed)" 311 312 bool spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize, 313 Error **errp) 314 { 315 hwaddr maxpagesize = (1ULL << spapr->eff.caps[SPAPR_CAP_HPT_MAXPAGESIZE]); 316 317 if (!kvmppc_hpt_needs_host_contiguous_pages()) { 318 return true; 319 } 320 321 if (maxpagesize > pagesize) { 322 error_setg(errp, 323 "Can't support %"HWADDR_PRIu" kiB guest pages with %" 324 HWADDR_PRIu" kiB host pages with this KVM implementation", 325 maxpagesize >> 10, pagesize >> 10); 326 return false; 327 } 328 329 return true; 330 } 331 332 static void cap_hpt_maxpagesize_apply(SpaprMachineState *spapr, 333 uint8_t val, Error **errp) 334 { 335 if (val < 12) { 336 error_setg(errp, "Require at least 4kiB hpt-max-page-size"); 337 return; 338 } else if (val < 16) { 339 warn_report("Many guests require at least 64kiB hpt-max-page-size"); 340 } 341 342 spapr_check_pagesize(spapr, qemu_minrampagesize(), errp); 343 } 344 345 static bool cap_hpt_maxpagesize_migrate_needed(void *opaque) 346 { 347 return !SPAPR_MACHINE_GET_CLASS(opaque)->pre_4_1_migration; 348 } 349 350 static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift, 351 uint32_t pshift) 352 { 353 unsigned maxshift = *((unsigned *)opaque); 354 355 assert(pshift >= seg_pshift); 356 357 /* Don't allow the guest to use pages bigger than the configured 358 * maximum size */ 359 if (pshift > maxshift) { 360 return false; 361 } 362 363 /* For whatever reason, KVM doesn't allow multiple pagesizes 364 * within a segment, *except* for the case of 16M pages in a 4k or 365 * 64k segment. Always exclude other cases, so that TCG and KVM 366 * guests see a consistent environment */ 367 if ((pshift != seg_pshift) && (pshift != 24)) { 368 return false; 369 } 370 371 return true; 372 } 373 374 static void ppc_hash64_filter_pagesizes(PowerPCCPU *cpu, 375 bool (*cb)(void *, uint32_t, uint32_t), 376 void *opaque) 377 { 378 PPCHash64Options *opts = cpu->hash64_opts; 379 int i; 380 int n = 0; 381 bool ci_largepage = false; 382 383 assert(opts); 384 385 n = 0; 386 for (i = 0; i < ARRAY_SIZE(opts->sps); i++) { 387 PPCHash64SegmentPageSizes *sps = &opts->sps[i]; 388 int j; 389 int m = 0; 390 391 assert(n <= i); 392 393 if (!sps->page_shift) { 394 break; 395 } 396 397 for (j = 0; j < ARRAY_SIZE(sps->enc); j++) { 398 PPCHash64PageSize *ps = &sps->enc[j]; 399 400 assert(m <= j); 401 if (!ps->page_shift) { 402 break; 403 } 404 405 if (cb(opaque, sps->page_shift, ps->page_shift)) { 406 if (ps->page_shift >= 16) { 407 ci_largepage = true; 408 } 409 sps->enc[m++] = *ps; 410 } 411 } 412 413 /* Clear rest of the row */ 414 for (j = m; j < ARRAY_SIZE(sps->enc); j++) { 415 memset(&sps->enc[j], 0, sizeof(sps->enc[j])); 416 } 417 418 if (m) { 419 n++; 420 } 421 } 422 423 /* Clear the rest of the table */ 424 for (i = n; i < ARRAY_SIZE(opts->sps); i++) { 425 memset(&opts->sps[i], 0, sizeof(opts->sps[i])); 426 } 427 428 if (!ci_largepage) { 429 opts->flags &= ~PPC_HASH64_CI_LARGEPAGE; 430 } 431 } 432 433 static void cap_hpt_maxpagesize_cpu_apply(SpaprMachineState *spapr, 434 PowerPCCPU *cpu, 435 uint8_t val, Error **errp) 436 { 437 unsigned maxshift = val; 438 439 ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift); 440 } 441 442 static void cap_nested_kvm_hv_apply(SpaprMachineState *spapr, 443 uint8_t val, Error **errp) 444 { 445 ERRP_GUARD(); 446 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 447 CPUPPCState *env = &cpu->env; 448 449 if (!val) { 450 /* capability disabled by default */ 451 return; 452 } 453 454 if (!(env->insns_flags2 & PPC2_ISA300)) { 455 error_setg(errp, "Nested-HV only supported on POWER9 and later"); 456 error_append_hint(errp, "Try appending -machine cap-nested-hv=off\n"); 457 return; 458 } 459 460 if (kvm_enabled()) { 461 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, 462 spapr->max_compat_pvr)) { 463 error_setg(errp, "Nested-HV only supported on POWER9 and later"); 464 error_append_hint(errp, 465 "Try appending -machine max-cpu-compat=power9\n"); 466 return; 467 } 468 469 if (!kvmppc_has_cap_nested_kvm_hv()) { 470 error_setg(errp, 471 "KVM implementation does not support Nested-HV"); 472 error_append_hint(errp, 473 "Try appending -machine cap-nested-hv=off\n"); 474 } else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) { 475 error_setg(errp, "Error enabling cap-nested-hv with KVM"); 476 error_append_hint(errp, 477 "Try appending -machine cap-nested-hv=off\n"); 478 } 479 } 480 } 481 482 static void cap_large_decr_apply(SpaprMachineState *spapr, 483 uint8_t val, Error **errp) 484 { 485 ERRP_GUARD(); 486 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 487 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); 488 489 if (!val) { 490 return; /* Disabled by default */ 491 } 492 493 if (tcg_enabled()) { 494 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, 495 spapr->max_compat_pvr)) { 496 error_setg(errp, "Large decrementer only supported on POWER9"); 497 error_append_hint(errp, "Try -cpu POWER9\n"); 498 return; 499 } 500 } else if (kvm_enabled()) { 501 int kvm_nr_bits = kvmppc_get_cap_large_decr(); 502 503 if (!kvm_nr_bits) { 504 error_setg(errp, "No large decrementer support"); 505 error_append_hint(errp, 506 "Try appending -machine cap-large-decr=off\n"); 507 } else if (pcc->lrg_decr_bits != kvm_nr_bits) { 508 error_setg(errp, 509 "KVM large decrementer size (%d) differs to model (%d)", 510 kvm_nr_bits, pcc->lrg_decr_bits); 511 error_append_hint(errp, 512 "Try appending -machine cap-large-decr=off\n"); 513 } 514 } 515 } 516 517 static void cap_large_decr_cpu_apply(SpaprMachineState *spapr, 518 PowerPCCPU *cpu, 519 uint8_t val, Error **errp) 520 { 521 ERRP_GUARD(); 522 CPUPPCState *env = &cpu->env; 523 target_ulong lpcr = env->spr[SPR_LPCR]; 524 525 if (kvm_enabled()) { 526 if (kvmppc_enable_cap_large_decr(cpu, val)) { 527 error_setg(errp, "No large decrementer support"); 528 error_append_hint(errp, 529 "Try appending -machine cap-large-decr=off\n"); 530 } 531 } 532 533 if (val) { 534 lpcr |= LPCR_LD; 535 } else { 536 lpcr &= ~LPCR_LD; 537 } 538 ppc_store_lpcr(cpu, lpcr); 539 } 540 541 static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val, 542 Error **errp) 543 { 544 ERRP_GUARD(); 545 uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist(); 546 547 if (tcg_enabled() && val) { 548 /* TCG doesn't implement anything here, but allow with a warning */ 549 warn_report("TCG doesn't support requested feature, cap-ccf-assist=on"); 550 } else if (kvm_enabled() && (val > kvm_val)) { 551 uint8_t kvm_ibs = kvmppc_get_cap_safe_indirect_branch(); 552 553 if (kvm_ibs == SPAPR_CAP_FIXED_CCD) { 554 /* 555 * If we don't have CCF assist on the host, the assist 556 * instruction is a harmless no-op. It won't correctly 557 * implement the cache count flush *but* if we have 558 * count-cache-disabled in the host, that flush is 559 * unnnecessary. So, specifically allow this case. This 560 * allows us to have better performance on POWER9 DD2.3, 561 * while still working on POWER9 DD2.2 and POWER8 host 562 * cpus. 563 */ 564 return; 565 } 566 error_setg(errp, 567 "Requested count cache flush assist capability level not supported by KVM"); 568 error_append_hint(errp, "Try appending -machine cap-ccf-assist=off\n"); 569 } 570 } 571 572 static void cap_fwnmi_apply(SpaprMachineState *spapr, uint8_t val, 573 Error **errp) 574 { 575 ERRP_GUARD(); 576 if (!val) { 577 return; /* Disabled by default */ 578 } 579 580 if (kvm_enabled()) { 581 if (!kvmppc_get_fwnmi()) { 582 error_setg(errp, 583 "Firmware Assisted Non-Maskable Interrupts(FWNMI) not supported by KVM."); 584 error_append_hint(errp, "Try appending -machine cap-fwnmi=off\n"); 585 } 586 } 587 } 588 589 static void cap_rpt_invalidate_apply(SpaprMachineState *spapr, 590 uint8_t val, Error **errp) 591 { 592 ERRP_GUARD(); 593 594 if (!val) { 595 /* capability disabled by default */ 596 return; 597 } 598 599 if (tcg_enabled()) { 600 error_setg(errp, "No H_RPT_INVALIDATE support in TCG"); 601 error_append_hint(errp, 602 "Try appending -machine cap-rpt-invalidate=off\n"); 603 } else if (kvm_enabled()) { 604 if (!kvmppc_has_cap_mmu_radix()) { 605 error_setg(errp, "H_RPT_INVALIDATE only supported on Radix"); 606 return; 607 } 608 609 if (!kvmppc_has_cap_rpt_invalidate()) { 610 error_setg(errp, 611 "KVM implementation does not support H_RPT_INVALIDATE"); 612 error_append_hint(errp, 613 "Try appending -machine cap-rpt-invalidate=off\n"); 614 } else { 615 kvmppc_enable_h_rpt_invalidate(); 616 } 617 } 618 } 619 620 SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = { 621 [SPAPR_CAP_HTM] = { 622 .name = "htm", 623 .description = "Allow Hardware Transactional Memory (HTM)", 624 .index = SPAPR_CAP_HTM, 625 .get = spapr_cap_get_bool, 626 .set = spapr_cap_set_bool, 627 .type = "bool", 628 .apply = cap_htm_apply, 629 }, 630 [SPAPR_CAP_VSX] = { 631 .name = "vsx", 632 .description = "Allow Vector Scalar Extensions (VSX)", 633 .index = SPAPR_CAP_VSX, 634 .get = spapr_cap_get_bool, 635 .set = spapr_cap_set_bool, 636 .type = "bool", 637 .apply = cap_vsx_apply, 638 }, 639 [SPAPR_CAP_DFP] = { 640 .name = "dfp", 641 .description = "Allow Decimal Floating Point (DFP)", 642 .index = SPAPR_CAP_DFP, 643 .get = spapr_cap_get_bool, 644 .set = spapr_cap_set_bool, 645 .type = "bool", 646 .apply = cap_dfp_apply, 647 }, 648 [SPAPR_CAP_CFPC] = { 649 .name = "cfpc", 650 .description = "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE, 651 .index = SPAPR_CAP_CFPC, 652 .get = spapr_cap_get_string, 653 .set = spapr_cap_set_string, 654 .type = "string", 655 .possible = &cap_cfpc_possible, 656 .apply = cap_safe_cache_apply, 657 }, 658 [SPAPR_CAP_SBBC] = { 659 .name = "sbbc", 660 .description = "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE, 661 .index = SPAPR_CAP_SBBC, 662 .get = spapr_cap_get_string, 663 .set = spapr_cap_set_string, 664 .type = "string", 665 .possible = &cap_sbbc_possible, 666 .apply = cap_safe_bounds_check_apply, 667 }, 668 [SPAPR_CAP_IBS] = { 669 .name = "ibs", 670 .description = 671 "Indirect Branch Speculation (broken, workaround, fixed-ibs," 672 "fixed-ccd, fixed-na)", 673 .index = SPAPR_CAP_IBS, 674 .get = spapr_cap_get_string, 675 .set = spapr_cap_set_string, 676 .type = "string", 677 .possible = &cap_ibs_possible, 678 .apply = cap_safe_indirect_branch_apply, 679 }, 680 [SPAPR_CAP_HPT_MAXPAGESIZE] = { 681 .name = "hpt-max-page-size", 682 .description = "Maximum page size for Hash Page Table guests", 683 .index = SPAPR_CAP_HPT_MAXPAGESIZE, 684 .get = spapr_cap_get_pagesize, 685 .set = spapr_cap_set_pagesize, 686 .type = "int", 687 .apply = cap_hpt_maxpagesize_apply, 688 .cpu_apply = cap_hpt_maxpagesize_cpu_apply, 689 .migrate_needed = cap_hpt_maxpagesize_migrate_needed, 690 }, 691 [SPAPR_CAP_NESTED_KVM_HV] = { 692 .name = "nested-hv", 693 .description = "Allow Nested KVM-HV", 694 .index = SPAPR_CAP_NESTED_KVM_HV, 695 .get = spapr_cap_get_bool, 696 .set = spapr_cap_set_bool, 697 .type = "bool", 698 .apply = cap_nested_kvm_hv_apply, 699 }, 700 [SPAPR_CAP_LARGE_DECREMENTER] = { 701 .name = "large-decr", 702 .description = "Allow Large Decrementer", 703 .index = SPAPR_CAP_LARGE_DECREMENTER, 704 .get = spapr_cap_get_bool, 705 .set = spapr_cap_set_bool, 706 .type = "bool", 707 .apply = cap_large_decr_apply, 708 .cpu_apply = cap_large_decr_cpu_apply, 709 }, 710 [SPAPR_CAP_CCF_ASSIST] = { 711 .name = "ccf-assist", 712 .description = "Count Cache Flush Assist via HW Instruction", 713 .index = SPAPR_CAP_CCF_ASSIST, 714 .get = spapr_cap_get_bool, 715 .set = spapr_cap_set_bool, 716 .type = "bool", 717 .apply = cap_ccf_assist_apply, 718 }, 719 [SPAPR_CAP_FWNMI] = { 720 .name = "fwnmi", 721 .description = "Implements PAPR FWNMI option", 722 .index = SPAPR_CAP_FWNMI, 723 .get = spapr_cap_get_bool, 724 .set = spapr_cap_set_bool, 725 .type = "bool", 726 .apply = cap_fwnmi_apply, 727 }, 728 [SPAPR_CAP_RPT_INVALIDATE] = { 729 .name = "rpt-invalidate", 730 .description = "Allow H_RPT_INVALIDATE", 731 .index = SPAPR_CAP_RPT_INVALIDATE, 732 .get = spapr_cap_get_bool, 733 .set = spapr_cap_set_bool, 734 .type = "bool", 735 .apply = cap_rpt_invalidate_apply, 736 }, 737 }; 738 739 static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr, 740 const char *cputype) 741 { 742 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); 743 SpaprCapabilities caps; 744 745 caps = smc->default_caps; 746 747 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_3_00, 748 0, spapr->max_compat_pvr)) { 749 caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF; 750 } 751 752 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07, 753 0, spapr->max_compat_pvr)) { 754 caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF; 755 caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN; 756 } 757 758 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS, 759 0, spapr->max_compat_pvr)) { 760 caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN; 761 } 762 763 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06, 764 0, spapr->max_compat_pvr)) { 765 caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF; 766 caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF; 767 caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN; 768 } 769 770 /* This is for pseries-2.12 and older */ 771 if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) { 772 uint8_t mps; 773 774 if (kvmppc_hpt_needs_host_contiguous_pages()) { 775 mps = ctz64(qemu_minrampagesize()); 776 } else { 777 mps = 34; /* allow everything up to 16GiB, i.e. everything */ 778 } 779 780 caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = mps; 781 } 782 783 return caps; 784 } 785 786 int spapr_caps_pre_load(void *opaque) 787 { 788 SpaprMachineState *spapr = opaque; 789 790 /* Set to default so we can tell if this came in with the migration */ 791 spapr->mig = spapr->def; 792 return 0; 793 } 794 795 int spapr_caps_pre_save(void *opaque) 796 { 797 SpaprMachineState *spapr = opaque; 798 799 spapr->mig = spapr->eff; 800 return 0; 801 } 802 803 /* This has to be called from the top-level spapr post_load, not the 804 * caps specific one. Otherwise it wouldn't be called when the source 805 * caps are all defaults, which could still conflict with overridden 806 * caps on the destination */ 807 int spapr_caps_post_migration(SpaprMachineState *spapr) 808 { 809 int i; 810 bool ok = true; 811 SpaprCapabilities dstcaps = spapr->eff; 812 SpaprCapabilities srccaps; 813 814 srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type); 815 for (i = 0; i < SPAPR_CAP_NUM; i++) { 816 /* If not default value then assume came in with the migration */ 817 if (spapr->mig.caps[i] != spapr->def.caps[i]) { 818 srccaps.caps[i] = spapr->mig.caps[i]; 819 } 820 } 821 822 for (i = 0; i < SPAPR_CAP_NUM; i++) { 823 SpaprCapabilityInfo *info = &capability_table[i]; 824 825 if (srccaps.caps[i] > dstcaps.caps[i]) { 826 error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)", 827 info->name, srccaps.caps[i], dstcaps.caps[i]); 828 ok = false; 829 } 830 831 if (srccaps.caps[i] < dstcaps.caps[i]) { 832 warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)", 833 info->name, srccaps.caps[i], dstcaps.caps[i]); 834 } 835 } 836 837 return ok ? 0 : -EINVAL; 838 } 839 840 /* Used to generate the migration field and needed function for a spapr cap */ 841 #define SPAPR_CAP_MIG_STATE(sname, cap) \ 842 static bool spapr_cap_##sname##_needed(void *opaque) \ 843 { \ 844 SpaprMachineState *spapr = opaque; \ 845 bool (*needed)(void *opaque) = \ 846 capability_table[cap].migrate_needed; \ 847 \ 848 return needed ? needed(opaque) : true && \ 849 spapr->cmd_line_caps[cap] && \ 850 (spapr->eff.caps[cap] != \ 851 spapr->def.caps[cap]); \ 852 } \ 853 \ 854 const VMStateDescription vmstate_spapr_cap_##sname = { \ 855 .name = "spapr/cap/" #sname, \ 856 .version_id = 1, \ 857 .minimum_version_id = 1, \ 858 .needed = spapr_cap_##sname##_needed, \ 859 .fields = (VMStateField[]) { \ 860 VMSTATE_UINT8(mig.caps[cap], \ 861 SpaprMachineState), \ 862 VMSTATE_END_OF_LIST() \ 863 }, \ 864 } 865 866 SPAPR_CAP_MIG_STATE(htm, SPAPR_CAP_HTM); 867 SPAPR_CAP_MIG_STATE(vsx, SPAPR_CAP_VSX); 868 SPAPR_CAP_MIG_STATE(dfp, SPAPR_CAP_DFP); 869 SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC); 870 SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC); 871 SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS); 872 SPAPR_CAP_MIG_STATE(hpt_maxpagesize, SPAPR_CAP_HPT_MAXPAGESIZE); 873 SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV); 874 SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER); 875 SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST); 876 SPAPR_CAP_MIG_STATE(fwnmi, SPAPR_CAP_FWNMI); 877 SPAPR_CAP_MIG_STATE(rpt_invalidate, SPAPR_CAP_RPT_INVALIDATE); 878 879 void spapr_caps_init(SpaprMachineState *spapr) 880 { 881 SpaprCapabilities default_caps; 882 int i; 883 884 /* Compute the actual set of caps we should run with */ 885 default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type); 886 887 for (i = 0; i < SPAPR_CAP_NUM; i++) { 888 /* Store the defaults */ 889 spapr->def.caps[i] = default_caps.caps[i]; 890 /* If not set on the command line then apply the default value */ 891 if (!spapr->cmd_line_caps[i]) { 892 spapr->eff.caps[i] = default_caps.caps[i]; 893 } 894 } 895 } 896 897 void spapr_caps_apply(SpaprMachineState *spapr) 898 { 899 int i; 900 901 for (i = 0; i < SPAPR_CAP_NUM; i++) { 902 SpaprCapabilityInfo *info = &capability_table[i]; 903 904 /* 905 * If the apply function can't set the desired level and thinks it's 906 * fatal, it should cause that. 907 */ 908 info->apply(spapr, spapr->eff.caps[i], &error_fatal); 909 } 910 } 911 912 void spapr_caps_cpu_apply(SpaprMachineState *spapr, PowerPCCPU *cpu) 913 { 914 int i; 915 916 for (i = 0; i < SPAPR_CAP_NUM; i++) { 917 SpaprCapabilityInfo *info = &capability_table[i]; 918 919 /* 920 * If the apply function can't set the desired level and thinks it's 921 * fatal, it should cause that. 922 */ 923 if (info->cpu_apply) { 924 info->cpu_apply(spapr, cpu, spapr->eff.caps[i], &error_fatal); 925 } 926 } 927 } 928 929 void spapr_caps_add_properties(SpaprMachineClass *smc) 930 { 931 ObjectClass *klass = OBJECT_CLASS(smc); 932 int i; 933 934 for (i = 0; i < ARRAY_SIZE(capability_table); i++) { 935 SpaprCapabilityInfo *cap = &capability_table[i]; 936 char *name = g_strdup_printf("cap-%s", cap->name); 937 char *desc; 938 939 object_class_property_add(klass, name, cap->type, 940 cap->get, cap->set, 941 NULL, cap); 942 943 desc = g_strdup_printf("%s", cap->description); 944 object_class_property_set_description(klass, name, desc); 945 g_free(name); 946 g_free(desc); 947 } 948 } 949