1 /* 2 * QEMU PowerPC pSeries Logical Partition capabilities handling 3 * 4 * Copyright (c) 2017 David Gibson, Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/error-report.h" 27 #include "qapi/error.h" 28 #include "qapi/visitor.h" 29 #include "sysemu/hw_accel.h" 30 #include "exec/ram_addr.h" 31 #include "target/ppc/cpu.h" 32 #include "target/ppc/mmu-hash64.h" 33 #include "cpu-models.h" 34 #include "kvm_ppc.h" 35 #include "sysemu/qtest.h" 36 #include "sysemu/tcg.h" 37 38 #include "hw/ppc/spapr.h" 39 40 typedef struct SpaprCapPossible { 41 int num; /* size of vals array below */ 42 const char *help; /* help text for vals */ 43 /* 44 * Note: 45 * - because of the way compatibility is determined vals MUST be ordered 46 * such that later options are a superset of all preceding options. 47 * - the order of vals must be preserved, that is their index is important, 48 * however vals may be added to the end of the list so long as the above 49 * point is observed 50 */ 51 const char *vals[]; 52 } SpaprCapPossible; 53 54 typedef struct SpaprCapabilityInfo { 55 const char *name; 56 const char *description; 57 int index; 58 59 /* Getter and Setter Function Pointers */ 60 ObjectPropertyAccessor *get; 61 ObjectPropertyAccessor *set; 62 const char *type; 63 /* Possible values if this is a custom string type */ 64 SpaprCapPossible *possible; 65 /* Make sure the virtual hardware can support this capability */ 66 void (*apply)(SpaprMachineState *spapr, uint8_t val, Error **errp); 67 void (*cpu_apply)(SpaprMachineState *spapr, PowerPCCPU *cpu, 68 uint8_t val, Error **errp); 69 bool (*migrate_needed)(void *opaque); 70 } SpaprCapabilityInfo; 71 72 static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name, 73 void *opaque, Error **errp) 74 { 75 SpaprCapabilityInfo *cap = opaque; 76 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 77 bool value = spapr_get_cap(spapr, cap->index) == SPAPR_CAP_ON; 78 79 visit_type_bool(v, name, &value, errp); 80 } 81 82 static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name, 83 void *opaque, Error **errp) 84 { 85 SpaprCapabilityInfo *cap = opaque; 86 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 87 bool value; 88 Error *local_err = NULL; 89 90 visit_type_bool(v, name, &value, &local_err); 91 if (local_err) { 92 error_propagate(errp, local_err); 93 return; 94 } 95 96 spapr->cmd_line_caps[cap->index] = true; 97 spapr->eff.caps[cap->index] = value ? SPAPR_CAP_ON : SPAPR_CAP_OFF; 98 } 99 100 101 static void spapr_cap_get_string(Object *obj, Visitor *v, const char *name, 102 void *opaque, Error **errp) 103 { 104 SpaprCapabilityInfo *cap = opaque; 105 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 106 char *val = NULL; 107 uint8_t value = spapr_get_cap(spapr, cap->index); 108 109 if (value >= cap->possible->num) { 110 error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name); 111 return; 112 } 113 114 val = g_strdup(cap->possible->vals[value]); 115 116 visit_type_str(v, name, &val, errp); 117 g_free(val); 118 } 119 120 static void spapr_cap_set_string(Object *obj, Visitor *v, const char *name, 121 void *opaque, Error **errp) 122 { 123 SpaprCapabilityInfo *cap = opaque; 124 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 125 Error *local_err = NULL; 126 uint8_t i; 127 char *val; 128 129 visit_type_str(v, name, &val, &local_err); 130 if (local_err) { 131 error_propagate(errp, local_err); 132 return; 133 } 134 135 if (!strcmp(val, "?")) { 136 error_setg(errp, "%s", cap->possible->help); 137 goto out; 138 } 139 for (i = 0; i < cap->possible->num; i++) { 140 if (!strcasecmp(val, cap->possible->vals[i])) { 141 spapr->cmd_line_caps[cap->index] = true; 142 spapr->eff.caps[cap->index] = i; 143 goto out; 144 } 145 } 146 147 error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val, 148 cap->name); 149 out: 150 g_free(val); 151 } 152 153 static void spapr_cap_get_pagesize(Object *obj, Visitor *v, const char *name, 154 void *opaque, Error **errp) 155 { 156 SpaprCapabilityInfo *cap = opaque; 157 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 158 uint8_t val = spapr_get_cap(spapr, cap->index); 159 uint64_t pagesize = (1ULL << val); 160 161 visit_type_size(v, name, &pagesize, errp); 162 } 163 164 static void spapr_cap_set_pagesize(Object *obj, Visitor *v, const char *name, 165 void *opaque, Error **errp) 166 { 167 SpaprCapabilityInfo *cap = opaque; 168 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 169 uint64_t pagesize; 170 uint8_t val; 171 Error *local_err = NULL; 172 173 visit_type_size(v, name, &pagesize, &local_err); 174 if (local_err) { 175 error_propagate(errp, local_err); 176 return; 177 } 178 179 if (!is_power_of_2(pagesize)) { 180 error_setg(errp, "cap-%s must be a power of 2", cap->name); 181 return; 182 } 183 184 val = ctz64(pagesize); 185 spapr->cmd_line_caps[cap->index] = true; 186 spapr->eff.caps[cap->index] = val; 187 } 188 189 static void cap_htm_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 190 { 191 if (!val) { 192 /* TODO: We don't support disabling htm yet */ 193 return; 194 } 195 if (tcg_enabled()) { 196 error_setg(errp, 197 "No Transactional Memory support in TCG, try cap-htm=off"); 198 } else if (kvm_enabled() && !kvmppc_has_cap_htm()) { 199 error_setg(errp, 200 "KVM implementation does not support Transactional Memory, try cap-htm=off" 201 ); 202 } 203 } 204 205 static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 206 { 207 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 208 CPUPPCState *env = &cpu->env; 209 210 if (!val) { 211 /* TODO: We don't support disabling vsx yet */ 212 return; 213 } 214 /* Allowable CPUs in spapr_cpu_core.c should already have gotten 215 * rid of anything that doesn't do VMX */ 216 g_assert(env->insns_flags & PPC_ALTIVEC); 217 if (!(env->insns_flags2 & PPC2_VSX)) { 218 error_setg(errp, "VSX support not available, try cap-vsx=off"); 219 } 220 } 221 222 static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 223 { 224 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 225 CPUPPCState *env = &cpu->env; 226 227 if (!val) { 228 /* TODO: We don't support disabling dfp yet */ 229 return; 230 } 231 if (!(env->insns_flags2 & PPC2_DFP)) { 232 error_setg(errp, "DFP support not available, try cap-dfp=off"); 233 } 234 } 235 236 SpaprCapPossible cap_cfpc_possible = { 237 .num = 3, 238 .vals = {"broken", "workaround", "fixed"}, 239 .help = "broken - no protection, workaround - workaround available," 240 " fixed - fixed in hardware", 241 }; 242 243 static void cap_safe_cache_apply(SpaprMachineState *spapr, uint8_t val, 244 Error **errp) 245 { 246 Error *local_err = NULL; 247 uint8_t kvm_val = kvmppc_get_cap_safe_cache(); 248 249 if (tcg_enabled() && val) { 250 /* TCG only supports broken, allow other values and print a warning */ 251 error_setg(&local_err, 252 "TCG doesn't support requested feature, cap-cfpc=%s", 253 cap_cfpc_possible.vals[val]); 254 } else if (kvm_enabled() && (val > kvm_val)) { 255 error_setg(errp, 256 "Requested safe cache capability level not supported by kvm, try cap-cfpc=%s", 257 cap_cfpc_possible.vals[kvm_val]); 258 } 259 260 if (local_err != NULL) 261 warn_report_err(local_err); 262 } 263 264 SpaprCapPossible cap_sbbc_possible = { 265 .num = 3, 266 .vals = {"broken", "workaround", "fixed"}, 267 .help = "broken - no protection, workaround - workaround available," 268 " fixed - fixed in hardware", 269 }; 270 271 static void cap_safe_bounds_check_apply(SpaprMachineState *spapr, uint8_t val, 272 Error **errp) 273 { 274 Error *local_err = NULL; 275 uint8_t kvm_val = kvmppc_get_cap_safe_bounds_check(); 276 277 if (tcg_enabled() && val) { 278 /* TCG only supports broken, allow other values and print a warning */ 279 error_setg(&local_err, 280 "TCG doesn't support requested feature, cap-sbbc=%s", 281 cap_sbbc_possible.vals[val]); 282 } else if (kvm_enabled() && (val > kvm_val)) { 283 error_setg(errp, 284 "Requested safe bounds check capability level not supported by kvm, try cap-sbbc=%s", 285 cap_sbbc_possible.vals[kvm_val]); 286 } 287 288 if (local_err != NULL) 289 warn_report_err(local_err); 290 } 291 292 SpaprCapPossible cap_ibs_possible = { 293 .num = 5, 294 /* Note workaround only maintained for compatibility */ 295 .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"}, 296 .help = "broken - no protection, workaround - count cache flush" 297 ", fixed-ibs - indirect branch serialisation," 298 " fixed-ccd - cache count disabled," 299 " fixed-na - fixed in hardware (no longer applicable)", 300 }; 301 302 static void cap_safe_indirect_branch_apply(SpaprMachineState *spapr, 303 uint8_t val, Error **errp) 304 { 305 Error *local_err = NULL; 306 uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch(); 307 308 if (tcg_enabled() && val) { 309 /* TCG only supports broken, allow other values and print a warning */ 310 error_setg(&local_err, 311 "TCG doesn't support requested feature, cap-ibs=%s", 312 cap_ibs_possible.vals[val]); 313 } else if (kvm_enabled() && (val > kvm_val)) { 314 error_setg(errp, 315 "Requested safe indirect branch capability level not supported by kvm, try cap-ibs=%s", 316 cap_ibs_possible.vals[kvm_val]); 317 } 318 319 if (local_err != NULL) { 320 warn_report_err(local_err); 321 } 322 } 323 324 #define VALUE_DESC_TRISTATE " (broken, workaround, fixed)" 325 326 void spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize, 327 Error **errp) 328 { 329 hwaddr maxpagesize = (1ULL << spapr->eff.caps[SPAPR_CAP_HPT_MAXPAGESIZE]); 330 331 if (!kvmppc_hpt_needs_host_contiguous_pages()) { 332 return; 333 } 334 335 if (maxpagesize > pagesize) { 336 error_setg(errp, 337 "Can't support %"HWADDR_PRIu" kiB guest pages with %" 338 HWADDR_PRIu" kiB host pages with this KVM implementation", 339 maxpagesize >> 10, pagesize >> 10); 340 } 341 } 342 343 static void cap_hpt_maxpagesize_apply(SpaprMachineState *spapr, 344 uint8_t val, Error **errp) 345 { 346 if (val < 12) { 347 error_setg(errp, "Require at least 4kiB hpt-max-page-size"); 348 return; 349 } else if (val < 16) { 350 warn_report("Many guests require at least 64kiB hpt-max-page-size"); 351 } 352 353 spapr_check_pagesize(spapr, qemu_minrampagesize(), errp); 354 } 355 356 static bool cap_hpt_maxpagesize_migrate_needed(void *opaque) 357 { 358 return !SPAPR_MACHINE_GET_CLASS(opaque)->pre_4_1_migration; 359 } 360 361 static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift, 362 uint32_t pshift) 363 { 364 unsigned maxshift = *((unsigned *)opaque); 365 366 assert(pshift >= seg_pshift); 367 368 /* Don't allow the guest to use pages bigger than the configured 369 * maximum size */ 370 if (pshift > maxshift) { 371 return false; 372 } 373 374 /* For whatever reason, KVM doesn't allow multiple pagesizes 375 * within a segment, *except* for the case of 16M pages in a 4k or 376 * 64k segment. Always exclude other cases, so that TCG and KVM 377 * guests see a consistent environment */ 378 if ((pshift != seg_pshift) && (pshift != 24)) { 379 return false; 380 } 381 382 return true; 383 } 384 385 static void cap_hpt_maxpagesize_cpu_apply(SpaprMachineState *spapr, 386 PowerPCCPU *cpu, 387 uint8_t val, Error **errp) 388 { 389 unsigned maxshift = val; 390 391 ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift); 392 } 393 394 static void cap_nested_kvm_hv_apply(SpaprMachineState *spapr, 395 uint8_t val, Error **errp) 396 { 397 if (!val) { 398 /* capability disabled by default */ 399 return; 400 } 401 402 if (tcg_enabled()) { 403 error_setg(errp, 404 "No Nested KVM-HV support in tcg, try cap-nested-hv=off"); 405 } else if (kvm_enabled()) { 406 if (!kvmppc_has_cap_nested_kvm_hv()) { 407 error_setg(errp, 408 "KVM implementation does not support Nested KVM-HV, try cap-nested-hv=off"); 409 } else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) { 410 error_setg(errp, 411 "Error enabling cap-nested-hv with KVM, try cap-nested-hv=off"); 412 } 413 } 414 } 415 416 static void cap_large_decr_apply(SpaprMachineState *spapr, 417 uint8_t val, Error **errp) 418 { 419 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 420 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); 421 422 if (!val) { 423 return; /* Disabled by default */ 424 } 425 426 if (tcg_enabled()) { 427 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, 428 spapr->max_compat_pvr)) { 429 error_setg(errp, 430 "Large decrementer only supported on POWER9, try -cpu POWER9"); 431 return; 432 } 433 } else if (kvm_enabled()) { 434 int kvm_nr_bits = kvmppc_get_cap_large_decr(); 435 436 if (!kvm_nr_bits) { 437 error_setg(errp, 438 "No large decrementer support, try cap-large-decr=off"); 439 } else if (pcc->lrg_decr_bits != kvm_nr_bits) { 440 error_setg(errp, 441 "KVM large decrementer size (%d) differs to model (%d), try -cap-large-decr=off", 442 kvm_nr_bits, pcc->lrg_decr_bits); 443 } 444 } 445 } 446 447 static void cap_large_decr_cpu_apply(SpaprMachineState *spapr, 448 PowerPCCPU *cpu, 449 uint8_t val, Error **errp) 450 { 451 CPUPPCState *env = &cpu->env; 452 target_ulong lpcr = env->spr[SPR_LPCR]; 453 454 if (kvm_enabled()) { 455 if (kvmppc_enable_cap_large_decr(cpu, val)) { 456 error_setg(errp, 457 "No large decrementer support, try cap-large-decr=off"); 458 } 459 } 460 461 if (val) { 462 lpcr |= LPCR_LD; 463 } else { 464 lpcr &= ~LPCR_LD; 465 } 466 ppc_store_lpcr(cpu, lpcr); 467 } 468 469 static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val, 470 Error **errp) 471 { 472 uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist(); 473 474 if (tcg_enabled() && val) { 475 /* TODO - for now only allow broken for TCG */ 476 error_setg(errp, 477 "Requested count cache flush assist capability level not supported by tcg, try cap-ccf-assist=off"); 478 } else if (kvm_enabled() && (val > kvm_val)) { 479 error_setg(errp, 480 "Requested count cache flush assist capability level not supported by kvm, try cap-ccf-assist=off"); 481 } 482 } 483 484 SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = { 485 [SPAPR_CAP_HTM] = { 486 .name = "htm", 487 .description = "Allow Hardware Transactional Memory (HTM)", 488 .index = SPAPR_CAP_HTM, 489 .get = spapr_cap_get_bool, 490 .set = spapr_cap_set_bool, 491 .type = "bool", 492 .apply = cap_htm_apply, 493 }, 494 [SPAPR_CAP_VSX] = { 495 .name = "vsx", 496 .description = "Allow Vector Scalar Extensions (VSX)", 497 .index = SPAPR_CAP_VSX, 498 .get = spapr_cap_get_bool, 499 .set = spapr_cap_set_bool, 500 .type = "bool", 501 .apply = cap_vsx_apply, 502 }, 503 [SPAPR_CAP_DFP] = { 504 .name = "dfp", 505 .description = "Allow Decimal Floating Point (DFP)", 506 .index = SPAPR_CAP_DFP, 507 .get = spapr_cap_get_bool, 508 .set = spapr_cap_set_bool, 509 .type = "bool", 510 .apply = cap_dfp_apply, 511 }, 512 [SPAPR_CAP_CFPC] = { 513 .name = "cfpc", 514 .description = "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE, 515 .index = SPAPR_CAP_CFPC, 516 .get = spapr_cap_get_string, 517 .set = spapr_cap_set_string, 518 .type = "string", 519 .possible = &cap_cfpc_possible, 520 .apply = cap_safe_cache_apply, 521 }, 522 [SPAPR_CAP_SBBC] = { 523 .name = "sbbc", 524 .description = "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE, 525 .index = SPAPR_CAP_SBBC, 526 .get = spapr_cap_get_string, 527 .set = spapr_cap_set_string, 528 .type = "string", 529 .possible = &cap_sbbc_possible, 530 .apply = cap_safe_bounds_check_apply, 531 }, 532 [SPAPR_CAP_IBS] = { 533 .name = "ibs", 534 .description = 535 "Indirect Branch Speculation (broken, workaround, fixed-ibs," 536 "fixed-ccd, fixed-na)", 537 .index = SPAPR_CAP_IBS, 538 .get = spapr_cap_get_string, 539 .set = spapr_cap_set_string, 540 .type = "string", 541 .possible = &cap_ibs_possible, 542 .apply = cap_safe_indirect_branch_apply, 543 }, 544 [SPAPR_CAP_HPT_MAXPAGESIZE] = { 545 .name = "hpt-max-page-size", 546 .description = "Maximum page size for Hash Page Table guests", 547 .index = SPAPR_CAP_HPT_MAXPAGESIZE, 548 .get = spapr_cap_get_pagesize, 549 .set = spapr_cap_set_pagesize, 550 .type = "int", 551 .apply = cap_hpt_maxpagesize_apply, 552 .cpu_apply = cap_hpt_maxpagesize_cpu_apply, 553 .migrate_needed = cap_hpt_maxpagesize_migrate_needed, 554 }, 555 [SPAPR_CAP_NESTED_KVM_HV] = { 556 .name = "nested-hv", 557 .description = "Allow Nested KVM-HV", 558 .index = SPAPR_CAP_NESTED_KVM_HV, 559 .get = spapr_cap_get_bool, 560 .set = spapr_cap_set_bool, 561 .type = "bool", 562 .apply = cap_nested_kvm_hv_apply, 563 }, 564 [SPAPR_CAP_LARGE_DECREMENTER] = { 565 .name = "large-decr", 566 .description = "Allow Large Decrementer", 567 .index = SPAPR_CAP_LARGE_DECREMENTER, 568 .get = spapr_cap_get_bool, 569 .set = spapr_cap_set_bool, 570 .type = "bool", 571 .apply = cap_large_decr_apply, 572 .cpu_apply = cap_large_decr_cpu_apply, 573 }, 574 [SPAPR_CAP_CCF_ASSIST] = { 575 .name = "ccf-assist", 576 .description = "Count Cache Flush Assist via HW Instruction", 577 .index = SPAPR_CAP_CCF_ASSIST, 578 .get = spapr_cap_get_bool, 579 .set = spapr_cap_set_bool, 580 .type = "bool", 581 .apply = cap_ccf_assist_apply, 582 }, 583 }; 584 585 static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr, 586 const char *cputype) 587 { 588 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); 589 SpaprCapabilities caps; 590 591 caps = smc->default_caps; 592 593 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_3_00, 594 0, spapr->max_compat_pvr)) { 595 caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF; 596 } 597 598 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07, 599 0, spapr->max_compat_pvr)) { 600 caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF; 601 caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN; 602 } 603 604 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS, 605 0, spapr->max_compat_pvr)) { 606 caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN; 607 } 608 609 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06, 610 0, spapr->max_compat_pvr)) { 611 caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF; 612 caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF; 613 caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN; 614 } 615 616 /* This is for pseries-2.12 and older */ 617 if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) { 618 uint8_t mps; 619 620 if (kvmppc_hpt_needs_host_contiguous_pages()) { 621 mps = ctz64(qemu_minrampagesize()); 622 } else { 623 mps = 34; /* allow everything up to 16GiB, i.e. everything */ 624 } 625 626 caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = mps; 627 } 628 629 return caps; 630 } 631 632 int spapr_caps_pre_load(void *opaque) 633 { 634 SpaprMachineState *spapr = opaque; 635 636 /* Set to default so we can tell if this came in with the migration */ 637 spapr->mig = spapr->def; 638 return 0; 639 } 640 641 int spapr_caps_pre_save(void *opaque) 642 { 643 SpaprMachineState *spapr = opaque; 644 645 spapr->mig = spapr->eff; 646 return 0; 647 } 648 649 /* This has to be called from the top-level spapr post_load, not the 650 * caps specific one. Otherwise it wouldn't be called when the source 651 * caps are all defaults, which could still conflict with overridden 652 * caps on the destination */ 653 int spapr_caps_post_migration(SpaprMachineState *spapr) 654 { 655 int i; 656 bool ok = true; 657 SpaprCapabilities dstcaps = spapr->eff; 658 SpaprCapabilities srccaps; 659 660 srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type); 661 for (i = 0; i < SPAPR_CAP_NUM; i++) { 662 /* If not default value then assume came in with the migration */ 663 if (spapr->mig.caps[i] != spapr->def.caps[i]) { 664 srccaps.caps[i] = spapr->mig.caps[i]; 665 } 666 } 667 668 for (i = 0; i < SPAPR_CAP_NUM; i++) { 669 SpaprCapabilityInfo *info = &capability_table[i]; 670 671 if (srccaps.caps[i] > dstcaps.caps[i]) { 672 error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)", 673 info->name, srccaps.caps[i], dstcaps.caps[i]); 674 ok = false; 675 } 676 677 if (srccaps.caps[i] < dstcaps.caps[i]) { 678 warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)", 679 info->name, srccaps.caps[i], dstcaps.caps[i]); 680 } 681 } 682 683 return ok ? 0 : -EINVAL; 684 } 685 686 /* Used to generate the migration field and needed function for a spapr cap */ 687 #define SPAPR_CAP_MIG_STATE(sname, cap) \ 688 static bool spapr_cap_##sname##_needed(void *opaque) \ 689 { \ 690 SpaprMachineState *spapr = opaque; \ 691 bool (*needed)(void *opaque) = \ 692 capability_table[cap].migrate_needed; \ 693 \ 694 return needed ? needed(opaque) : true && \ 695 spapr->cmd_line_caps[cap] && \ 696 (spapr->eff.caps[cap] != \ 697 spapr->def.caps[cap]); \ 698 } \ 699 \ 700 const VMStateDescription vmstate_spapr_cap_##sname = { \ 701 .name = "spapr/cap/" #sname, \ 702 .version_id = 1, \ 703 .minimum_version_id = 1, \ 704 .needed = spapr_cap_##sname##_needed, \ 705 .fields = (VMStateField[]) { \ 706 VMSTATE_UINT8(mig.caps[cap], \ 707 SpaprMachineState), \ 708 VMSTATE_END_OF_LIST() \ 709 }, \ 710 } 711 712 SPAPR_CAP_MIG_STATE(htm, SPAPR_CAP_HTM); 713 SPAPR_CAP_MIG_STATE(vsx, SPAPR_CAP_VSX); 714 SPAPR_CAP_MIG_STATE(dfp, SPAPR_CAP_DFP); 715 SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC); 716 SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC); 717 SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS); 718 SPAPR_CAP_MIG_STATE(hpt_maxpagesize, SPAPR_CAP_HPT_MAXPAGESIZE); 719 SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV); 720 SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER); 721 SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST); 722 723 void spapr_caps_init(SpaprMachineState *spapr) 724 { 725 SpaprCapabilities default_caps; 726 int i; 727 728 /* Compute the actual set of caps we should run with */ 729 default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type); 730 731 for (i = 0; i < SPAPR_CAP_NUM; i++) { 732 /* Store the defaults */ 733 spapr->def.caps[i] = default_caps.caps[i]; 734 /* If not set on the command line then apply the default value */ 735 if (!spapr->cmd_line_caps[i]) { 736 spapr->eff.caps[i] = default_caps.caps[i]; 737 } 738 } 739 } 740 741 void spapr_caps_apply(SpaprMachineState *spapr) 742 { 743 int i; 744 745 for (i = 0; i < SPAPR_CAP_NUM; i++) { 746 SpaprCapabilityInfo *info = &capability_table[i]; 747 748 /* 749 * If the apply function can't set the desired level and thinks it's 750 * fatal, it should cause that. 751 */ 752 info->apply(spapr, spapr->eff.caps[i], &error_fatal); 753 } 754 } 755 756 void spapr_caps_cpu_apply(SpaprMachineState *spapr, PowerPCCPU *cpu) 757 { 758 int i; 759 760 for (i = 0; i < SPAPR_CAP_NUM; i++) { 761 SpaprCapabilityInfo *info = &capability_table[i]; 762 763 /* 764 * If the apply function can't set the desired level and thinks it's 765 * fatal, it should cause that. 766 */ 767 if (info->cpu_apply) { 768 info->cpu_apply(spapr, cpu, spapr->eff.caps[i], &error_fatal); 769 } 770 } 771 } 772 773 void spapr_caps_add_properties(SpaprMachineClass *smc, Error **errp) 774 { 775 Error *local_err = NULL; 776 ObjectClass *klass = OBJECT_CLASS(smc); 777 int i; 778 779 for (i = 0; i < ARRAY_SIZE(capability_table); i++) { 780 SpaprCapabilityInfo *cap = &capability_table[i]; 781 const char *name = g_strdup_printf("cap-%s", cap->name); 782 char *desc; 783 784 object_class_property_add(klass, name, cap->type, 785 cap->get, cap->set, 786 NULL, cap, &local_err); 787 if (local_err) { 788 error_propagate(errp, local_err); 789 return; 790 } 791 792 desc = g_strdup_printf("%s", cap->description); 793 object_class_property_set_description(klass, name, desc, &local_err); 794 g_free(desc); 795 if (local_err) { 796 error_propagate(errp, local_err); 797 return; 798 } 799 } 800 } 801