1 /* 2 * QEMU PowerPC pSeries Logical Partition capabilities handling 3 * 4 * Copyright (c) 2017 David Gibson, Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qemu/error-report.h" 27 #include "qapi/error.h" 28 #include "qapi/visitor.h" 29 #include "sysemu/hw_accel.h" 30 #include "exec/ram_addr.h" 31 #include "target/ppc/cpu.h" 32 #include "target/ppc/mmu-hash64.h" 33 #include "cpu-models.h" 34 #include "kvm_ppc.h" 35 #include "migration/vmstate.h" 36 #include "sysemu/qtest.h" 37 #include "sysemu/tcg.h" 38 39 #include "hw/ppc/spapr.h" 40 41 typedef struct SpaprCapPossible { 42 int num; /* size of vals array below */ 43 const char *help; /* help text for vals */ 44 /* 45 * Note: 46 * - because of the way compatibility is determined vals MUST be ordered 47 * such that later options are a superset of all preceding options. 48 * - the order of vals must be preserved, that is their index is important, 49 * however vals may be added to the end of the list so long as the above 50 * point is observed 51 */ 52 const char *vals[]; 53 } SpaprCapPossible; 54 55 typedef struct SpaprCapabilityInfo { 56 const char *name; 57 const char *description; 58 int index; 59 60 /* Getter and Setter Function Pointers */ 61 ObjectPropertyAccessor *get; 62 ObjectPropertyAccessor *set; 63 const char *type; 64 /* Possible values if this is a custom string type */ 65 SpaprCapPossible *possible; 66 /* Make sure the virtual hardware can support this capability */ 67 void (*apply)(SpaprMachineState *spapr, uint8_t val, Error **errp); 68 void (*cpu_apply)(SpaprMachineState *spapr, PowerPCCPU *cpu, 69 uint8_t val, Error **errp); 70 bool (*migrate_needed)(void *opaque); 71 } SpaprCapabilityInfo; 72 73 static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name, 74 void *opaque, Error **errp) 75 { 76 SpaprCapabilityInfo *cap = opaque; 77 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 78 bool value = spapr_get_cap(spapr, cap->index) == SPAPR_CAP_ON; 79 80 visit_type_bool(v, name, &value, errp); 81 } 82 83 static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name, 84 void *opaque, Error **errp) 85 { 86 SpaprCapabilityInfo *cap = opaque; 87 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 88 bool value; 89 90 if (!visit_type_bool(v, name, &value, errp)) { 91 return; 92 } 93 94 spapr->cmd_line_caps[cap->index] = true; 95 spapr->eff.caps[cap->index] = value ? SPAPR_CAP_ON : SPAPR_CAP_OFF; 96 } 97 98 99 static void spapr_cap_get_string(Object *obj, Visitor *v, const char *name, 100 void *opaque, Error **errp) 101 { 102 SpaprCapabilityInfo *cap = opaque; 103 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 104 char *val = NULL; 105 uint8_t value = spapr_get_cap(spapr, cap->index); 106 107 if (value >= cap->possible->num) { 108 error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name); 109 return; 110 } 111 112 val = g_strdup(cap->possible->vals[value]); 113 114 visit_type_str(v, name, &val, errp); 115 g_free(val); 116 } 117 118 static void spapr_cap_set_string(Object *obj, Visitor *v, const char *name, 119 void *opaque, Error **errp) 120 { 121 SpaprCapabilityInfo *cap = opaque; 122 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 123 uint8_t i; 124 char *val; 125 126 if (!visit_type_str(v, name, &val, errp)) { 127 return; 128 } 129 130 if (!strcmp(val, "?")) { 131 error_setg(errp, "%s", cap->possible->help); 132 goto out; 133 } 134 for (i = 0; i < cap->possible->num; i++) { 135 if (!strcasecmp(val, cap->possible->vals[i])) { 136 spapr->cmd_line_caps[cap->index] = true; 137 spapr->eff.caps[cap->index] = i; 138 goto out; 139 } 140 } 141 142 error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val, 143 cap->name); 144 out: 145 g_free(val); 146 } 147 148 static void spapr_cap_get_pagesize(Object *obj, Visitor *v, const char *name, 149 void *opaque, Error **errp) 150 { 151 SpaprCapabilityInfo *cap = opaque; 152 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 153 uint8_t val = spapr_get_cap(spapr, cap->index); 154 uint64_t pagesize = (1ULL << val); 155 156 visit_type_size(v, name, &pagesize, errp); 157 } 158 159 static void spapr_cap_set_pagesize(Object *obj, Visitor *v, const char *name, 160 void *opaque, Error **errp) 161 { 162 SpaprCapabilityInfo *cap = opaque; 163 SpaprMachineState *spapr = SPAPR_MACHINE(obj); 164 uint64_t pagesize; 165 uint8_t val; 166 167 if (!visit_type_size(v, name, &pagesize, errp)) { 168 return; 169 } 170 171 if (!is_power_of_2(pagesize)) { 172 error_setg(errp, "cap-%s must be a power of 2", cap->name); 173 return; 174 } 175 176 val = ctz64(pagesize); 177 spapr->cmd_line_caps[cap->index] = true; 178 spapr->eff.caps[cap->index] = val; 179 } 180 181 static void cap_htm_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 182 { 183 ERRP_GUARD(); 184 if (!val) { 185 /* TODO: We don't support disabling htm yet */ 186 return; 187 } 188 if (tcg_enabled()) { 189 error_setg(errp, "No Transactional Memory support in TCG"); 190 error_append_hint(errp, "Try appending -machine cap-htm=off\n"); 191 } else if (kvm_enabled() && !kvmppc_has_cap_htm()) { 192 error_setg(errp, 193 "KVM implementation does not support Transactional Memory"); 194 error_append_hint(errp, "Try appending -machine cap-htm=off\n"); 195 } 196 } 197 198 static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 199 { 200 ERRP_GUARD(); 201 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 202 CPUPPCState *env = &cpu->env; 203 204 if (!val) { 205 /* TODO: We don't support disabling vsx yet */ 206 return; 207 } 208 /* Allowable CPUs in spapr_cpu_core.c should already have gotten 209 * rid of anything that doesn't do VMX */ 210 g_assert(env->insns_flags & PPC_ALTIVEC); 211 if (!(env->insns_flags2 & PPC2_VSX)) { 212 error_setg(errp, "VSX support not available"); 213 error_append_hint(errp, "Try appending -machine cap-vsx=off\n"); 214 } 215 } 216 217 static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp) 218 { 219 ERRP_GUARD(); 220 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 221 CPUPPCState *env = &cpu->env; 222 223 if (!val) { 224 /* TODO: We don't support disabling dfp yet */ 225 return; 226 } 227 if (!(env->insns_flags2 & PPC2_DFP)) { 228 error_setg(errp, "DFP support not available"); 229 error_append_hint(errp, "Try appending -machine cap-dfp=off\n"); 230 } 231 } 232 233 SpaprCapPossible cap_cfpc_possible = { 234 .num = 3, 235 .vals = {"broken", "workaround", "fixed"}, 236 .help = "broken - no protection, workaround - workaround available," 237 " fixed - fixed in hardware", 238 }; 239 240 static void cap_safe_cache_apply(SpaprMachineState *spapr, uint8_t val, 241 Error **errp) 242 { 243 ERRP_GUARD(); 244 uint8_t kvm_val = kvmppc_get_cap_safe_cache(); 245 246 if (tcg_enabled() && val) { 247 /* TCG only supports broken, allow other values and print a warning */ 248 warn_report("TCG doesn't support requested feature, cap-cfpc=%s", 249 cap_cfpc_possible.vals[val]); 250 } else if (kvm_enabled() && (val > kvm_val)) { 251 error_setg(errp, 252 "Requested safe cache capability level not supported by KVM"); 253 error_append_hint(errp, "Try appending -machine cap-cfpc=%s\n", 254 cap_cfpc_possible.vals[kvm_val]); 255 } 256 } 257 258 SpaprCapPossible cap_sbbc_possible = { 259 .num = 3, 260 .vals = {"broken", "workaround", "fixed"}, 261 .help = "broken - no protection, workaround - workaround available," 262 " fixed - fixed in hardware", 263 }; 264 265 static void cap_safe_bounds_check_apply(SpaprMachineState *spapr, uint8_t val, 266 Error **errp) 267 { 268 ERRP_GUARD(); 269 uint8_t kvm_val = kvmppc_get_cap_safe_bounds_check(); 270 271 if (tcg_enabled() && val) { 272 /* TCG only supports broken, allow other values and print a warning */ 273 warn_report("TCG doesn't support requested feature, cap-sbbc=%s", 274 cap_sbbc_possible.vals[val]); 275 } else if (kvm_enabled() && (val > kvm_val)) { 276 error_setg(errp, 277 "Requested safe bounds check capability level not supported by KVM"); 278 error_append_hint(errp, "Try appending -machine cap-sbbc=%s\n", 279 cap_sbbc_possible.vals[kvm_val]); 280 } 281 } 282 283 SpaprCapPossible cap_ibs_possible = { 284 .num = 5, 285 /* Note workaround only maintained for compatibility */ 286 .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"}, 287 .help = "broken - no protection, workaround - count cache flush" 288 ", fixed-ibs - indirect branch serialisation," 289 " fixed-ccd - cache count disabled," 290 " fixed-na - fixed in hardware (no longer applicable)", 291 }; 292 293 static void cap_safe_indirect_branch_apply(SpaprMachineState *spapr, 294 uint8_t val, Error **errp) 295 { 296 ERRP_GUARD(); 297 uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch(); 298 299 if (tcg_enabled() && val) { 300 /* TCG only supports broken, allow other values and print a warning */ 301 warn_report("TCG doesn't support requested feature, cap-ibs=%s", 302 cap_ibs_possible.vals[val]); 303 } else if (kvm_enabled() && (val > kvm_val)) { 304 error_setg(errp, 305 "Requested safe indirect branch capability level not supported by KVM"); 306 error_append_hint(errp, "Try appending -machine cap-ibs=%s\n", 307 cap_ibs_possible.vals[kvm_val]); 308 } 309 } 310 311 #define VALUE_DESC_TRISTATE " (broken, workaround, fixed)" 312 313 void spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize, 314 Error **errp) 315 { 316 hwaddr maxpagesize = (1ULL << spapr->eff.caps[SPAPR_CAP_HPT_MAXPAGESIZE]); 317 318 if (!kvmppc_hpt_needs_host_contiguous_pages()) { 319 return; 320 } 321 322 if (maxpagesize > pagesize) { 323 error_setg(errp, 324 "Can't support %"HWADDR_PRIu" kiB guest pages with %" 325 HWADDR_PRIu" kiB host pages with this KVM implementation", 326 maxpagesize >> 10, pagesize >> 10); 327 } 328 } 329 330 static void cap_hpt_maxpagesize_apply(SpaprMachineState *spapr, 331 uint8_t val, Error **errp) 332 { 333 if (val < 12) { 334 error_setg(errp, "Require at least 4kiB hpt-max-page-size"); 335 return; 336 } else if (val < 16) { 337 warn_report("Many guests require at least 64kiB hpt-max-page-size"); 338 } 339 340 spapr_check_pagesize(spapr, qemu_minrampagesize(), errp); 341 } 342 343 static bool cap_hpt_maxpagesize_migrate_needed(void *opaque) 344 { 345 return !SPAPR_MACHINE_GET_CLASS(opaque)->pre_4_1_migration; 346 } 347 348 static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift, 349 uint32_t pshift) 350 { 351 unsigned maxshift = *((unsigned *)opaque); 352 353 assert(pshift >= seg_pshift); 354 355 /* Don't allow the guest to use pages bigger than the configured 356 * maximum size */ 357 if (pshift > maxshift) { 358 return false; 359 } 360 361 /* For whatever reason, KVM doesn't allow multiple pagesizes 362 * within a segment, *except* for the case of 16M pages in a 4k or 363 * 64k segment. Always exclude other cases, so that TCG and KVM 364 * guests see a consistent environment */ 365 if ((pshift != seg_pshift) && (pshift != 24)) { 366 return false; 367 } 368 369 return true; 370 } 371 372 static void cap_hpt_maxpagesize_cpu_apply(SpaprMachineState *spapr, 373 PowerPCCPU *cpu, 374 uint8_t val, Error **errp) 375 { 376 unsigned maxshift = val; 377 378 ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift); 379 } 380 381 static void cap_nested_kvm_hv_apply(SpaprMachineState *spapr, 382 uint8_t val, Error **errp) 383 { 384 ERRP_GUARD(); 385 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 386 387 if (!val) { 388 /* capability disabled by default */ 389 return; 390 } 391 392 if (tcg_enabled()) { 393 error_setg(errp, "No Nested KVM-HV support in TCG"); 394 error_append_hint(errp, "Try appending -machine cap-nested-hv=off\n"); 395 } else if (kvm_enabled()) { 396 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, 397 spapr->max_compat_pvr)) { 398 error_setg(errp, "Nested KVM-HV only supported on POWER9"); 399 error_append_hint(errp, 400 "Try appending -machine max-cpu-compat=power9\n"); 401 return; 402 } 403 404 if (!kvmppc_has_cap_nested_kvm_hv()) { 405 error_setg(errp, 406 "KVM implementation does not support Nested KVM-HV"); 407 error_append_hint(errp, 408 "Try appending -machine cap-nested-hv=off\n"); 409 } else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) { 410 error_setg(errp, "Error enabling cap-nested-hv with KVM"); 411 error_append_hint(errp, 412 "Try appending -machine cap-nested-hv=off\n"); 413 } 414 } 415 } 416 417 static void cap_large_decr_apply(SpaprMachineState *spapr, 418 uint8_t val, Error **errp) 419 { 420 ERRP_GUARD(); 421 PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 422 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); 423 424 if (!val) { 425 return; /* Disabled by default */ 426 } 427 428 if (tcg_enabled()) { 429 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, 430 spapr->max_compat_pvr)) { 431 error_setg(errp, "Large decrementer only supported on POWER9"); 432 error_append_hint(errp, "Try -cpu POWER9\n"); 433 return; 434 } 435 } else if (kvm_enabled()) { 436 int kvm_nr_bits = kvmppc_get_cap_large_decr(); 437 438 if (!kvm_nr_bits) { 439 error_setg(errp, "No large decrementer support"); 440 error_append_hint(errp, 441 "Try appending -machine cap-large-decr=off\n"); 442 } else if (pcc->lrg_decr_bits != kvm_nr_bits) { 443 error_setg(errp, 444 "KVM large decrementer size (%d) differs to model (%d)", 445 kvm_nr_bits, pcc->lrg_decr_bits); 446 error_append_hint(errp, 447 "Try appending -machine cap-large-decr=off\n"); 448 } 449 } 450 } 451 452 static void cap_large_decr_cpu_apply(SpaprMachineState *spapr, 453 PowerPCCPU *cpu, 454 uint8_t val, Error **errp) 455 { 456 ERRP_GUARD(); 457 CPUPPCState *env = &cpu->env; 458 target_ulong lpcr = env->spr[SPR_LPCR]; 459 460 if (kvm_enabled()) { 461 if (kvmppc_enable_cap_large_decr(cpu, val)) { 462 error_setg(errp, "No large decrementer support"); 463 error_append_hint(errp, 464 "Try appending -machine cap-large-decr=off\n"); 465 } 466 } 467 468 if (val) { 469 lpcr |= LPCR_LD; 470 } else { 471 lpcr &= ~LPCR_LD; 472 } 473 ppc_store_lpcr(cpu, lpcr); 474 } 475 476 static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val, 477 Error **errp) 478 { 479 ERRP_GUARD(); 480 uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist(); 481 482 if (tcg_enabled() && val) { 483 /* TCG doesn't implement anything here, but allow with a warning */ 484 warn_report("TCG doesn't support requested feature, cap-ccf-assist=on"); 485 } else if (kvm_enabled() && (val > kvm_val)) { 486 uint8_t kvm_ibs = kvmppc_get_cap_safe_indirect_branch(); 487 488 if (kvm_ibs == SPAPR_CAP_FIXED_CCD) { 489 /* 490 * If we don't have CCF assist on the host, the assist 491 * instruction is a harmless no-op. It won't correctly 492 * implement the cache count flush *but* if we have 493 * count-cache-disabled in the host, that flush is 494 * unnnecessary. So, specifically allow this case. This 495 * allows us to have better performance on POWER9 DD2.3, 496 * while still working on POWER9 DD2.2 and POWER8 host 497 * cpus. 498 */ 499 return; 500 } 501 error_setg(errp, 502 "Requested count cache flush assist capability level not supported by KVM"); 503 error_append_hint(errp, "Try appending -machine cap-ccf-assist=off\n"); 504 } 505 } 506 507 static void cap_fwnmi_apply(SpaprMachineState *spapr, uint8_t val, 508 Error **errp) 509 { 510 ERRP_GUARD(); 511 if (!val) { 512 return; /* Disabled by default */ 513 } 514 515 if (kvm_enabled()) { 516 if (!kvmppc_get_fwnmi()) { 517 error_setg(errp, 518 "Firmware Assisted Non-Maskable Interrupts(FWNMI) not supported by KVM."); 519 error_append_hint(errp, "Try appending -machine cap-fwnmi=off\n"); 520 } 521 } 522 } 523 524 SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = { 525 [SPAPR_CAP_HTM] = { 526 .name = "htm", 527 .description = "Allow Hardware Transactional Memory (HTM)", 528 .index = SPAPR_CAP_HTM, 529 .get = spapr_cap_get_bool, 530 .set = spapr_cap_set_bool, 531 .type = "bool", 532 .apply = cap_htm_apply, 533 }, 534 [SPAPR_CAP_VSX] = { 535 .name = "vsx", 536 .description = "Allow Vector Scalar Extensions (VSX)", 537 .index = SPAPR_CAP_VSX, 538 .get = spapr_cap_get_bool, 539 .set = spapr_cap_set_bool, 540 .type = "bool", 541 .apply = cap_vsx_apply, 542 }, 543 [SPAPR_CAP_DFP] = { 544 .name = "dfp", 545 .description = "Allow Decimal Floating Point (DFP)", 546 .index = SPAPR_CAP_DFP, 547 .get = spapr_cap_get_bool, 548 .set = spapr_cap_set_bool, 549 .type = "bool", 550 .apply = cap_dfp_apply, 551 }, 552 [SPAPR_CAP_CFPC] = { 553 .name = "cfpc", 554 .description = "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE, 555 .index = SPAPR_CAP_CFPC, 556 .get = spapr_cap_get_string, 557 .set = spapr_cap_set_string, 558 .type = "string", 559 .possible = &cap_cfpc_possible, 560 .apply = cap_safe_cache_apply, 561 }, 562 [SPAPR_CAP_SBBC] = { 563 .name = "sbbc", 564 .description = "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE, 565 .index = SPAPR_CAP_SBBC, 566 .get = spapr_cap_get_string, 567 .set = spapr_cap_set_string, 568 .type = "string", 569 .possible = &cap_sbbc_possible, 570 .apply = cap_safe_bounds_check_apply, 571 }, 572 [SPAPR_CAP_IBS] = { 573 .name = "ibs", 574 .description = 575 "Indirect Branch Speculation (broken, workaround, fixed-ibs," 576 "fixed-ccd, fixed-na)", 577 .index = SPAPR_CAP_IBS, 578 .get = spapr_cap_get_string, 579 .set = spapr_cap_set_string, 580 .type = "string", 581 .possible = &cap_ibs_possible, 582 .apply = cap_safe_indirect_branch_apply, 583 }, 584 [SPAPR_CAP_HPT_MAXPAGESIZE] = { 585 .name = "hpt-max-page-size", 586 .description = "Maximum page size for Hash Page Table guests", 587 .index = SPAPR_CAP_HPT_MAXPAGESIZE, 588 .get = spapr_cap_get_pagesize, 589 .set = spapr_cap_set_pagesize, 590 .type = "int", 591 .apply = cap_hpt_maxpagesize_apply, 592 .cpu_apply = cap_hpt_maxpagesize_cpu_apply, 593 .migrate_needed = cap_hpt_maxpagesize_migrate_needed, 594 }, 595 [SPAPR_CAP_NESTED_KVM_HV] = { 596 .name = "nested-hv", 597 .description = "Allow Nested KVM-HV", 598 .index = SPAPR_CAP_NESTED_KVM_HV, 599 .get = spapr_cap_get_bool, 600 .set = spapr_cap_set_bool, 601 .type = "bool", 602 .apply = cap_nested_kvm_hv_apply, 603 }, 604 [SPAPR_CAP_LARGE_DECREMENTER] = { 605 .name = "large-decr", 606 .description = "Allow Large Decrementer", 607 .index = SPAPR_CAP_LARGE_DECREMENTER, 608 .get = spapr_cap_get_bool, 609 .set = spapr_cap_set_bool, 610 .type = "bool", 611 .apply = cap_large_decr_apply, 612 .cpu_apply = cap_large_decr_cpu_apply, 613 }, 614 [SPAPR_CAP_CCF_ASSIST] = { 615 .name = "ccf-assist", 616 .description = "Count Cache Flush Assist via HW Instruction", 617 .index = SPAPR_CAP_CCF_ASSIST, 618 .get = spapr_cap_get_bool, 619 .set = spapr_cap_set_bool, 620 .type = "bool", 621 .apply = cap_ccf_assist_apply, 622 }, 623 [SPAPR_CAP_FWNMI] = { 624 .name = "fwnmi", 625 .description = "Implements PAPR FWNMI option", 626 .index = SPAPR_CAP_FWNMI, 627 .get = spapr_cap_get_bool, 628 .set = spapr_cap_set_bool, 629 .type = "bool", 630 .apply = cap_fwnmi_apply, 631 }, 632 }; 633 634 static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr, 635 const char *cputype) 636 { 637 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); 638 SpaprCapabilities caps; 639 640 caps = smc->default_caps; 641 642 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_3_00, 643 0, spapr->max_compat_pvr)) { 644 caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF; 645 } 646 647 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07, 648 0, spapr->max_compat_pvr)) { 649 caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF; 650 caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN; 651 } 652 653 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS, 654 0, spapr->max_compat_pvr)) { 655 caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN; 656 } 657 658 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06, 659 0, spapr->max_compat_pvr)) { 660 caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF; 661 caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF; 662 caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN; 663 } 664 665 /* This is for pseries-2.12 and older */ 666 if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) { 667 uint8_t mps; 668 669 if (kvmppc_hpt_needs_host_contiguous_pages()) { 670 mps = ctz64(qemu_minrampagesize()); 671 } else { 672 mps = 34; /* allow everything up to 16GiB, i.e. everything */ 673 } 674 675 caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = mps; 676 } 677 678 return caps; 679 } 680 681 int spapr_caps_pre_load(void *opaque) 682 { 683 SpaprMachineState *spapr = opaque; 684 685 /* Set to default so we can tell if this came in with the migration */ 686 spapr->mig = spapr->def; 687 return 0; 688 } 689 690 int spapr_caps_pre_save(void *opaque) 691 { 692 SpaprMachineState *spapr = opaque; 693 694 spapr->mig = spapr->eff; 695 return 0; 696 } 697 698 /* This has to be called from the top-level spapr post_load, not the 699 * caps specific one. Otherwise it wouldn't be called when the source 700 * caps are all defaults, which could still conflict with overridden 701 * caps on the destination */ 702 int spapr_caps_post_migration(SpaprMachineState *spapr) 703 { 704 int i; 705 bool ok = true; 706 SpaprCapabilities dstcaps = spapr->eff; 707 SpaprCapabilities srccaps; 708 709 srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type); 710 for (i = 0; i < SPAPR_CAP_NUM; i++) { 711 /* If not default value then assume came in with the migration */ 712 if (spapr->mig.caps[i] != spapr->def.caps[i]) { 713 srccaps.caps[i] = spapr->mig.caps[i]; 714 } 715 } 716 717 for (i = 0; i < SPAPR_CAP_NUM; i++) { 718 SpaprCapabilityInfo *info = &capability_table[i]; 719 720 if (srccaps.caps[i] > dstcaps.caps[i]) { 721 error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)", 722 info->name, srccaps.caps[i], dstcaps.caps[i]); 723 ok = false; 724 } 725 726 if (srccaps.caps[i] < dstcaps.caps[i]) { 727 warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)", 728 info->name, srccaps.caps[i], dstcaps.caps[i]); 729 } 730 } 731 732 return ok ? 0 : -EINVAL; 733 } 734 735 /* Used to generate the migration field and needed function for a spapr cap */ 736 #define SPAPR_CAP_MIG_STATE(sname, cap) \ 737 static bool spapr_cap_##sname##_needed(void *opaque) \ 738 { \ 739 SpaprMachineState *spapr = opaque; \ 740 bool (*needed)(void *opaque) = \ 741 capability_table[cap].migrate_needed; \ 742 \ 743 return needed ? needed(opaque) : true && \ 744 spapr->cmd_line_caps[cap] && \ 745 (spapr->eff.caps[cap] != \ 746 spapr->def.caps[cap]); \ 747 } \ 748 \ 749 const VMStateDescription vmstate_spapr_cap_##sname = { \ 750 .name = "spapr/cap/" #sname, \ 751 .version_id = 1, \ 752 .minimum_version_id = 1, \ 753 .needed = spapr_cap_##sname##_needed, \ 754 .fields = (VMStateField[]) { \ 755 VMSTATE_UINT8(mig.caps[cap], \ 756 SpaprMachineState), \ 757 VMSTATE_END_OF_LIST() \ 758 }, \ 759 } 760 761 SPAPR_CAP_MIG_STATE(htm, SPAPR_CAP_HTM); 762 SPAPR_CAP_MIG_STATE(vsx, SPAPR_CAP_VSX); 763 SPAPR_CAP_MIG_STATE(dfp, SPAPR_CAP_DFP); 764 SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC); 765 SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC); 766 SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS); 767 SPAPR_CAP_MIG_STATE(hpt_maxpagesize, SPAPR_CAP_HPT_MAXPAGESIZE); 768 SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV); 769 SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER); 770 SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST); 771 SPAPR_CAP_MIG_STATE(fwnmi, SPAPR_CAP_FWNMI); 772 773 void spapr_caps_init(SpaprMachineState *spapr) 774 { 775 SpaprCapabilities default_caps; 776 int i; 777 778 /* Compute the actual set of caps we should run with */ 779 default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type); 780 781 for (i = 0; i < SPAPR_CAP_NUM; i++) { 782 /* Store the defaults */ 783 spapr->def.caps[i] = default_caps.caps[i]; 784 /* If not set on the command line then apply the default value */ 785 if (!spapr->cmd_line_caps[i]) { 786 spapr->eff.caps[i] = default_caps.caps[i]; 787 } 788 } 789 } 790 791 void spapr_caps_apply(SpaprMachineState *spapr) 792 { 793 int i; 794 795 for (i = 0; i < SPAPR_CAP_NUM; i++) { 796 SpaprCapabilityInfo *info = &capability_table[i]; 797 798 /* 799 * If the apply function can't set the desired level and thinks it's 800 * fatal, it should cause that. 801 */ 802 info->apply(spapr, spapr->eff.caps[i], &error_fatal); 803 } 804 } 805 806 void spapr_caps_cpu_apply(SpaprMachineState *spapr, PowerPCCPU *cpu) 807 { 808 int i; 809 810 for (i = 0; i < SPAPR_CAP_NUM; i++) { 811 SpaprCapabilityInfo *info = &capability_table[i]; 812 813 /* 814 * If the apply function can't set the desired level and thinks it's 815 * fatal, it should cause that. 816 */ 817 if (info->cpu_apply) { 818 info->cpu_apply(spapr, cpu, spapr->eff.caps[i], &error_fatal); 819 } 820 } 821 } 822 823 void spapr_caps_add_properties(SpaprMachineClass *smc) 824 { 825 ObjectClass *klass = OBJECT_CLASS(smc); 826 int i; 827 828 for (i = 0; i < ARRAY_SIZE(capability_table); i++) { 829 SpaprCapabilityInfo *cap = &capability_table[i]; 830 char *name = g_strdup_printf("cap-%s", cap->name); 831 char *desc; 832 833 object_class_property_add(klass, name, cap->type, 834 cap->get, cap->set, 835 NULL, cap); 836 837 desc = g_strdup_printf("%s", cap->description); 838 object_class_property_set_description(klass, name, desc); 839 g_free(name); 840 g_free(desc); 841 } 842 } 843