1 /* 2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 3 * 4 * Copyright (c) 2004-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * Copyright (c) 2010 David Gibson, IBM Corporation. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * 26 */ 27 #include "sysemu/sysemu.h" 28 #include "hw/hw.h" 29 #include "elf.h" 30 #include "net/net.h" 31 #include "sysemu/blockdev.h" 32 #include "sysemu/cpus.h" 33 #include "sysemu/kvm.h" 34 #include "kvm_ppc.h" 35 36 #include "hw/boards.h" 37 #include "hw/ppc.h" 38 #include "hw/loader.h" 39 40 #include "hw/spapr.h" 41 #include "hw/spapr_vio.h" 42 #include "hw/spapr_pci.h" 43 #include "hw/xics.h" 44 #include "hw/pci/msi.h" 45 46 #include "sysemu/kvm.h" 47 #include "kvm_ppc.h" 48 #include "hw/pci/pci.h" 49 50 #include "exec/address-spaces.h" 51 #include "hw/usb.h" 52 #include "qemu/config-file.h" 53 54 #include <libfdt.h> 55 56 /* SLOF memory layout: 57 * 58 * SLOF raw image loaded at 0, copies its romfs right below the flat 59 * device-tree, then position SLOF itself 31M below that 60 * 61 * So we set FW_OVERHEAD to 40MB which should account for all of that 62 * and more 63 * 64 * We load our kernel at 4M, leaving space for SLOF initial image 65 */ 66 #define FDT_MAX_SIZE 0x10000 67 #define RTAS_MAX_SIZE 0x10000 68 #define FW_MAX_SIZE 0x400000 69 #define FW_FILE_NAME "slof.bin" 70 #define FW_OVERHEAD 0x2800000 71 #define KERNEL_LOAD_ADDR FW_MAX_SIZE 72 73 #define MIN_RMA_SLOF 128UL 74 75 #define TIMEBASE_FREQ 512000000ULL 76 77 #define MAX_CPUS 256 78 #define XICS_IRQS 1024 79 80 #define PHANDLE_XICP 0x00001111 81 82 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift)) 83 84 sPAPREnvironment *spapr; 85 86 int spapr_allocate_irq(int hint, bool lsi) 87 { 88 int irq; 89 90 if (hint) { 91 irq = hint; 92 /* FIXME: we should probably check for collisions somehow */ 93 } else { 94 irq = spapr->next_irq++; 95 } 96 97 /* Configure irq type */ 98 if (!xics_get_qirq(spapr->icp, irq)) { 99 return 0; 100 } 101 102 xics_set_irq_type(spapr->icp, irq, lsi); 103 104 return irq; 105 } 106 107 /* Allocate block of consequtive IRQs, returns a number of the first */ 108 int spapr_allocate_irq_block(int num, bool lsi) 109 { 110 int first = -1; 111 int i; 112 113 for (i = 0; i < num; ++i) { 114 int irq; 115 116 irq = spapr_allocate_irq(0, lsi); 117 if (!irq) { 118 return -1; 119 } 120 121 if (0 == i) { 122 first = irq; 123 } 124 125 /* If the above doesn't create a consecutive block then that's 126 * an internal bug */ 127 assert(irq == (first + i)); 128 } 129 130 return first; 131 } 132 133 static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr) 134 { 135 int ret = 0, offset; 136 CPUPPCState *env; 137 CPUState *cpu; 138 char cpu_model[32]; 139 int smt = kvmppc_smt_threads(); 140 uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)}; 141 142 assert(spapr->cpu_model); 143 144 for (env = first_cpu; env != NULL; env = env->next_cpu) { 145 cpu = CPU(ppc_env_get_cpu(env)); 146 uint32_t associativity[] = {cpu_to_be32(0x5), 147 cpu_to_be32(0x0), 148 cpu_to_be32(0x0), 149 cpu_to_be32(0x0), 150 cpu_to_be32(cpu->numa_node), 151 cpu_to_be32(cpu->cpu_index)}; 152 153 if ((cpu->cpu_index % smt) != 0) { 154 continue; 155 } 156 157 snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model, 158 cpu->cpu_index); 159 160 offset = fdt_path_offset(fdt, cpu_model); 161 if (offset < 0) { 162 return offset; 163 } 164 165 if (nb_numa_nodes > 1) { 166 ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity, 167 sizeof(associativity)); 168 if (ret < 0) { 169 return ret; 170 } 171 } 172 173 ret = fdt_setprop(fdt, offset, "ibm,pft-size", 174 pft_size_prop, sizeof(pft_size_prop)); 175 if (ret < 0) { 176 return ret; 177 } 178 } 179 return ret; 180 } 181 182 183 static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop, 184 size_t maxsize) 185 { 186 size_t maxcells = maxsize / sizeof(uint32_t); 187 int i, j, count; 188 uint32_t *p = prop; 189 190 for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) { 191 struct ppc_one_seg_page_size *sps = &env->sps.sps[i]; 192 193 if (!sps->page_shift) { 194 break; 195 } 196 for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) { 197 if (sps->enc[count].page_shift == 0) { 198 break; 199 } 200 } 201 if ((p - prop) >= (maxcells - 3 - count * 2)) { 202 break; 203 } 204 *(p++) = cpu_to_be32(sps->page_shift); 205 *(p++) = cpu_to_be32(sps->slb_enc); 206 *(p++) = cpu_to_be32(count); 207 for (j = 0; j < count; j++) { 208 *(p++) = cpu_to_be32(sps->enc[j].page_shift); 209 *(p++) = cpu_to_be32(sps->enc[j].pte_enc); 210 } 211 } 212 213 return (p - prop) * sizeof(uint32_t); 214 } 215 216 #define _FDT(exp) \ 217 do { \ 218 int ret = (exp); \ 219 if (ret < 0) { \ 220 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \ 221 #exp, fdt_strerror(ret)); \ 222 exit(1); \ 223 } \ 224 } while (0) 225 226 227 static void *spapr_create_fdt_skel(const char *cpu_model, 228 hwaddr initrd_base, 229 hwaddr initrd_size, 230 hwaddr kernel_size, 231 const char *boot_device, 232 const char *kernel_cmdline, 233 uint32_t epow_irq) 234 { 235 void *fdt; 236 CPUPPCState *env; 237 uint32_t start_prop = cpu_to_be32(initrd_base); 238 uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); 239 char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt" 240 "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk"; 241 char qemu_hypertas_prop[] = "hcall-memop1"; 242 uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)}; 243 uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)}; 244 char *modelname; 245 int i, smt = kvmppc_smt_threads(); 246 unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80}; 247 248 fdt = g_malloc0(FDT_MAX_SIZE); 249 _FDT((fdt_create(fdt, FDT_MAX_SIZE))); 250 251 if (kernel_size) { 252 _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size))); 253 } 254 if (initrd_size) { 255 _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size))); 256 } 257 _FDT((fdt_finish_reservemap(fdt))); 258 259 /* Root node */ 260 _FDT((fdt_begin_node(fdt, ""))); 261 _FDT((fdt_property_string(fdt, "device_type", "chrp"))); 262 _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)"))); 263 264 _FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); 265 _FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); 266 267 /* /chosen */ 268 _FDT((fdt_begin_node(fdt, "chosen"))); 269 270 /* Set Form1_affinity */ 271 _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5)))); 272 273 _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline))); 274 _FDT((fdt_property(fdt, "linux,initrd-start", 275 &start_prop, sizeof(start_prop)))); 276 _FDT((fdt_property(fdt, "linux,initrd-end", 277 &end_prop, sizeof(end_prop)))); 278 if (kernel_size) { 279 uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR), 280 cpu_to_be64(kernel_size) }; 281 282 _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop)))); 283 } 284 if (boot_device) { 285 _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device))); 286 } 287 _FDT((fdt_property_cell(fdt, "qemu,graphic-width", graphic_width))); 288 _FDT((fdt_property_cell(fdt, "qemu,graphic-height", graphic_height))); 289 _FDT((fdt_property_cell(fdt, "qemu,graphic-depth", graphic_depth))); 290 291 _FDT((fdt_end_node(fdt))); 292 293 /* cpus */ 294 _FDT((fdt_begin_node(fdt, "cpus"))); 295 296 _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); 297 _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); 298 299 modelname = g_strdup(cpu_model); 300 301 for (i = 0; i < strlen(modelname); i++) { 302 modelname[i] = toupper(modelname[i]); 303 } 304 305 /* This is needed during FDT finalization */ 306 spapr->cpu_model = g_strdup(modelname); 307 308 for (env = first_cpu; env != NULL; env = env->next_cpu) { 309 CPUState *cpu = CPU(ppc_env_get_cpu(env)); 310 int index = cpu->cpu_index; 311 uint32_t servers_prop[smp_threads]; 312 uint32_t gservers_prop[smp_threads * 2]; 313 char *nodename; 314 uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), 315 0xffffffff, 0xffffffff}; 316 uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; 317 uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000; 318 uint32_t page_sizes_prop[64]; 319 size_t page_sizes_prop_size; 320 321 if ((index % smt) != 0) { 322 continue; 323 } 324 325 nodename = g_strdup_printf("%s@%x", modelname, index); 326 327 _FDT((fdt_begin_node(fdt, nodename))); 328 329 g_free(nodename); 330 331 _FDT((fdt_property_cell(fdt, "reg", index))); 332 _FDT((fdt_property_string(fdt, "device_type", "cpu"))); 333 334 _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR]))); 335 _FDT((fdt_property_cell(fdt, "dcache-block-size", 336 env->dcache_line_size))); 337 _FDT((fdt_property_cell(fdt, "icache-block-size", 338 env->icache_line_size))); 339 _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq))); 340 _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq))); 341 _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr))); 342 _FDT((fdt_property_string(fdt, "status", "okay"))); 343 _FDT((fdt_property(fdt, "64-bit", NULL, 0))); 344 345 /* Build interrupt servers and gservers properties */ 346 for (i = 0; i < smp_threads; i++) { 347 servers_prop[i] = cpu_to_be32(index + i); 348 /* Hack, direct the group queues back to cpu 0 */ 349 gservers_prop[i*2] = cpu_to_be32(index + i); 350 gservers_prop[i*2 + 1] = 0; 351 } 352 _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s", 353 servers_prop, sizeof(servers_prop)))); 354 _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s", 355 gservers_prop, sizeof(gservers_prop)))); 356 357 if (env->mmu_model & POWERPC_MMU_1TSEG) { 358 _FDT((fdt_property(fdt, "ibm,processor-segment-sizes", 359 segs, sizeof(segs)))); 360 } 361 362 /* Advertise VMX/VSX (vector extensions) if available 363 * 0 / no property == no vector extensions 364 * 1 == VMX / Altivec available 365 * 2 == VSX available */ 366 if (env->insns_flags & PPC_ALTIVEC) { 367 uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1; 368 369 _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx))); 370 } 371 372 /* Advertise DFP (Decimal Floating Point) if available 373 * 0 / no property == no DFP 374 * 1 == DFP available */ 375 if (env->insns_flags2 & PPC2_DFP) { 376 _FDT((fdt_property_cell(fdt, "ibm,dfp", 1))); 377 } 378 379 page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop, 380 sizeof(page_sizes_prop)); 381 if (page_sizes_prop_size) { 382 _FDT((fdt_property(fdt, "ibm,segment-page-sizes", 383 page_sizes_prop, page_sizes_prop_size))); 384 } 385 386 _FDT((fdt_end_node(fdt))); 387 } 388 389 g_free(modelname); 390 391 _FDT((fdt_end_node(fdt))); 392 393 /* RTAS */ 394 _FDT((fdt_begin_node(fdt, "rtas"))); 395 396 _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop, 397 sizeof(hypertas_prop)))); 398 _FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop, 399 sizeof(qemu_hypertas_prop)))); 400 401 _FDT((fdt_property(fdt, "ibm,associativity-reference-points", 402 refpoints, sizeof(refpoints)))); 403 404 _FDT((fdt_property_cell(fdt, "rtas-error-log-max", RTAS_ERROR_LOG_MAX))); 405 406 _FDT((fdt_end_node(fdt))); 407 408 /* interrupt controller */ 409 _FDT((fdt_begin_node(fdt, "interrupt-controller"))); 410 411 _FDT((fdt_property_string(fdt, "device_type", 412 "PowerPC-External-Interrupt-Presentation"))); 413 _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); 414 _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); 415 _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges", 416 interrupt_server_ranges_prop, 417 sizeof(interrupt_server_ranges_prop)))); 418 _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2))); 419 _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP))); 420 _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP))); 421 422 _FDT((fdt_end_node(fdt))); 423 424 /* vdevice */ 425 _FDT((fdt_begin_node(fdt, "vdevice"))); 426 427 _FDT((fdt_property_string(fdt, "device_type", "vdevice"))); 428 _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); 429 _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); 430 _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); 431 _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); 432 _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); 433 434 _FDT((fdt_end_node(fdt))); 435 436 /* event-sources */ 437 spapr_events_fdt_skel(fdt, epow_irq); 438 439 _FDT((fdt_end_node(fdt))); /* close root node */ 440 _FDT((fdt_finish(fdt))); 441 442 return fdt; 443 } 444 445 static int spapr_populate_memory(sPAPREnvironment *spapr, void *fdt) 446 { 447 uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0), 448 cpu_to_be32(0x0), cpu_to_be32(0x0), 449 cpu_to_be32(0x0)}; 450 char mem_name[32]; 451 hwaddr node0_size, mem_start; 452 uint64_t mem_reg_property[2]; 453 int i, off; 454 455 /* memory node(s) */ 456 node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size; 457 if (spapr->rma_size > node0_size) { 458 spapr->rma_size = node0_size; 459 } 460 461 /* RMA */ 462 mem_reg_property[0] = 0; 463 mem_reg_property[1] = cpu_to_be64(spapr->rma_size); 464 off = fdt_add_subnode(fdt, 0, "memory@0"); 465 _FDT(off); 466 _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); 467 _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property, 468 sizeof(mem_reg_property)))); 469 _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity, 470 sizeof(associativity)))); 471 472 /* RAM: Node 0 */ 473 if (node0_size > spapr->rma_size) { 474 mem_reg_property[0] = cpu_to_be64(spapr->rma_size); 475 mem_reg_property[1] = cpu_to_be64(node0_size - spapr->rma_size); 476 477 sprintf(mem_name, "memory@" TARGET_FMT_lx, spapr->rma_size); 478 off = fdt_add_subnode(fdt, 0, mem_name); 479 _FDT(off); 480 _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); 481 _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property, 482 sizeof(mem_reg_property)))); 483 _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity, 484 sizeof(associativity)))); 485 } 486 487 /* RAM: Node 1 and beyond */ 488 mem_start = node0_size; 489 for (i = 1; i < nb_numa_nodes; i++) { 490 mem_reg_property[0] = cpu_to_be64(mem_start); 491 mem_reg_property[1] = cpu_to_be64(node_mem[i]); 492 associativity[3] = associativity[4] = cpu_to_be32(i); 493 sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start); 494 off = fdt_add_subnode(fdt, 0, mem_name); 495 _FDT(off); 496 _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); 497 _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property, 498 sizeof(mem_reg_property)))); 499 _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity, 500 sizeof(associativity)))); 501 mem_start += node_mem[i]; 502 } 503 504 return 0; 505 } 506 507 static void spapr_finalize_fdt(sPAPREnvironment *spapr, 508 hwaddr fdt_addr, 509 hwaddr rtas_addr, 510 hwaddr rtas_size) 511 { 512 int ret; 513 void *fdt; 514 sPAPRPHBState *phb; 515 516 fdt = g_malloc(FDT_MAX_SIZE); 517 518 /* open out the base tree into a temp buffer for the final tweaks */ 519 _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE))); 520 521 ret = spapr_populate_memory(spapr, fdt); 522 if (ret < 0) { 523 fprintf(stderr, "couldn't setup memory nodes in fdt\n"); 524 exit(1); 525 } 526 527 ret = spapr_populate_vdevice(spapr->vio_bus, fdt); 528 if (ret < 0) { 529 fprintf(stderr, "couldn't setup vio devices in fdt\n"); 530 exit(1); 531 } 532 533 QLIST_FOREACH(phb, &spapr->phbs, list) { 534 ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt); 535 } 536 537 if (ret < 0) { 538 fprintf(stderr, "couldn't setup PCI devices in fdt\n"); 539 exit(1); 540 } 541 542 /* RTAS */ 543 ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size); 544 if (ret < 0) { 545 fprintf(stderr, "Couldn't set up RTAS device tree properties\n"); 546 } 547 548 /* Advertise NUMA via ibm,associativity */ 549 ret = spapr_fixup_cpu_dt(fdt, spapr); 550 if (ret < 0) { 551 fprintf(stderr, "Couldn't finalize CPU device tree properties\n"); 552 } 553 554 if (!spapr->has_graphics) { 555 spapr_populate_chosen_stdout(fdt, spapr->vio_bus); 556 } 557 558 _FDT((fdt_pack(fdt))); 559 560 if (fdt_totalsize(fdt) > FDT_MAX_SIZE) { 561 hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n", 562 fdt_totalsize(fdt), FDT_MAX_SIZE); 563 exit(1); 564 } 565 566 cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); 567 568 g_free(fdt); 569 } 570 571 static uint64_t translate_kernel_address(void *opaque, uint64_t addr) 572 { 573 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; 574 } 575 576 static void emulate_spapr_hypercall(PowerPCCPU *cpu) 577 { 578 CPUPPCState *env = &cpu->env; 579 580 if (msr_pr) { 581 hcall_dprintf("Hypercall made with MSR[PR]=1\n"); 582 env->gpr[3] = H_PRIVILEGE; 583 } else { 584 env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]); 585 } 586 } 587 588 static void spapr_reset_htab(sPAPREnvironment *spapr) 589 { 590 long shift; 591 592 /* allocate hash page table. For now we always make this 16mb, 593 * later we should probably make it scale to the size of guest 594 * RAM */ 595 596 shift = kvmppc_reset_htab(spapr->htab_shift); 597 598 if (shift > 0) { 599 /* Kernel handles htab, we don't need to allocate one */ 600 spapr->htab_shift = shift; 601 } else { 602 if (!spapr->htab) { 603 /* Allocate an htab if we don't yet have one */ 604 spapr->htab = qemu_memalign(HTAB_SIZE(spapr), HTAB_SIZE(spapr)); 605 } 606 607 /* And clear it */ 608 memset(spapr->htab, 0, HTAB_SIZE(spapr)); 609 } 610 611 /* Update the RMA size if necessary */ 612 if (spapr->vrma_adjust) { 613 spapr->rma_size = kvmppc_rma_size(ram_size, spapr->htab_shift); 614 } 615 } 616 617 static void ppc_spapr_reset(void) 618 { 619 /* Reset the hash table & recalc the RMA */ 620 spapr_reset_htab(spapr); 621 622 qemu_devices_reset(); 623 624 /* Load the fdt */ 625 spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr, 626 spapr->rtas_size); 627 628 /* Set up the entry state */ 629 first_cpu->gpr[3] = spapr->fdt_addr; 630 first_cpu->gpr[5] = 0; 631 first_cpu->halted = 0; 632 first_cpu->nip = spapr->entry_point; 633 634 } 635 636 static void spapr_cpu_reset(void *opaque) 637 { 638 PowerPCCPU *cpu = opaque; 639 CPUPPCState *env = &cpu->env; 640 641 cpu_reset(CPU(cpu)); 642 643 /* All CPUs start halted. CPU0 is unhalted from the machine level 644 * reset code and the rest are explicitly started up by the guest 645 * using an RTAS call */ 646 env->halted = 1; 647 648 env->spr[SPR_HIOR] = 0; 649 650 env->external_htab = spapr->htab; 651 env->htab_base = -1; 652 env->htab_mask = HTAB_SIZE(spapr) - 1; 653 env->spr[SPR_SDR1] = (unsigned long)spapr->htab | 654 (spapr->htab_shift - 18); 655 } 656 657 static void spapr_create_nvram(sPAPREnvironment *spapr) 658 { 659 QemuOpts *machine_opts; 660 DeviceState *dev; 661 662 dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram"); 663 664 machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0); 665 if (machine_opts) { 666 const char *drivename; 667 668 drivename = qemu_opt_get(machine_opts, "nvram"); 669 if (drivename) { 670 BlockDriverState *bs; 671 672 bs = bdrv_find(drivename); 673 if (!bs) { 674 fprintf(stderr, "No such block device \"%s\" for nvram\n", 675 drivename); 676 exit(1); 677 } 678 qdev_prop_set_drive_nofail(dev, "drive", bs); 679 } 680 } 681 682 qdev_init_nofail(dev); 683 684 spapr->nvram = (struct sPAPRNVRAM *)dev; 685 } 686 687 /* Returns whether we want to use VGA or not */ 688 static int spapr_vga_init(PCIBus *pci_bus) 689 { 690 switch (vga_interface_type) { 691 case VGA_NONE: 692 case VGA_STD: 693 return pci_vga_init(pci_bus) != NULL; 694 default: 695 fprintf(stderr, "This vga model is not supported," 696 "currently it only supports -vga std\n"); 697 exit(0); 698 break; 699 } 700 } 701 702 /* pSeries LPAR / sPAPR hardware init */ 703 static void ppc_spapr_init(QEMUMachineInitArgs *args) 704 { 705 ram_addr_t ram_size = args->ram_size; 706 const char *cpu_model = args->cpu_model; 707 const char *kernel_filename = args->kernel_filename; 708 const char *kernel_cmdline = args->kernel_cmdline; 709 const char *initrd_filename = args->initrd_filename; 710 const char *boot_device = args->boot_device; 711 PowerPCCPU *cpu; 712 CPUPPCState *env; 713 PCIHostState *phb; 714 int i; 715 MemoryRegion *sysmem = get_system_memory(); 716 MemoryRegion *ram = g_new(MemoryRegion, 1); 717 hwaddr rma_alloc_size; 718 uint32_t initrd_base = 0; 719 long kernel_size = 0, initrd_size = 0; 720 long load_limit, rtas_limit, fw_size; 721 char *filename; 722 723 msi_supported = true; 724 725 spapr = g_malloc0(sizeof(*spapr)); 726 QLIST_INIT(&spapr->phbs); 727 728 cpu_ppc_hypercall = emulate_spapr_hypercall; 729 730 /* Allocate RMA if necessary */ 731 rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem); 732 733 if (rma_alloc_size == -1) { 734 hw_error("qemu: Unable to create RMA\n"); 735 exit(1); 736 } 737 738 if (rma_alloc_size && (rma_alloc_size < ram_size)) { 739 spapr->rma_size = rma_alloc_size; 740 } else { 741 spapr->rma_size = ram_size; 742 743 /* With KVM, we don't actually know whether KVM supports an 744 * unbounded RMA (PR KVM) or is limited by the hash table size 745 * (HV KVM using VRMA), so we always assume the latter 746 * 747 * In that case, we also limit the initial allocations for RTAS 748 * etc... to 256M since we have no way to know what the VRMA size 749 * is going to be as it depends on the size of the hash table 750 * isn't determined yet. 751 */ 752 if (kvm_enabled()) { 753 spapr->vrma_adjust = 1; 754 spapr->rma_size = MIN(spapr->rma_size, 0x10000000); 755 } 756 } 757 758 /* We place the device tree and RTAS just below either the top of the RMA, 759 * or just below 2GB, whichever is lowere, so that it can be 760 * processed with 32-bit real mode code if necessary */ 761 rtas_limit = MIN(spapr->rma_size, 0x80000000); 762 spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE; 763 spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE; 764 load_limit = spapr->fdt_addr - FW_OVERHEAD; 765 766 /* We aim for a hash table of size 1/128 the size of RAM. The 767 * normal rule of thumb is 1/64 the size of RAM, but that's much 768 * more than needed for the Linux guests we support. */ 769 spapr->htab_shift = 18; /* Minimum architected size */ 770 while (spapr->htab_shift <= 46) { 771 if ((1ULL << (spapr->htab_shift + 7)) >= ram_size) { 772 break; 773 } 774 spapr->htab_shift++; 775 } 776 777 /* init CPUs */ 778 if (cpu_model == NULL) { 779 cpu_model = kvm_enabled() ? "host" : "POWER7"; 780 } 781 for (i = 0; i < smp_cpus; i++) { 782 cpu = cpu_ppc_init(cpu_model); 783 if (cpu == NULL) { 784 fprintf(stderr, "Unable to find PowerPC CPU definition\n"); 785 exit(1); 786 } 787 env = &cpu->env; 788 789 /* Set time-base frequency to 512 MHz */ 790 cpu_ppc_tb_init(env, TIMEBASE_FREQ); 791 792 /* PAPR always has exception vectors in RAM not ROM */ 793 env->hreset_excp_prefix = 0; 794 795 /* Tell KVM that we're in PAPR mode */ 796 if (kvm_enabled()) { 797 kvmppc_set_papr(cpu); 798 } 799 800 qemu_register_reset(spapr_cpu_reset, cpu); 801 } 802 803 /* allocate RAM */ 804 spapr->ram_limit = ram_size; 805 if (spapr->ram_limit > rma_alloc_size) { 806 ram_addr_t nonrma_base = rma_alloc_size; 807 ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size; 808 809 memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size); 810 vmstate_register_ram_global(ram); 811 memory_region_add_subregion(sysmem, nonrma_base, ram); 812 } 813 814 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin"); 815 spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr, 816 rtas_limit - spapr->rtas_addr); 817 if (spapr->rtas_size < 0) { 818 hw_error("qemu: could not load LPAR rtas '%s'\n", filename); 819 exit(1); 820 } 821 if (spapr->rtas_size > RTAS_MAX_SIZE) { 822 hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n", 823 spapr->rtas_size, RTAS_MAX_SIZE); 824 exit(1); 825 } 826 g_free(filename); 827 828 829 /* Set up Interrupt Controller */ 830 spapr->icp = xics_system_init(XICS_IRQS); 831 spapr->next_irq = XICS_IRQ_BASE; 832 833 /* Set up EPOW events infrastructure */ 834 spapr_events_init(spapr); 835 836 /* Set up IOMMU */ 837 spapr_iommu_init(); 838 839 /* Set up VIO bus */ 840 spapr->vio_bus = spapr_vio_bus_init(); 841 842 for (i = 0; i < MAX_SERIAL_PORTS; i++) { 843 if (serial_hds[i]) { 844 spapr_vty_create(spapr->vio_bus, serial_hds[i]); 845 } 846 } 847 848 /* We always have at least the nvram device on VIO */ 849 spapr_create_nvram(spapr); 850 851 /* Set up PCI */ 852 spapr_pci_rtas_init(); 853 854 phb = spapr_create_phb(spapr, 0, "pci"); 855 856 for (i = 0; i < nb_nics; i++) { 857 NICInfo *nd = &nd_table[i]; 858 859 if (!nd->model) { 860 nd->model = g_strdup("ibmveth"); 861 } 862 863 if (strcmp(nd->model, "ibmveth") == 0) { 864 spapr_vlan_create(spapr->vio_bus, nd); 865 } else { 866 pci_nic_init_nofail(&nd_table[i], nd->model, NULL); 867 } 868 } 869 870 for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { 871 spapr_vscsi_create(spapr->vio_bus); 872 } 873 874 /* Graphics */ 875 if (spapr_vga_init(phb->bus)) { 876 spapr->has_graphics = true; 877 } 878 879 if (usb_enabled(spapr->has_graphics)) { 880 pci_create_simple(phb->bus, -1, "pci-ohci"); 881 if (spapr->has_graphics) { 882 usbdevice_create("keyboard"); 883 usbdevice_create("mouse"); 884 } 885 } 886 887 if (spapr->rma_size < (MIN_RMA_SLOF << 20)) { 888 fprintf(stderr, "qemu: pSeries SLOF firmware requires >= " 889 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF); 890 exit(1); 891 } 892 893 if (kernel_filename) { 894 uint64_t lowaddr = 0; 895 896 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, 897 NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); 898 if (kernel_size < 0) { 899 kernel_size = load_image_targphys(kernel_filename, 900 KERNEL_LOAD_ADDR, 901 load_limit - KERNEL_LOAD_ADDR); 902 } 903 if (kernel_size < 0) { 904 fprintf(stderr, "qemu: could not load kernel '%s'\n", 905 kernel_filename); 906 exit(1); 907 } 908 909 /* load initrd */ 910 if (initrd_filename) { 911 /* Try to locate the initrd in the gap between the kernel 912 * and the firmware. Add a bit of space just in case 913 */ 914 initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff; 915 initrd_size = load_image_targphys(initrd_filename, initrd_base, 916 load_limit - initrd_base); 917 if (initrd_size < 0) { 918 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", 919 initrd_filename); 920 exit(1); 921 } 922 } else { 923 initrd_base = 0; 924 initrd_size = 0; 925 } 926 } 927 928 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME); 929 fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE); 930 if (fw_size < 0) { 931 hw_error("qemu: could not load LPAR rtas '%s'\n", filename); 932 exit(1); 933 } 934 g_free(filename); 935 936 spapr->entry_point = 0x100; 937 938 /* Prepare the device tree */ 939 spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, 940 initrd_base, initrd_size, 941 kernel_size, 942 boot_device, kernel_cmdline, 943 spapr->epow_irq); 944 assert(spapr->fdt_skel != NULL); 945 } 946 947 static QEMUMachine spapr_machine = { 948 .name = "pseries", 949 .desc = "pSeries Logical Partition (PAPR compliant)", 950 .init = ppc_spapr_init, 951 .reset = ppc_spapr_reset, 952 .block_default_type = IF_SCSI, 953 .max_cpus = MAX_CPUS, 954 .no_parallel = 1, 955 .boot_order = NULL, 956 }; 957 958 static void spapr_machine_init(void) 959 { 960 qemu_register_machine(&spapr_machine); 961 } 962 963 machine_init(spapr_machine_init); 964