153018216SPaolo Bonzini /* 253018216SPaolo Bonzini * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 353018216SPaolo Bonzini * 453018216SPaolo Bonzini * Copyright (c) 2004-2007 Fabrice Bellard 553018216SPaolo Bonzini * Copyright (c) 2007 Jocelyn Mayer 653018216SPaolo Bonzini * Copyright (c) 2010 David Gibson, IBM Corporation. 753018216SPaolo Bonzini * 853018216SPaolo Bonzini * Permission is hereby granted, free of charge, to any person obtaining a copy 953018216SPaolo Bonzini * of this software and associated documentation files (the "Software"), to deal 1053018216SPaolo Bonzini * in the Software without restriction, including without limitation the rights 1153018216SPaolo Bonzini * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 1253018216SPaolo Bonzini * copies of the Software, and to permit persons to whom the Software is 1353018216SPaolo Bonzini * furnished to do so, subject to the following conditions: 1453018216SPaolo Bonzini * 1553018216SPaolo Bonzini * The above copyright notice and this permission notice shall be included in 1653018216SPaolo Bonzini * all copies or substantial portions of the Software. 1753018216SPaolo Bonzini * 1853018216SPaolo Bonzini * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1953018216SPaolo Bonzini * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 2053018216SPaolo Bonzini * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 2153018216SPaolo Bonzini * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 2253018216SPaolo Bonzini * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 2353018216SPaolo Bonzini * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 2453018216SPaolo Bonzini * THE SOFTWARE. 2553018216SPaolo Bonzini * 2653018216SPaolo Bonzini */ 270d75590dSPeter Maydell #include "qemu/osdep.h" 28da34e65cSMarkus Armbruster #include "qapi/error.h" 29fa98fbfcSSam Bobroff #include "qapi/visitor.h" 3053018216SPaolo Bonzini #include "sysemu/sysemu.h" 31e35704baSEduardo Habkost #include "sysemu/numa.h" 3253018216SPaolo Bonzini #include "hw/hw.h" 3303dd024fSPaolo Bonzini #include "qemu/log.h" 3471461b0fSAlexey Kardashevskiy #include "hw/fw-path-provider.h" 3553018216SPaolo Bonzini #include "elf.h" 3653018216SPaolo Bonzini #include "net/net.h" 37ad440b4aSAndrew Jones #include "sysemu/device_tree.h" 38fa1d36dfSMarkus Armbruster #include "sysemu/block-backend.h" 3953018216SPaolo Bonzini #include "sysemu/cpus.h" 40b3946626SVincent Palatin #include "sysemu/hw_accel.h" 4153018216SPaolo Bonzini #include "kvm_ppc.h" 42c4b63b7cSJuan Quintela #include "migration/misc.h" 4384a899deSJuan Quintela #include "migration/global_state.h" 44f2a8f0a6SJuan Quintela #include "migration/register.h" 454be21d56SDavid Gibson #include "mmu-hash64.h" 46b4db5413SSuraj Jitindar Singh #include "mmu-book3s-v3.h" 477abd43baSSuraj Jitindar Singh #include "cpu-models.h" 483794d548SAlexey Kardashevskiy #include "qom/cpu.h" 4953018216SPaolo Bonzini 5053018216SPaolo Bonzini #include "hw/boards.h" 510d09e41aSPaolo Bonzini #include "hw/ppc/ppc.h" 5253018216SPaolo Bonzini #include "hw/loader.h" 5353018216SPaolo Bonzini 547804c353SCédric Le Goater #include "hw/ppc/fdt.h" 550d09e41aSPaolo Bonzini #include "hw/ppc/spapr.h" 560d09e41aSPaolo Bonzini #include "hw/ppc/spapr_vio.h" 570d09e41aSPaolo Bonzini #include "hw/pci-host/spapr.h" 580d09e41aSPaolo Bonzini #include "hw/ppc/xics.h" 5953018216SPaolo Bonzini #include "hw/pci/msi.h" 6053018216SPaolo Bonzini 6153018216SPaolo Bonzini #include "hw/pci/pci.h" 6271461b0fSAlexey Kardashevskiy #include "hw/scsi/scsi.h" 6371461b0fSAlexey Kardashevskiy #include "hw/virtio/virtio-scsi.h" 64c4e13492SFelipe Franciosi #include "hw/virtio/vhost-scsi-common.h" 6553018216SPaolo Bonzini 6653018216SPaolo Bonzini #include "exec/address-spaces.h" 6753018216SPaolo Bonzini #include "hw/usb.h" 6853018216SPaolo Bonzini #include "qemu/config-file.h" 69135a129aSAneesh Kumar K.V #include "qemu/error-report.h" 702a6593cbSAlexey Kardashevskiy #include "trace.h" 7134316482SAlexey Kardashevskiy #include "hw/nmi.h" 726449da45SCédric Le Goater #include "hw/intc/intc.h" 7353018216SPaolo Bonzini 7468a27b20SMichael S. Tsirkin #include "hw/compat.h" 75f348b6d1SVeronia Bahaa #include "qemu/cutils.h" 7694a94e4cSBharata B Rao #include "hw/ppc/spapr_cpu_core.h" 7768a27b20SMichael S. Tsirkin 7853018216SPaolo Bonzini #include <libfdt.h> 7953018216SPaolo Bonzini 8053018216SPaolo Bonzini /* SLOF memory layout: 8153018216SPaolo Bonzini * 8253018216SPaolo Bonzini * SLOF raw image loaded at 0, copies its romfs right below the flat 8353018216SPaolo Bonzini * device-tree, then position SLOF itself 31M below that 8453018216SPaolo Bonzini * 8553018216SPaolo Bonzini * So we set FW_OVERHEAD to 40MB which should account for all of that 8653018216SPaolo Bonzini * and more 8753018216SPaolo Bonzini * 8853018216SPaolo Bonzini * We load our kernel at 4M, leaving space for SLOF initial image 8953018216SPaolo Bonzini */ 9038b02bd8SAlexey Kardashevskiy #define FDT_MAX_SIZE 0x100000 9153018216SPaolo Bonzini #define RTAS_MAX_SIZE 0x10000 92b7d1f77aSBenjamin Herrenschmidt #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */ 9353018216SPaolo Bonzini #define FW_MAX_SIZE 0x400000 9453018216SPaolo Bonzini #define FW_FILE_NAME "slof.bin" 9553018216SPaolo Bonzini #define FW_OVERHEAD 0x2800000 9653018216SPaolo Bonzini #define KERNEL_LOAD_ADDR FW_MAX_SIZE 9753018216SPaolo Bonzini 9853018216SPaolo Bonzini #define MIN_RMA_SLOF 128UL 9953018216SPaolo Bonzini 10053018216SPaolo Bonzini #define PHANDLE_XICP 0x00001111 10153018216SPaolo Bonzini 1025d0fb150SGreg Kurz /* These two functions implement the VCPU id numbering: one to compute them 1035d0fb150SGreg Kurz * all and one to identify thread 0 of a VCORE. Any change to the first one 1045d0fb150SGreg Kurz * is likely to have an impact on the second one, so let's keep them close. 1055d0fb150SGreg Kurz */ 1065d0fb150SGreg Kurz static int spapr_vcpu_id(sPAPRMachineState *spapr, int cpu_index) 1075d0fb150SGreg Kurz { 1081a5008fcSGreg Kurz assert(spapr->vsmt); 1095d0fb150SGreg Kurz return 1105d0fb150SGreg Kurz (cpu_index / smp_threads) * spapr->vsmt + cpu_index % smp_threads; 1115d0fb150SGreg Kurz } 1125d0fb150SGreg Kurz static bool spapr_is_thread0_in_vcore(sPAPRMachineState *spapr, 1135d0fb150SGreg Kurz PowerPCCPU *cpu) 1145d0fb150SGreg Kurz { 1151a5008fcSGreg Kurz assert(spapr->vsmt); 1165d0fb150SGreg Kurz return spapr_get_vcpu_id(cpu) % spapr->vsmt == 0; 1175d0fb150SGreg Kurz } 1185d0fb150SGreg Kurz 11971cd4dacSCédric Le Goater static ICSState *spapr_ics_create(sPAPRMachineState *spapr, 12071cd4dacSCédric Le Goater const char *type_ics, 121817bb6a4SCédric Le Goater int nr_irqs, Error **errp) 122c04d6cfaSAnthony Liguori { 123175d2aa0SGreg Kurz Error *local_err = NULL; 12471cd4dacSCédric Le Goater Object *obj; 125c04d6cfaSAnthony Liguori 12671cd4dacSCédric Le Goater obj = object_new(type_ics); 127175d2aa0SGreg Kurz object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort); 128ad265631SGreg Kurz object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr), 129ad265631SGreg Kurz &error_abort); 130175d2aa0SGreg Kurz object_property_set_int(obj, nr_irqs, "nr-irqs", &local_err); 131175d2aa0SGreg Kurz if (local_err) { 132175d2aa0SGreg Kurz goto error; 133175d2aa0SGreg Kurz } 13471cd4dacSCédric Le Goater object_property_set_bool(obj, true, "realized", &local_err); 135175d2aa0SGreg Kurz if (local_err) { 136175d2aa0SGreg Kurz goto error; 137c04d6cfaSAnthony Liguori } 138c04d6cfaSAnthony Liguori 13971cd4dacSCédric Le Goater return ICS_SIMPLE(obj); 140175d2aa0SGreg Kurz 141175d2aa0SGreg Kurz error: 142175d2aa0SGreg Kurz error_propagate(errp, local_err); 143175d2aa0SGreg Kurz return NULL; 1445bc8d26dSCédric Le Goater } 1455bc8d26dSCédric Le Goater 14646f7afa3SGreg Kurz static bool pre_2_10_vmstate_dummy_icp_needed(void *opaque) 14746f7afa3SGreg Kurz { 14846f7afa3SGreg Kurz /* Dummy entries correspond to unused ICPState objects in older QEMUs, 14946f7afa3SGreg Kurz * and newer QEMUs don't even have them. In both cases, we don't want 15046f7afa3SGreg Kurz * to send anything on the wire. 15146f7afa3SGreg Kurz */ 15246f7afa3SGreg Kurz return false; 15346f7afa3SGreg Kurz } 15446f7afa3SGreg Kurz 15546f7afa3SGreg Kurz static const VMStateDescription pre_2_10_vmstate_dummy_icp = { 15646f7afa3SGreg Kurz .name = "icp/server", 15746f7afa3SGreg Kurz .version_id = 1, 15846f7afa3SGreg Kurz .minimum_version_id = 1, 15946f7afa3SGreg Kurz .needed = pre_2_10_vmstate_dummy_icp_needed, 16046f7afa3SGreg Kurz .fields = (VMStateField[]) { 16146f7afa3SGreg Kurz VMSTATE_UNUSED(4), /* uint32_t xirr */ 16246f7afa3SGreg Kurz VMSTATE_UNUSED(1), /* uint8_t pending_priority */ 16346f7afa3SGreg Kurz VMSTATE_UNUSED(1), /* uint8_t mfrr */ 16446f7afa3SGreg Kurz VMSTATE_END_OF_LIST() 16546f7afa3SGreg Kurz }, 16646f7afa3SGreg Kurz }; 16746f7afa3SGreg Kurz 16846f7afa3SGreg Kurz static void pre_2_10_vmstate_register_dummy_icp(int i) 16946f7afa3SGreg Kurz { 17046f7afa3SGreg Kurz vmstate_register(NULL, i, &pre_2_10_vmstate_dummy_icp, 17146f7afa3SGreg Kurz (void *)(uintptr_t) i); 17246f7afa3SGreg Kurz } 17346f7afa3SGreg Kurz 17446f7afa3SGreg Kurz static void pre_2_10_vmstate_unregister_dummy_icp(int i) 17546f7afa3SGreg Kurz { 17646f7afa3SGreg Kurz vmstate_unregister(NULL, &pre_2_10_vmstate_dummy_icp, 17746f7afa3SGreg Kurz (void *)(uintptr_t) i); 17846f7afa3SGreg Kurz } 17946f7afa3SGreg Kurz 18072194664SGreg Kurz static int xics_max_server_number(sPAPRMachineState *spapr) 18146f7afa3SGreg Kurz { 1821a5008fcSGreg Kurz assert(spapr->vsmt); 18372194664SGreg Kurz return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads); 18446f7afa3SGreg Kurz } 18546f7afa3SGreg Kurz 18671cd4dacSCédric Le Goater static void xics_system_init(MachineState *machine, int nr_irqs, Error **errp) 187c04d6cfaSAnthony Liguori { 18871cd4dacSCédric Le Goater sPAPRMachineState *spapr = SPAPR_MACHINE(machine); 189c04d6cfaSAnthony Liguori 19011ad93f6SDavid Gibson if (kvm_enabled()) { 1912192a930SCédric Le Goater if (machine_kernel_irqchip_allowed(machine) && 19271cd4dacSCédric Le Goater !xics_kvm_init(spapr, errp)) { 19371cd4dacSCédric Le Goater spapr->icp_type = TYPE_KVM_ICP; 1943d85885aSGreg Kurz spapr->ics = spapr_ics_create(spapr, TYPE_ICS_KVM, nr_irqs, errp); 19511ad93f6SDavid Gibson } 19671cd4dacSCédric Le Goater if (machine_kernel_irqchip_required(machine) && !spapr->ics) { 1973d85885aSGreg Kurz error_prepend(errp, "kernel_irqchip requested but unavailable: "); 1983d85885aSGreg Kurz return; 19911ad93f6SDavid Gibson } 200b83baa60SMarkus Armbruster } 20111ad93f6SDavid Gibson 20271cd4dacSCédric Le Goater if (!spapr->ics) { 203f63ebfe0SGreg Kurz xics_spapr_init(spapr); 20471cd4dacSCédric Le Goater spapr->icp_type = TYPE_ICP; 20571cd4dacSCédric Le Goater spapr->ics = spapr_ics_create(spapr, TYPE_ICS_SIMPLE, nr_irqs, errp); 2063d85885aSGreg Kurz if (!spapr->ics) { 2073d85885aSGreg Kurz return; 2083d85885aSGreg Kurz } 209c04d6cfaSAnthony Liguori } 210c04d6cfaSAnthony Liguori } 211c04d6cfaSAnthony Liguori 212833d4668SAlexey Kardashevskiy static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu, 213833d4668SAlexey Kardashevskiy int smt_threads) 214833d4668SAlexey Kardashevskiy { 215833d4668SAlexey Kardashevskiy int i, ret = 0; 216833d4668SAlexey Kardashevskiy uint32_t servers_prop[smt_threads]; 217833d4668SAlexey Kardashevskiy uint32_t gservers_prop[smt_threads * 2]; 21814bb4486SGreg Kurz int index = spapr_get_vcpu_id(cpu); 219833d4668SAlexey Kardashevskiy 220d6e166c0SDavid Gibson if (cpu->compat_pvr) { 221d6e166c0SDavid Gibson ret = fdt_setprop_cell(fdt, offset, "cpu-version", cpu->compat_pvr); 2226d9412eaSAlexey Kardashevskiy if (ret < 0) { 2236d9412eaSAlexey Kardashevskiy return ret; 2246d9412eaSAlexey Kardashevskiy } 2256d9412eaSAlexey Kardashevskiy } 2266d9412eaSAlexey Kardashevskiy 227833d4668SAlexey Kardashevskiy /* Build interrupt servers and gservers properties */ 228833d4668SAlexey Kardashevskiy for (i = 0; i < smt_threads; i++) { 229833d4668SAlexey Kardashevskiy servers_prop[i] = cpu_to_be32(index + i); 230833d4668SAlexey Kardashevskiy /* Hack, direct the group queues back to cpu 0 */ 231833d4668SAlexey Kardashevskiy gservers_prop[i*2] = cpu_to_be32(index + i); 232833d4668SAlexey Kardashevskiy gservers_prop[i*2 + 1] = 0; 233833d4668SAlexey Kardashevskiy } 234833d4668SAlexey Kardashevskiy ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-server#s", 235833d4668SAlexey Kardashevskiy servers_prop, sizeof(servers_prop)); 236833d4668SAlexey Kardashevskiy if (ret < 0) { 237833d4668SAlexey Kardashevskiy return ret; 238833d4668SAlexey Kardashevskiy } 239833d4668SAlexey Kardashevskiy ret = fdt_setprop(fdt, offset, "ibm,ppc-interrupt-gserver#s", 240833d4668SAlexey Kardashevskiy gservers_prop, sizeof(gservers_prop)); 241833d4668SAlexey Kardashevskiy 242833d4668SAlexey Kardashevskiy return ret; 243833d4668SAlexey Kardashevskiy } 244833d4668SAlexey Kardashevskiy 24599861ecbSIgor Mammedov static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, PowerPCCPU *cpu) 2460da6f3feSBharata B Rao { 24714bb4486SGreg Kurz int index = spapr_get_vcpu_id(cpu); 2480da6f3feSBharata B Rao uint32_t associativity[] = {cpu_to_be32(0x5), 2490da6f3feSBharata B Rao cpu_to_be32(0x0), 2500da6f3feSBharata B Rao cpu_to_be32(0x0), 2510da6f3feSBharata B Rao cpu_to_be32(0x0), 25215f8b142SIgor Mammedov cpu_to_be32(cpu->node_id), 2530da6f3feSBharata B Rao cpu_to_be32(index)}; 2540da6f3feSBharata B Rao 2550da6f3feSBharata B Rao /* Advertise NUMA via ibm,associativity */ 25699861ecbSIgor Mammedov return fdt_setprop(fdt, offset, "ibm,associativity", associativity, 2570da6f3feSBharata B Rao sizeof(associativity)); 2580da6f3feSBharata B Rao } 2590da6f3feSBharata B Rao 26086d5771aSSam Bobroff /* Populate the "ibm,pa-features" property */ 261ee76a09fSDavid Gibson static void spapr_populate_pa_features(sPAPRMachineState *spapr, 262ee76a09fSDavid Gibson PowerPCCPU *cpu, 263ee76a09fSDavid Gibson void *fdt, int offset, 264e957f6a9SSam Bobroff bool legacy_guest) 26586d5771aSSam Bobroff { 26686d5771aSSam Bobroff uint8_t pa_features_206[] = { 6, 0, 26786d5771aSSam Bobroff 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 }; 26886d5771aSSam Bobroff uint8_t pa_features_207[] = { 24, 0, 26986d5771aSSam Bobroff 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, 27086d5771aSSam Bobroff 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 27186d5771aSSam Bobroff 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 27286d5771aSSam Bobroff 0x80, 0x00, 0x80, 0x00, 0x00, 0x00 }; 2739fb4541fSSam Bobroff uint8_t pa_features_300[] = { 66, 0, 2749fb4541fSSam Bobroff /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */ 2759fb4541fSSam Bobroff /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */ 27686d5771aSSam Bobroff 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */ 2779fb4541fSSam Bobroff /* 6: DS207 */ 27886d5771aSSam Bobroff 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */ 2799fb4541fSSam Bobroff /* 16: Vector */ 28086d5771aSSam Bobroff 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */ 2819fb4541fSSam Bobroff /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */ 2829bf502feSDavid Gibson 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */ 2839fb4541fSSam Bobroff /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */ 2849fb4541fSSam Bobroff 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */ 2859fb4541fSSam Bobroff /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */ 2869fb4541fSSam Bobroff 0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */ 2879fb4541fSSam Bobroff /* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */ 2889fb4541fSSam Bobroff 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */ 2899fb4541fSSam Bobroff /* 42: PM, 44: PC RA, 46: SC vec'd */ 2909fb4541fSSam Bobroff 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */ 2919fb4541fSSam Bobroff /* 48: SIMD, 50: QP BFP, 52: String */ 2929fb4541fSSam Bobroff 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */ 2939fb4541fSSam Bobroff /* 54: DecFP, 56: DecI, 58: SHA */ 2949fb4541fSSam Bobroff 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */ 2959fb4541fSSam Bobroff /* 60: NM atomic, 62: RNG */ 2969fb4541fSSam Bobroff 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */ 2979fb4541fSSam Bobroff }; 2987abd43baSSuraj Jitindar Singh uint8_t *pa_features = NULL; 29986d5771aSSam Bobroff size_t pa_size; 30086d5771aSSam Bobroff 3017abd43baSSuraj Jitindar Singh if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06, 0, cpu->compat_pvr)) { 30286d5771aSSam Bobroff pa_features = pa_features_206; 30386d5771aSSam Bobroff pa_size = sizeof(pa_features_206); 3047abd43baSSuraj Jitindar Singh } 3057abd43baSSuraj Jitindar Singh if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_07, 0, cpu->compat_pvr)) { 30686d5771aSSam Bobroff pa_features = pa_features_207; 30786d5771aSSam Bobroff pa_size = sizeof(pa_features_207); 3087abd43baSSuraj Jitindar Singh } 3097abd43baSSuraj Jitindar Singh if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, cpu->compat_pvr)) { 31086d5771aSSam Bobroff pa_features = pa_features_300; 31186d5771aSSam Bobroff pa_size = sizeof(pa_features_300); 3127abd43baSSuraj Jitindar Singh } 3137abd43baSSuraj Jitindar Singh if (!pa_features) { 31486d5771aSSam Bobroff return; 31586d5771aSSam Bobroff } 31686d5771aSSam Bobroff 31726cd35b8SDavid Gibson if (ppc_hash64_has(cpu, PPC_HASH64_CI_LARGEPAGE)) { 31886d5771aSSam Bobroff /* 31986d5771aSSam Bobroff * Note: we keep CI large pages off by default because a 64K capable 32086d5771aSSam Bobroff * guest provisioned with large pages might otherwise try to map a qemu 32186d5771aSSam Bobroff * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages 32286d5771aSSam Bobroff * even if that qemu runs on a 4k host. 32386d5771aSSam Bobroff * We dd this bit back here if we are confident this is not an issue 32486d5771aSSam Bobroff */ 32586d5771aSSam Bobroff pa_features[3] |= 0x20; 32686d5771aSSam Bobroff } 3274e5fe368SSuraj Jitindar Singh if ((spapr_get_cap(spapr, SPAPR_CAP_HTM) != 0) && pa_size > 24) { 32886d5771aSSam Bobroff pa_features[24] |= 0x80; /* Transactional memory support */ 32986d5771aSSam Bobroff } 330e957f6a9SSam Bobroff if (legacy_guest && pa_size > 40) { 331e957f6a9SSam Bobroff /* Workaround for broken kernels that attempt (guest) radix 332e957f6a9SSam Bobroff * mode when they can't handle it, if they see the radix bit set 333e957f6a9SSam Bobroff * in pa-features. So hide it from them. */ 334e957f6a9SSam Bobroff pa_features[40 + 2] &= ~0x80; /* Radix MMU */ 335e957f6a9SSam Bobroff } 33686d5771aSSam Bobroff 33786d5771aSSam Bobroff _FDT((fdt_setprop(fdt, offset, "ibm,pa-features", pa_features, pa_size))); 33886d5771aSSam Bobroff } 33986d5771aSSam Bobroff 34028e02042SDavid Gibson static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr) 34153018216SPaolo Bonzini { 34282677ed2SAlexey Kardashevskiy int ret = 0, offset, cpus_offset; 34382677ed2SAlexey Kardashevskiy CPUState *cs; 34453018216SPaolo Bonzini char cpu_model[32]; 34553018216SPaolo Bonzini uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)}; 34653018216SPaolo Bonzini 34782677ed2SAlexey Kardashevskiy CPU_FOREACH(cs) { 34882677ed2SAlexey Kardashevskiy PowerPCCPU *cpu = POWERPC_CPU(cs); 34982677ed2SAlexey Kardashevskiy DeviceClass *dc = DEVICE_GET_CLASS(cs); 35014bb4486SGreg Kurz int index = spapr_get_vcpu_id(cpu); 351abbc1247SDavid Gibson int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu)); 35253018216SPaolo Bonzini 3535d0fb150SGreg Kurz if (!spapr_is_thread0_in_vcore(spapr, cpu)) { 35453018216SPaolo Bonzini continue; 35553018216SPaolo Bonzini } 35653018216SPaolo Bonzini 35782677ed2SAlexey Kardashevskiy snprintf(cpu_model, 32, "%s@%x", dc->fw_name, index); 35853018216SPaolo Bonzini 35982677ed2SAlexey Kardashevskiy cpus_offset = fdt_path_offset(fdt, "/cpus"); 36082677ed2SAlexey Kardashevskiy if (cpus_offset < 0) { 361a4f3885cSGreg Kurz cpus_offset = fdt_add_subnode(fdt, 0, "cpus"); 36282677ed2SAlexey Kardashevskiy if (cpus_offset < 0) { 36382677ed2SAlexey Kardashevskiy return cpus_offset; 36482677ed2SAlexey Kardashevskiy } 36582677ed2SAlexey Kardashevskiy } 36682677ed2SAlexey Kardashevskiy offset = fdt_subnode_offset(fdt, cpus_offset, cpu_model); 36782677ed2SAlexey Kardashevskiy if (offset < 0) { 36882677ed2SAlexey Kardashevskiy offset = fdt_add_subnode(fdt, cpus_offset, cpu_model); 36953018216SPaolo Bonzini if (offset < 0) { 37053018216SPaolo Bonzini return offset; 37153018216SPaolo Bonzini } 37282677ed2SAlexey Kardashevskiy } 37353018216SPaolo Bonzini 3740da6f3feSBharata B Rao ret = fdt_setprop(fdt, offset, "ibm,pft-size", 3750da6f3feSBharata B Rao pft_size_prop, sizeof(pft_size_prop)); 37653018216SPaolo Bonzini if (ret < 0) { 37753018216SPaolo Bonzini return ret; 37853018216SPaolo Bonzini } 37953018216SPaolo Bonzini 38099861ecbSIgor Mammedov if (nb_numa_nodes > 1) { 38199861ecbSIgor Mammedov ret = spapr_fixup_cpu_numa_dt(fdt, offset, cpu); 38253018216SPaolo Bonzini if (ret < 0) { 38353018216SPaolo Bonzini return ret; 38453018216SPaolo Bonzini } 38599861ecbSIgor Mammedov } 386833d4668SAlexey Kardashevskiy 38712dbeb16SDavid Gibson ret = spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt); 388833d4668SAlexey Kardashevskiy if (ret < 0) { 389833d4668SAlexey Kardashevskiy return ret; 390833d4668SAlexey Kardashevskiy } 391e957f6a9SSam Bobroff 392ee76a09fSDavid Gibson spapr_populate_pa_features(spapr, cpu, fdt, offset, 393e957f6a9SSam Bobroff spapr->cas_legacy_guest_workaround); 39453018216SPaolo Bonzini } 39553018216SPaolo Bonzini return ret; 39653018216SPaolo Bonzini } 39753018216SPaolo Bonzini 398c86c1affSDaniel Henrique Barboza static hwaddr spapr_node0_size(MachineState *machine) 399b082d65aSAlexey Kardashevskiy { 400b082d65aSAlexey Kardashevskiy if (nb_numa_nodes) { 401b082d65aSAlexey Kardashevskiy int i; 402b082d65aSAlexey Kardashevskiy for (i = 0; i < nb_numa_nodes; ++i) { 403b082d65aSAlexey Kardashevskiy if (numa_info[i].node_mem) { 404fb164994SDavid Gibson return MIN(pow2floor(numa_info[i].node_mem), 405fb164994SDavid Gibson machine->ram_size); 406b082d65aSAlexey Kardashevskiy } 407b082d65aSAlexey Kardashevskiy } 408b082d65aSAlexey Kardashevskiy } 409fb164994SDavid Gibson return machine->ram_size; 410b082d65aSAlexey Kardashevskiy } 411b082d65aSAlexey Kardashevskiy 412a1d59c0fSAlexey Kardashevskiy static void add_str(GString *s, const gchar *s1) 413a1d59c0fSAlexey Kardashevskiy { 414a1d59c0fSAlexey Kardashevskiy g_string_append_len(s, s1, strlen(s1) + 1); 415a1d59c0fSAlexey Kardashevskiy } 41653018216SPaolo Bonzini 41703d196b7SBharata B Rao static int spapr_populate_memory_node(void *fdt, int nodeid, hwaddr start, 41826a8c353SAlexey Kardashevskiy hwaddr size) 41926a8c353SAlexey Kardashevskiy { 42026a8c353SAlexey Kardashevskiy uint32_t associativity[] = { 42126a8c353SAlexey Kardashevskiy cpu_to_be32(0x4), /* length */ 42226a8c353SAlexey Kardashevskiy cpu_to_be32(0x0), cpu_to_be32(0x0), 423c3b4f589SAlexey Kardashevskiy cpu_to_be32(0x0), cpu_to_be32(nodeid) 42426a8c353SAlexey Kardashevskiy }; 42526a8c353SAlexey Kardashevskiy char mem_name[32]; 42626a8c353SAlexey Kardashevskiy uint64_t mem_reg_property[2]; 42726a8c353SAlexey Kardashevskiy int off; 42826a8c353SAlexey Kardashevskiy 42926a8c353SAlexey Kardashevskiy mem_reg_property[0] = cpu_to_be64(start); 43026a8c353SAlexey Kardashevskiy mem_reg_property[1] = cpu_to_be64(size); 43126a8c353SAlexey Kardashevskiy 43226a8c353SAlexey Kardashevskiy sprintf(mem_name, "memory@" TARGET_FMT_lx, start); 43326a8c353SAlexey Kardashevskiy off = fdt_add_subnode(fdt, 0, mem_name); 43426a8c353SAlexey Kardashevskiy _FDT(off); 43526a8c353SAlexey Kardashevskiy _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); 43626a8c353SAlexey Kardashevskiy _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property, 43726a8c353SAlexey Kardashevskiy sizeof(mem_reg_property)))); 43826a8c353SAlexey Kardashevskiy _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity, 43926a8c353SAlexey Kardashevskiy sizeof(associativity)))); 44003d196b7SBharata B Rao return off; 44126a8c353SAlexey Kardashevskiy } 44226a8c353SAlexey Kardashevskiy 44328e02042SDavid Gibson static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt) 44453018216SPaolo Bonzini { 445fb164994SDavid Gibson MachineState *machine = MACHINE(spapr); 4467db8a127SAlexey Kardashevskiy hwaddr mem_start, node_size; 4477db8a127SAlexey Kardashevskiy int i, nb_nodes = nb_numa_nodes; 4487db8a127SAlexey Kardashevskiy NodeInfo *nodes = numa_info; 4497db8a127SAlexey Kardashevskiy NodeInfo ramnode; 45053018216SPaolo Bonzini 4517db8a127SAlexey Kardashevskiy /* No NUMA nodes, assume there is just one node with whole RAM */ 4527db8a127SAlexey Kardashevskiy if (!nb_numa_nodes) { 4537db8a127SAlexey Kardashevskiy nb_nodes = 1; 454fb164994SDavid Gibson ramnode.node_mem = machine->ram_size; 4557db8a127SAlexey Kardashevskiy nodes = &ramnode; 4565fe269b1SPaul Mackerras } 45753018216SPaolo Bonzini 4587db8a127SAlexey Kardashevskiy for (i = 0, mem_start = 0; i < nb_nodes; ++i) { 4597db8a127SAlexey Kardashevskiy if (!nodes[i].node_mem) { 4607db8a127SAlexey Kardashevskiy continue; 46153018216SPaolo Bonzini } 462fb164994SDavid Gibson if (mem_start >= machine->ram_size) { 4635fe269b1SPaul Mackerras node_size = 0; 4645fe269b1SPaul Mackerras } else { 4657db8a127SAlexey Kardashevskiy node_size = nodes[i].node_mem; 466fb164994SDavid Gibson if (node_size > machine->ram_size - mem_start) { 467fb164994SDavid Gibson node_size = machine->ram_size - mem_start; 4685fe269b1SPaul Mackerras } 4695fe269b1SPaul Mackerras } 4707db8a127SAlexey Kardashevskiy if (!mem_start) { 471b472b1a7SDaniel Henrique Barboza /* spapr_machine_init() checks for rma_size <= node0_size 472b472b1a7SDaniel Henrique Barboza * already */ 473e8f986fcSBharata B Rao spapr_populate_memory_node(fdt, i, 0, spapr->rma_size); 4747db8a127SAlexey Kardashevskiy mem_start += spapr->rma_size; 4757db8a127SAlexey Kardashevskiy node_size -= spapr->rma_size; 4767db8a127SAlexey Kardashevskiy } 4776010818cSAlexey Kardashevskiy for ( ; node_size; ) { 4786010818cSAlexey Kardashevskiy hwaddr sizetmp = pow2floor(node_size); 4796010818cSAlexey Kardashevskiy 4806010818cSAlexey Kardashevskiy /* mem_start != 0 here */ 4816010818cSAlexey Kardashevskiy if (ctzl(mem_start) < ctzl(sizetmp)) { 4826010818cSAlexey Kardashevskiy sizetmp = 1ULL << ctzl(mem_start); 4836010818cSAlexey Kardashevskiy } 4846010818cSAlexey Kardashevskiy 4856010818cSAlexey Kardashevskiy spapr_populate_memory_node(fdt, i, mem_start, sizetmp); 4866010818cSAlexey Kardashevskiy node_size -= sizetmp; 4876010818cSAlexey Kardashevskiy mem_start += sizetmp; 4886010818cSAlexey Kardashevskiy } 48953018216SPaolo Bonzini } 49053018216SPaolo Bonzini 49153018216SPaolo Bonzini return 0; 49253018216SPaolo Bonzini } 49353018216SPaolo Bonzini 4940da6f3feSBharata B Rao static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset, 4950da6f3feSBharata B Rao sPAPRMachineState *spapr) 4960da6f3feSBharata B Rao { 4970da6f3feSBharata B Rao PowerPCCPU *cpu = POWERPC_CPU(cs); 4980da6f3feSBharata B Rao CPUPPCState *env = &cpu->env; 4990da6f3feSBharata B Rao PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); 50014bb4486SGreg Kurz int index = spapr_get_vcpu_id(cpu); 5010da6f3feSBharata B Rao uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), 5020da6f3feSBharata B Rao 0xffffffff, 0xffffffff}; 503afd10a0fSBharata B Rao uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() 504afd10a0fSBharata B Rao : SPAPR_TIMEBASE_FREQ; 5050da6f3feSBharata B Rao uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000; 5060da6f3feSBharata B Rao uint32_t page_sizes_prop[64]; 5070da6f3feSBharata B Rao size_t page_sizes_prop_size; 50822419c2aSDavid Gibson uint32_t vcpus_per_socket = smp_threads * smp_cores; 5090da6f3feSBharata B Rao uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)}; 510abbc1247SDavid Gibson int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu)); 511af81cf32SBharata B Rao sPAPRDRConnector *drc; 512af81cf32SBharata B Rao int drc_index; 513c64abd1fSSam Bobroff uint32_t radix_AP_encodings[PPC_PAGE_SIZES_MAX_SZ]; 514c64abd1fSSam Bobroff int i; 515af81cf32SBharata B Rao 516fbf55397SDavid Gibson drc = spapr_drc_by_id(TYPE_SPAPR_DRC_CPU, index); 517af81cf32SBharata B Rao if (drc) { 5180b55aa91SDavid Gibson drc_index = spapr_drc_index(drc); 519af81cf32SBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "ibm,my-drc-index", drc_index))); 520af81cf32SBharata B Rao } 5210da6f3feSBharata B Rao 5220da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "reg", index))); 5230da6f3feSBharata B Rao _FDT((fdt_setprop_string(fdt, offset, "device_type", "cpu"))); 5240da6f3feSBharata B Rao 5250da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "cpu-version", env->spr[SPR_PVR]))); 5260da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "d-cache-block-size", 5270da6f3feSBharata B Rao env->dcache_line_size))); 5280da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "d-cache-line-size", 5290da6f3feSBharata B Rao env->dcache_line_size))); 5300da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "i-cache-block-size", 5310da6f3feSBharata B Rao env->icache_line_size))); 5320da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "i-cache-line-size", 5330da6f3feSBharata B Rao env->icache_line_size))); 5340da6f3feSBharata B Rao 5350da6f3feSBharata B Rao if (pcc->l1_dcache_size) { 5360da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "d-cache-size", 5370da6f3feSBharata B Rao pcc->l1_dcache_size))); 5380da6f3feSBharata B Rao } else { 5393dc6f869SAlistair Francis warn_report("Unknown L1 dcache size for cpu"); 5400da6f3feSBharata B Rao } 5410da6f3feSBharata B Rao if (pcc->l1_icache_size) { 5420da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "i-cache-size", 5430da6f3feSBharata B Rao pcc->l1_icache_size))); 5440da6f3feSBharata B Rao } else { 5453dc6f869SAlistair Francis warn_report("Unknown L1 icache size for cpu"); 5460da6f3feSBharata B Rao } 5470da6f3feSBharata B Rao 5480da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq))); 5490da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "clock-frequency", cpufreq))); 55067d7d66fSDavid Gibson _FDT((fdt_setprop_cell(fdt, offset, "slb-size", cpu->hash64_opts->slb_size))); 55167d7d66fSDavid Gibson _FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size", cpu->hash64_opts->slb_size))); 5520da6f3feSBharata B Rao _FDT((fdt_setprop_string(fdt, offset, "status", "okay"))); 5530da6f3feSBharata B Rao _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0))); 5540da6f3feSBharata B Rao 5550da6f3feSBharata B Rao if (env->spr_cb[SPR_PURR].oea_read) { 5560da6f3feSBharata B Rao _FDT((fdt_setprop(fdt, offset, "ibm,purr", NULL, 0))); 5570da6f3feSBharata B Rao } 5580da6f3feSBharata B Rao 55958969eeeSDavid Gibson if (ppc_hash64_has(cpu, PPC_HASH64_1TSEG)) { 5600da6f3feSBharata B Rao _FDT((fdt_setprop(fdt, offset, "ibm,processor-segment-sizes", 5610da6f3feSBharata B Rao segs, sizeof(segs)))); 5620da6f3feSBharata B Rao } 5630da6f3feSBharata B Rao 56429386642SDavid Gibson /* Advertise VSX (vector extensions) if available 5650da6f3feSBharata B Rao * 1 == VMX / Altivec available 56629386642SDavid Gibson * 2 == VSX available 56729386642SDavid Gibson * 56829386642SDavid Gibson * Only CPUs for which we create core types in spapr_cpu_core.c 56929386642SDavid Gibson * are possible, and all of those have VMX */ 5704e5fe368SSuraj Jitindar Singh if (spapr_get_cap(spapr, SPAPR_CAP_VSX) != 0) { 57129386642SDavid Gibson _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 2))); 57229386642SDavid Gibson } else { 57329386642SDavid Gibson _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 1))); 5740da6f3feSBharata B Rao } 5750da6f3feSBharata B Rao 5760da6f3feSBharata B Rao /* Advertise DFP (Decimal Floating Point) if available 5770da6f3feSBharata B Rao * 0 / no property == no DFP 5780da6f3feSBharata B Rao * 1 == DFP available */ 5794e5fe368SSuraj Jitindar Singh if (spapr_get_cap(spapr, SPAPR_CAP_DFP) != 0) { 5800da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1))); 5810da6f3feSBharata B Rao } 5820da6f3feSBharata B Rao 583644a2c99SDavid Gibson page_sizes_prop_size = ppc_create_page_sizes_prop(cpu, page_sizes_prop, 5840da6f3feSBharata B Rao sizeof(page_sizes_prop)); 5850da6f3feSBharata B Rao if (page_sizes_prop_size) { 5860da6f3feSBharata B Rao _FDT((fdt_setprop(fdt, offset, "ibm,segment-page-sizes", 5870da6f3feSBharata B Rao page_sizes_prop, page_sizes_prop_size))); 5880da6f3feSBharata B Rao } 5890da6f3feSBharata B Rao 590ee76a09fSDavid Gibson spapr_populate_pa_features(spapr, cpu, fdt, offset, false); 59190da0d5aSBenjamin Herrenschmidt 5920da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id", 59322419c2aSDavid Gibson cs->cpu_index / vcpus_per_socket))); 5940da6f3feSBharata B Rao 5950da6f3feSBharata B Rao _FDT((fdt_setprop(fdt, offset, "ibm,pft-size", 5960da6f3feSBharata B Rao pft_size_prop, sizeof(pft_size_prop)))); 5970da6f3feSBharata B Rao 59899861ecbSIgor Mammedov if (nb_numa_nodes > 1) { 59999861ecbSIgor Mammedov _FDT(spapr_fixup_cpu_numa_dt(fdt, offset, cpu)); 60099861ecbSIgor Mammedov } 6010da6f3feSBharata B Rao 60212dbeb16SDavid Gibson _FDT(spapr_fixup_cpu_smt_dt(fdt, offset, cpu, compat_smt)); 603c64abd1fSSam Bobroff 604c64abd1fSSam Bobroff if (pcc->radix_page_info) { 605c64abd1fSSam Bobroff for (i = 0; i < pcc->radix_page_info->count; i++) { 606c64abd1fSSam Bobroff radix_AP_encodings[i] = 607c64abd1fSSam Bobroff cpu_to_be32(pcc->radix_page_info->entries[i]); 608c64abd1fSSam Bobroff } 609c64abd1fSSam Bobroff _FDT((fdt_setprop(fdt, offset, "ibm,processor-radix-AP-encodings", 610c64abd1fSSam Bobroff radix_AP_encodings, 611c64abd1fSSam Bobroff pcc->radix_page_info->count * 612c64abd1fSSam Bobroff sizeof(radix_AP_encodings[0])))); 613c64abd1fSSam Bobroff } 6140da6f3feSBharata B Rao } 6150da6f3feSBharata B Rao 6160da6f3feSBharata B Rao static void spapr_populate_cpus_dt_node(void *fdt, sPAPRMachineState *spapr) 6170da6f3feSBharata B Rao { 6180da6f3feSBharata B Rao CPUState *cs; 6190da6f3feSBharata B Rao int cpus_offset; 6200da6f3feSBharata B Rao char *nodename; 6210da6f3feSBharata B Rao 6220da6f3feSBharata B Rao cpus_offset = fdt_add_subnode(fdt, 0, "cpus"); 6230da6f3feSBharata B Rao _FDT(cpus_offset); 6240da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, cpus_offset, "#address-cells", 0x1))); 6250da6f3feSBharata B Rao _FDT((fdt_setprop_cell(fdt, cpus_offset, "#size-cells", 0x0))); 6260da6f3feSBharata B Rao 6270da6f3feSBharata B Rao /* 6280da6f3feSBharata B Rao * We walk the CPUs in reverse order to ensure that CPU DT nodes 6290da6f3feSBharata B Rao * created by fdt_add_subnode() end up in the right order in FDT 6300da6f3feSBharata B Rao * for the guest kernel the enumerate the CPUs correctly. 6310da6f3feSBharata B Rao */ 6320da6f3feSBharata B Rao CPU_FOREACH_REVERSE(cs) { 6330da6f3feSBharata B Rao PowerPCCPU *cpu = POWERPC_CPU(cs); 63414bb4486SGreg Kurz int index = spapr_get_vcpu_id(cpu); 6350da6f3feSBharata B Rao DeviceClass *dc = DEVICE_GET_CLASS(cs); 6360da6f3feSBharata B Rao int offset; 6370da6f3feSBharata B Rao 6385d0fb150SGreg Kurz if (!spapr_is_thread0_in_vcore(spapr, cpu)) { 6390da6f3feSBharata B Rao continue; 6400da6f3feSBharata B Rao } 6410da6f3feSBharata B Rao 6420da6f3feSBharata B Rao nodename = g_strdup_printf("%s@%x", dc->fw_name, index); 6430da6f3feSBharata B Rao offset = fdt_add_subnode(fdt, cpus_offset, nodename); 6440da6f3feSBharata B Rao g_free(nodename); 6450da6f3feSBharata B Rao _FDT(offset); 6460da6f3feSBharata B Rao spapr_populate_cpu_dt(cs, fdt, offset, spapr); 6470da6f3feSBharata B Rao } 6480da6f3feSBharata B Rao 6490da6f3feSBharata B Rao } 6500da6f3feSBharata B Rao 651f47bd1c8SIgor Mammedov static uint32_t spapr_pc_dimm_node(MemoryDeviceInfoList *list, ram_addr_t addr) 652f47bd1c8SIgor Mammedov { 653f47bd1c8SIgor Mammedov MemoryDeviceInfoList *info; 654f47bd1c8SIgor Mammedov 655f47bd1c8SIgor Mammedov for (info = list; info; info = info->next) { 656f47bd1c8SIgor Mammedov MemoryDeviceInfo *value = info->value; 657f47bd1c8SIgor Mammedov 658f47bd1c8SIgor Mammedov if (value && value->type == MEMORY_DEVICE_INFO_KIND_DIMM) { 659f47bd1c8SIgor Mammedov PCDIMMDeviceInfo *pcdimm_info = value->u.dimm.data; 660f47bd1c8SIgor Mammedov 661f47bd1c8SIgor Mammedov if (pcdimm_info->addr >= addr && 662f47bd1c8SIgor Mammedov addr < (pcdimm_info->addr + pcdimm_info->size)) { 663f47bd1c8SIgor Mammedov return pcdimm_info->node; 664f47bd1c8SIgor Mammedov } 665f47bd1c8SIgor Mammedov } 666f47bd1c8SIgor Mammedov } 667f47bd1c8SIgor Mammedov 668f47bd1c8SIgor Mammedov return -1; 669f47bd1c8SIgor Mammedov } 670f47bd1c8SIgor Mammedov 671a324d6f1SBharata B Rao struct sPAPRDrconfCellV2 { 672a324d6f1SBharata B Rao uint32_t seq_lmbs; 673a324d6f1SBharata B Rao uint64_t base_addr; 674a324d6f1SBharata B Rao uint32_t drc_index; 675a324d6f1SBharata B Rao uint32_t aa_index; 676a324d6f1SBharata B Rao uint32_t flags; 677a324d6f1SBharata B Rao } QEMU_PACKED; 678a324d6f1SBharata B Rao 679a324d6f1SBharata B Rao typedef struct DrconfCellQueue { 680a324d6f1SBharata B Rao struct sPAPRDrconfCellV2 cell; 681a324d6f1SBharata B Rao QSIMPLEQ_ENTRY(DrconfCellQueue) entry; 682a324d6f1SBharata B Rao } DrconfCellQueue; 683a324d6f1SBharata B Rao 684a324d6f1SBharata B Rao static DrconfCellQueue * 685a324d6f1SBharata B Rao spapr_get_drconf_cell(uint32_t seq_lmbs, uint64_t base_addr, 686a324d6f1SBharata B Rao uint32_t drc_index, uint32_t aa_index, 687a324d6f1SBharata B Rao uint32_t flags) 68803d196b7SBharata B Rao { 689a324d6f1SBharata B Rao DrconfCellQueue *elem; 690a324d6f1SBharata B Rao 691a324d6f1SBharata B Rao elem = g_malloc0(sizeof(*elem)); 692a324d6f1SBharata B Rao elem->cell.seq_lmbs = cpu_to_be32(seq_lmbs); 693a324d6f1SBharata B Rao elem->cell.base_addr = cpu_to_be64(base_addr); 694a324d6f1SBharata B Rao elem->cell.drc_index = cpu_to_be32(drc_index); 695a324d6f1SBharata B Rao elem->cell.aa_index = cpu_to_be32(aa_index); 696a324d6f1SBharata B Rao elem->cell.flags = cpu_to_be32(flags); 697a324d6f1SBharata B Rao 698a324d6f1SBharata B Rao return elem; 699a324d6f1SBharata B Rao } 700a324d6f1SBharata B Rao 701a324d6f1SBharata B Rao /* ibm,dynamic-memory-v2 */ 702a324d6f1SBharata B Rao static int spapr_populate_drmem_v2(sPAPRMachineState *spapr, void *fdt, 703a324d6f1SBharata B Rao int offset, MemoryDeviceInfoList *dimms) 704a324d6f1SBharata B Rao { 705a324d6f1SBharata B Rao uint8_t *int_buf, *cur_index, buf_len; 706a324d6f1SBharata B Rao int ret; 70703d196b7SBharata B Rao uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE; 708a324d6f1SBharata B Rao uint64_t addr, cur_addr, size; 709a324d6f1SBharata B Rao uint32_t nr_boot_lmbs = (spapr->hotplug_memory.base / lmb_size); 710a324d6f1SBharata B Rao uint64_t mem_end = spapr->hotplug_memory.base + 711a324d6f1SBharata B Rao memory_region_size(&spapr->hotplug_memory.mr); 712a324d6f1SBharata B Rao uint32_t node, nr_entries = 0; 713a324d6f1SBharata B Rao sPAPRDRConnector *drc; 714a324d6f1SBharata B Rao DrconfCellQueue *elem, *next; 715a324d6f1SBharata B Rao MemoryDeviceInfoList *info; 716a324d6f1SBharata B Rao QSIMPLEQ_HEAD(, DrconfCellQueue) drconf_queue 717a324d6f1SBharata B Rao = QSIMPLEQ_HEAD_INITIALIZER(drconf_queue); 718a324d6f1SBharata B Rao 719a324d6f1SBharata B Rao /* Entry to cover RAM and the gap area */ 720a324d6f1SBharata B Rao elem = spapr_get_drconf_cell(nr_boot_lmbs, 0, 0, -1, 721a324d6f1SBharata B Rao SPAPR_LMB_FLAGS_RESERVED | 722a324d6f1SBharata B Rao SPAPR_LMB_FLAGS_DRC_INVALID); 723a324d6f1SBharata B Rao QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry); 724a324d6f1SBharata B Rao nr_entries++; 725a324d6f1SBharata B Rao 726a324d6f1SBharata B Rao cur_addr = spapr->hotplug_memory.base; 727a324d6f1SBharata B Rao for (info = dimms; info; info = info->next) { 728a324d6f1SBharata B Rao PCDIMMDeviceInfo *di = info->value->u.dimm.data; 729a324d6f1SBharata B Rao 730a324d6f1SBharata B Rao addr = di->addr; 731a324d6f1SBharata B Rao size = di->size; 732a324d6f1SBharata B Rao node = di->node; 733a324d6f1SBharata B Rao 734a324d6f1SBharata B Rao /* Entry for hot-pluggable area */ 735a324d6f1SBharata B Rao if (cur_addr < addr) { 736a324d6f1SBharata B Rao drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, cur_addr / lmb_size); 737a324d6f1SBharata B Rao g_assert(drc); 738a324d6f1SBharata B Rao elem = spapr_get_drconf_cell((addr - cur_addr) / lmb_size, 739a324d6f1SBharata B Rao cur_addr, spapr_drc_index(drc), -1, 0); 740a324d6f1SBharata B Rao QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry); 741a324d6f1SBharata B Rao nr_entries++; 742a324d6f1SBharata B Rao } 743a324d6f1SBharata B Rao 744a324d6f1SBharata B Rao /* Entry for DIMM */ 745a324d6f1SBharata B Rao drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, addr / lmb_size); 746a324d6f1SBharata B Rao g_assert(drc); 747a324d6f1SBharata B Rao elem = spapr_get_drconf_cell(size / lmb_size, addr, 748a324d6f1SBharata B Rao spapr_drc_index(drc), node, 749a324d6f1SBharata B Rao SPAPR_LMB_FLAGS_ASSIGNED); 750a324d6f1SBharata B Rao QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry); 751a324d6f1SBharata B Rao nr_entries++; 752a324d6f1SBharata B Rao cur_addr = addr + size; 753a324d6f1SBharata B Rao } 754a324d6f1SBharata B Rao 755a324d6f1SBharata B Rao /* Entry for remaining hotpluggable area */ 756a324d6f1SBharata B Rao if (cur_addr < mem_end) { 757a324d6f1SBharata B Rao drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, cur_addr / lmb_size); 758a324d6f1SBharata B Rao g_assert(drc); 759a324d6f1SBharata B Rao elem = spapr_get_drconf_cell((mem_end - cur_addr) / lmb_size, 760a324d6f1SBharata B Rao cur_addr, spapr_drc_index(drc), -1, 0); 761a324d6f1SBharata B Rao QSIMPLEQ_INSERT_TAIL(&drconf_queue, elem, entry); 762a324d6f1SBharata B Rao nr_entries++; 763a324d6f1SBharata B Rao } 764a324d6f1SBharata B Rao 765a324d6f1SBharata B Rao buf_len = nr_entries * sizeof(struct sPAPRDrconfCellV2) + sizeof(uint32_t); 766a324d6f1SBharata B Rao int_buf = cur_index = g_malloc0(buf_len); 767a324d6f1SBharata B Rao *(uint32_t *)int_buf = cpu_to_be32(nr_entries); 768a324d6f1SBharata B Rao cur_index += sizeof(nr_entries); 769a324d6f1SBharata B Rao 770a324d6f1SBharata B Rao QSIMPLEQ_FOREACH_SAFE(elem, &drconf_queue, entry, next) { 771a324d6f1SBharata B Rao memcpy(cur_index, &elem->cell, sizeof(elem->cell)); 772a324d6f1SBharata B Rao cur_index += sizeof(elem->cell); 773a324d6f1SBharata B Rao QSIMPLEQ_REMOVE(&drconf_queue, elem, DrconfCellQueue, entry); 774a324d6f1SBharata B Rao g_free(elem); 775a324d6f1SBharata B Rao } 776a324d6f1SBharata B Rao 777a324d6f1SBharata B Rao ret = fdt_setprop(fdt, offset, "ibm,dynamic-memory-v2", int_buf, buf_len); 778a324d6f1SBharata B Rao g_free(int_buf); 779a324d6f1SBharata B Rao if (ret < 0) { 780a324d6f1SBharata B Rao return -1; 781a324d6f1SBharata B Rao } 782a324d6f1SBharata B Rao return 0; 783a324d6f1SBharata B Rao } 784a324d6f1SBharata B Rao 785a324d6f1SBharata B Rao /* ibm,dynamic-memory */ 786a324d6f1SBharata B Rao static int spapr_populate_drmem_v1(sPAPRMachineState *spapr, void *fdt, 787a324d6f1SBharata B Rao int offset, MemoryDeviceInfoList *dimms) 788a324d6f1SBharata B Rao { 789a324d6f1SBharata B Rao int i, ret; 790a324d6f1SBharata B Rao uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE; 791d0e5a8f2SBharata B Rao uint32_t hotplug_lmb_start = spapr->hotplug_memory.base / lmb_size; 792d0e5a8f2SBharata B Rao uint32_t nr_lmbs = (spapr->hotplug_memory.base + 793d0e5a8f2SBharata B Rao memory_region_size(&spapr->hotplug_memory.mr)) / 794d0e5a8f2SBharata B Rao lmb_size; 79503d196b7SBharata B Rao uint32_t *int_buf, *cur_index, buf_len; 79616c25aefSBharata B Rao 79716c25aefSBharata B Rao /* 798ef001f06SThomas Huth * Allocate enough buffer size to fit in ibm,dynamic-memory 799ef001f06SThomas Huth */ 800a324d6f1SBharata B Rao buf_len = (nr_lmbs * SPAPR_DR_LMB_LIST_ENTRY_SIZE + 1) * sizeof(uint32_t); 80103d196b7SBharata B Rao cur_index = int_buf = g_malloc0(buf_len); 80203d196b7SBharata B Rao int_buf[0] = cpu_to_be32(nr_lmbs); 80303d196b7SBharata B Rao cur_index++; 80403d196b7SBharata B Rao for (i = 0; i < nr_lmbs; i++) { 805d0e5a8f2SBharata B Rao uint64_t addr = i * lmb_size; 80603d196b7SBharata B Rao uint32_t *dynamic_memory = cur_index; 80703d196b7SBharata B Rao 808d0e5a8f2SBharata B Rao if (i >= hotplug_lmb_start) { 809d0e5a8f2SBharata B Rao sPAPRDRConnector *drc; 810d0e5a8f2SBharata B Rao 811fbf55397SDavid Gibson drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, i); 81203d196b7SBharata B Rao g_assert(drc); 81303d196b7SBharata B Rao 81403d196b7SBharata B Rao dynamic_memory[0] = cpu_to_be32(addr >> 32); 81503d196b7SBharata B Rao dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff); 8160b55aa91SDavid Gibson dynamic_memory[2] = cpu_to_be32(spapr_drc_index(drc)); 81703d196b7SBharata B Rao dynamic_memory[3] = cpu_to_be32(0); /* reserved */ 818f47bd1c8SIgor Mammedov dynamic_memory[4] = cpu_to_be32(spapr_pc_dimm_node(dimms, addr)); 819d0e5a8f2SBharata B Rao if (memory_region_present(get_system_memory(), addr)) { 82003d196b7SBharata B Rao dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED); 82103d196b7SBharata B Rao } else { 82203d196b7SBharata B Rao dynamic_memory[5] = cpu_to_be32(0); 82303d196b7SBharata B Rao } 824d0e5a8f2SBharata B Rao } else { 825d0e5a8f2SBharata B Rao /* 826d0e5a8f2SBharata B Rao * LMB information for RMA, boot time RAM and gap b/n RAM and 827d0e5a8f2SBharata B Rao * hotplug memory region -- all these are marked as reserved 828d0e5a8f2SBharata B Rao * and as having no valid DRC. 829d0e5a8f2SBharata B Rao */ 830d0e5a8f2SBharata B Rao dynamic_memory[0] = cpu_to_be32(addr >> 32); 831d0e5a8f2SBharata B Rao dynamic_memory[1] = cpu_to_be32(addr & 0xffffffff); 832d0e5a8f2SBharata B Rao dynamic_memory[2] = cpu_to_be32(0); 833d0e5a8f2SBharata B Rao dynamic_memory[3] = cpu_to_be32(0); /* reserved */ 834d0e5a8f2SBharata B Rao dynamic_memory[4] = cpu_to_be32(-1); 835d0e5a8f2SBharata B Rao dynamic_memory[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED | 836d0e5a8f2SBharata B Rao SPAPR_LMB_FLAGS_DRC_INVALID); 837d0e5a8f2SBharata B Rao } 83803d196b7SBharata B Rao 83903d196b7SBharata B Rao cur_index += SPAPR_DR_LMB_LIST_ENTRY_SIZE; 84003d196b7SBharata B Rao } 84103d196b7SBharata B Rao ret = fdt_setprop(fdt, offset, "ibm,dynamic-memory", int_buf, buf_len); 842a324d6f1SBharata B Rao g_free(int_buf); 84303d196b7SBharata B Rao if (ret < 0) { 844a324d6f1SBharata B Rao return -1; 845a324d6f1SBharata B Rao } 846a324d6f1SBharata B Rao return 0; 847a324d6f1SBharata B Rao } 848a324d6f1SBharata B Rao 849a324d6f1SBharata B Rao /* 850a324d6f1SBharata B Rao * Adds ibm,dynamic-reconfiguration-memory node. 851a324d6f1SBharata B Rao * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation 852a324d6f1SBharata B Rao * of this device tree node. 853a324d6f1SBharata B Rao */ 854a324d6f1SBharata B Rao static int spapr_populate_drconf_memory(sPAPRMachineState *spapr, void *fdt) 855a324d6f1SBharata B Rao { 856a324d6f1SBharata B Rao MachineState *machine = MACHINE(spapr); 857a324d6f1SBharata B Rao int ret, i, offset; 858a324d6f1SBharata B Rao uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE; 859a324d6f1SBharata B Rao uint32_t prop_lmb_size[] = {0, cpu_to_be32(lmb_size)}; 860a324d6f1SBharata B Rao uint32_t *int_buf, *cur_index, buf_len; 861a324d6f1SBharata B Rao int nr_nodes = nb_numa_nodes ? nb_numa_nodes : 1; 862a324d6f1SBharata B Rao MemoryDeviceInfoList *dimms = NULL; 863a324d6f1SBharata B Rao 864a324d6f1SBharata B Rao /* 865a324d6f1SBharata B Rao * Don't create the node if there is no hotpluggable memory 866a324d6f1SBharata B Rao */ 867a324d6f1SBharata B Rao if (machine->ram_size == machine->maxram_size) { 868a324d6f1SBharata B Rao return 0; 869a324d6f1SBharata B Rao } 870a324d6f1SBharata B Rao 871a324d6f1SBharata B Rao offset = fdt_add_subnode(fdt, 0, "ibm,dynamic-reconfiguration-memory"); 872a324d6f1SBharata B Rao 873a324d6f1SBharata B Rao ret = fdt_setprop(fdt, offset, "ibm,lmb-size", prop_lmb_size, 874a324d6f1SBharata B Rao sizeof(prop_lmb_size)); 875a324d6f1SBharata B Rao if (ret < 0) { 876a324d6f1SBharata B Rao return ret; 877a324d6f1SBharata B Rao } 878a324d6f1SBharata B Rao 879a324d6f1SBharata B Rao ret = fdt_setprop_cell(fdt, offset, "ibm,memory-flags-mask", 0xff); 880a324d6f1SBharata B Rao if (ret < 0) { 881a324d6f1SBharata B Rao return ret; 882a324d6f1SBharata B Rao } 883a324d6f1SBharata B Rao 884a324d6f1SBharata B Rao ret = fdt_setprop_cell(fdt, offset, "ibm,memory-preservation-time", 0x0); 885a324d6f1SBharata B Rao if (ret < 0) { 886a324d6f1SBharata B Rao return ret; 887a324d6f1SBharata B Rao } 888a324d6f1SBharata B Rao 889a324d6f1SBharata B Rao /* ibm,dynamic-memory or ibm,dynamic-memory-v2 */ 890a324d6f1SBharata B Rao dimms = qmp_pc_dimm_device_list(); 891a324d6f1SBharata B Rao if (spapr_ovec_test(spapr->ov5_cas, OV5_DRMEM_V2)) { 892a324d6f1SBharata B Rao ret = spapr_populate_drmem_v2(spapr, fdt, offset, dimms); 893a324d6f1SBharata B Rao } else { 894a324d6f1SBharata B Rao ret = spapr_populate_drmem_v1(spapr, fdt, offset, dimms); 895a324d6f1SBharata B Rao } 896a324d6f1SBharata B Rao qapi_free_MemoryDeviceInfoList(dimms); 897a324d6f1SBharata B Rao 898a324d6f1SBharata B Rao if (ret < 0) { 899a324d6f1SBharata B Rao return ret; 90003d196b7SBharata B Rao } 90103d196b7SBharata B Rao 90203d196b7SBharata B Rao /* ibm,associativity-lookup-arrays */ 903a324d6f1SBharata B Rao buf_len = (nr_nodes * 4 + 2) * sizeof(uint32_t); 904a324d6f1SBharata B Rao cur_index = int_buf = g_malloc0(buf_len); 905a324d6f1SBharata B Rao 90603d196b7SBharata B Rao cur_index = int_buf; 9076663864eSBharata B Rao int_buf[0] = cpu_to_be32(nr_nodes); 90803d196b7SBharata B Rao int_buf[1] = cpu_to_be32(4); /* Number of entries per associativity list */ 90903d196b7SBharata B Rao cur_index += 2; 9106663864eSBharata B Rao for (i = 0; i < nr_nodes; i++) { 91103d196b7SBharata B Rao uint32_t associativity[] = { 91203d196b7SBharata B Rao cpu_to_be32(0x0), 91303d196b7SBharata B Rao cpu_to_be32(0x0), 91403d196b7SBharata B Rao cpu_to_be32(0x0), 91503d196b7SBharata B Rao cpu_to_be32(i) 91603d196b7SBharata B Rao }; 91703d196b7SBharata B Rao memcpy(cur_index, associativity, sizeof(associativity)); 91803d196b7SBharata B Rao cur_index += 4; 91903d196b7SBharata B Rao } 92003d196b7SBharata B Rao ret = fdt_setprop(fdt, offset, "ibm,associativity-lookup-arrays", int_buf, 92103d196b7SBharata B Rao (cur_index - int_buf) * sizeof(uint32_t)); 92203d196b7SBharata B Rao g_free(int_buf); 923a324d6f1SBharata B Rao 92403d196b7SBharata B Rao return ret; 92503d196b7SBharata B Rao } 92603d196b7SBharata B Rao 9276787d27bSMichael Roth static int spapr_dt_cas_updates(sPAPRMachineState *spapr, void *fdt, 9286787d27bSMichael Roth sPAPROptionVector *ov5_updates) 9296787d27bSMichael Roth { 9306787d27bSMichael Roth sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); 931417ece33SMichael Roth int ret = 0, offset; 9326787d27bSMichael Roth 9336787d27bSMichael Roth /* Generate ibm,dynamic-reconfiguration-memory node if required */ 9346787d27bSMichael Roth if (spapr_ovec_test(ov5_updates, OV5_DRCONF_MEMORY)) { 9356787d27bSMichael Roth g_assert(smc->dr_lmb_enabled); 9366787d27bSMichael Roth ret = spapr_populate_drconf_memory(spapr, fdt); 937417ece33SMichael Roth if (ret) { 938417ece33SMichael Roth goto out; 939417ece33SMichael Roth } 9406787d27bSMichael Roth } 9416787d27bSMichael Roth 942417ece33SMichael Roth offset = fdt_path_offset(fdt, "/chosen"); 943417ece33SMichael Roth if (offset < 0) { 944417ece33SMichael Roth offset = fdt_add_subnode(fdt, 0, "chosen"); 945417ece33SMichael Roth if (offset < 0) { 946417ece33SMichael Roth return offset; 947417ece33SMichael Roth } 948417ece33SMichael Roth } 949417ece33SMichael Roth ret = spapr_ovec_populate_dt(fdt, offset, spapr->ov5_cas, 950417ece33SMichael Roth "ibm,architecture-vec-5"); 951417ece33SMichael Roth 952417ece33SMichael Roth out: 9536787d27bSMichael Roth return ret; 9546787d27bSMichael Roth } 9556787d27bSMichael Roth 95610f12e64SDaniel Henrique Barboza static bool spapr_hotplugged_dev_before_cas(void) 95710f12e64SDaniel Henrique Barboza { 95810f12e64SDaniel Henrique Barboza Object *drc_container, *obj; 95910f12e64SDaniel Henrique Barboza ObjectProperty *prop; 96010f12e64SDaniel Henrique Barboza ObjectPropertyIterator iter; 96110f12e64SDaniel Henrique Barboza 96210f12e64SDaniel Henrique Barboza drc_container = container_get(object_get_root(), "/dr-connector"); 96310f12e64SDaniel Henrique Barboza object_property_iter_init(&iter, drc_container); 96410f12e64SDaniel Henrique Barboza while ((prop = object_property_iter_next(&iter))) { 96510f12e64SDaniel Henrique Barboza if (!strstart(prop->type, "link<", NULL)) { 96610f12e64SDaniel Henrique Barboza continue; 96710f12e64SDaniel Henrique Barboza } 96810f12e64SDaniel Henrique Barboza obj = object_property_get_link(drc_container, prop->name, NULL); 96910f12e64SDaniel Henrique Barboza if (spapr_drc_needed(obj)) { 97010f12e64SDaniel Henrique Barboza return true; 97110f12e64SDaniel Henrique Barboza } 97210f12e64SDaniel Henrique Barboza } 97310f12e64SDaniel Henrique Barboza return false; 97410f12e64SDaniel Henrique Barboza } 97510f12e64SDaniel Henrique Barboza 97603d196b7SBharata B Rao int spapr_h_cas_compose_response(sPAPRMachineState *spapr, 97703d196b7SBharata B Rao target_ulong addr, target_ulong size, 9786787d27bSMichael Roth sPAPROptionVector *ov5_updates) 97903d196b7SBharata B Rao { 98003d196b7SBharata B Rao void *fdt, *fdt_skel; 98103d196b7SBharata B Rao sPAPRDeviceTreeUpdateHeader hdr = { .version_id = 1 }; 98203d196b7SBharata B Rao 98310f12e64SDaniel Henrique Barboza if (spapr_hotplugged_dev_before_cas()) { 98410f12e64SDaniel Henrique Barboza return 1; 98510f12e64SDaniel Henrique Barboza } 98610f12e64SDaniel Henrique Barboza 987827b17c4SGreg Kurz if (size < sizeof(hdr) || size > FW_MAX_SIZE) { 988827b17c4SGreg Kurz error_report("SLOF provided an unexpected CAS buffer size " 989827b17c4SGreg Kurz TARGET_FMT_lu " (min: %zu, max: %u)", 990827b17c4SGreg Kurz size, sizeof(hdr), FW_MAX_SIZE); 991827b17c4SGreg Kurz exit(EXIT_FAILURE); 992827b17c4SGreg Kurz } 993827b17c4SGreg Kurz 99403d196b7SBharata B Rao size -= sizeof(hdr); 99503d196b7SBharata B Rao 99610f12e64SDaniel Henrique Barboza /* Create skeleton */ 99703d196b7SBharata B Rao fdt_skel = g_malloc0(size); 99803d196b7SBharata B Rao _FDT((fdt_create(fdt_skel, size))); 999127f03e4SAlexey Kardashevskiy _FDT((fdt_finish_reservemap(fdt_skel))); 100003d196b7SBharata B Rao _FDT((fdt_begin_node(fdt_skel, ""))); 100103d196b7SBharata B Rao _FDT((fdt_end_node(fdt_skel))); 100203d196b7SBharata B Rao _FDT((fdt_finish(fdt_skel))); 100303d196b7SBharata B Rao fdt = g_malloc0(size); 100403d196b7SBharata B Rao _FDT((fdt_open_into(fdt_skel, fdt, size))); 100503d196b7SBharata B Rao g_free(fdt_skel); 100603d196b7SBharata B Rao 100703d196b7SBharata B Rao /* Fixup cpu nodes */ 100803d196b7SBharata B Rao _FDT((spapr_fixup_cpu_dt(fdt, spapr))); 100903d196b7SBharata B Rao 10106787d27bSMichael Roth if (spapr_dt_cas_updates(spapr, fdt, ov5_updates)) { 10116787d27bSMichael Roth return -1; 101203d196b7SBharata B Rao } 101303d196b7SBharata B Rao 101403d196b7SBharata B Rao /* Pack resulting tree */ 101503d196b7SBharata B Rao _FDT((fdt_pack(fdt))); 101603d196b7SBharata B Rao 101703d196b7SBharata B Rao if (fdt_totalsize(fdt) + sizeof(hdr) > size) { 101803d196b7SBharata B Rao trace_spapr_cas_failed(size); 101903d196b7SBharata B Rao return -1; 102003d196b7SBharata B Rao } 102103d196b7SBharata B Rao 102203d196b7SBharata B Rao cpu_physical_memory_write(addr, &hdr, sizeof(hdr)); 102303d196b7SBharata B Rao cpu_physical_memory_write(addr + sizeof(hdr), fdt, fdt_totalsize(fdt)); 102403d196b7SBharata B Rao trace_spapr_cas_continue(fdt_totalsize(fdt) + sizeof(hdr)); 102503d196b7SBharata B Rao g_free(fdt); 102603d196b7SBharata B Rao 102703d196b7SBharata B Rao return 0; 102803d196b7SBharata B Rao } 102903d196b7SBharata B Rao 10303f5dabceSDavid Gibson static void spapr_dt_rtas(sPAPRMachineState *spapr, void *fdt) 10313f5dabceSDavid Gibson { 10323f5dabceSDavid Gibson int rtas; 10333f5dabceSDavid Gibson GString *hypertas = g_string_sized_new(256); 10343f5dabceSDavid Gibson GString *qemu_hypertas = g_string_sized_new(256); 10353f5dabceSDavid Gibson uint32_t refpoints[] = { cpu_to_be32(0x4), cpu_to_be32(0x4) }; 10363f5dabceSDavid Gibson uint64_t max_hotplug_addr = spapr->hotplug_memory.base + 10373f5dabceSDavid Gibson memory_region_size(&spapr->hotplug_memory.mr); 10383f5dabceSDavid Gibson uint32_t lrdr_capacity[] = { 10393f5dabceSDavid Gibson cpu_to_be32(max_hotplug_addr >> 32), 10403f5dabceSDavid Gibson cpu_to_be32(max_hotplug_addr & 0xffffffff), 10413f5dabceSDavid Gibson 0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE), 10423f5dabceSDavid Gibson cpu_to_be32(max_cpus / smp_threads), 10433f5dabceSDavid Gibson }; 1044da9f80fbSSerhii Popovych uint32_t maxdomains[] = { 1045da9f80fbSSerhii Popovych cpu_to_be32(4), 1046da9f80fbSSerhii Popovych cpu_to_be32(0), 1047da9f80fbSSerhii Popovych cpu_to_be32(0), 1048da9f80fbSSerhii Popovych cpu_to_be32(0), 1049da9f80fbSSerhii Popovych cpu_to_be32(nb_numa_nodes ? nb_numa_nodes - 1 : 0), 1050da9f80fbSSerhii Popovych }; 10513f5dabceSDavid Gibson 10523f5dabceSDavid Gibson _FDT(rtas = fdt_add_subnode(fdt, 0, "rtas")); 10533f5dabceSDavid Gibson 10543f5dabceSDavid Gibson /* hypertas */ 10553f5dabceSDavid Gibson add_str(hypertas, "hcall-pft"); 10563f5dabceSDavid Gibson add_str(hypertas, "hcall-term"); 10573f5dabceSDavid Gibson add_str(hypertas, "hcall-dabr"); 10583f5dabceSDavid Gibson add_str(hypertas, "hcall-interrupt"); 10593f5dabceSDavid Gibson add_str(hypertas, "hcall-tce"); 10603f5dabceSDavid Gibson add_str(hypertas, "hcall-vio"); 10613f5dabceSDavid Gibson add_str(hypertas, "hcall-splpar"); 10623f5dabceSDavid Gibson add_str(hypertas, "hcall-bulk"); 10633f5dabceSDavid Gibson add_str(hypertas, "hcall-set-mode"); 10643f5dabceSDavid Gibson add_str(hypertas, "hcall-sprg0"); 10653f5dabceSDavid Gibson add_str(hypertas, "hcall-copy"); 10663f5dabceSDavid Gibson add_str(hypertas, "hcall-debug"); 10673f5dabceSDavid Gibson add_str(qemu_hypertas, "hcall-memop1"); 10683f5dabceSDavid Gibson 10693f5dabceSDavid Gibson if (!kvm_enabled() || kvmppc_spapr_use_multitce()) { 10703f5dabceSDavid Gibson add_str(hypertas, "hcall-multi-tce"); 10713f5dabceSDavid Gibson } 107230f4b05bSDavid Gibson 107330f4b05bSDavid Gibson if (spapr->resize_hpt != SPAPR_RESIZE_HPT_DISABLED) { 107430f4b05bSDavid Gibson add_str(hypertas, "hcall-hpt-resize"); 107530f4b05bSDavid Gibson } 107630f4b05bSDavid Gibson 10773f5dabceSDavid Gibson _FDT(fdt_setprop(fdt, rtas, "ibm,hypertas-functions", 10783f5dabceSDavid Gibson hypertas->str, hypertas->len)); 10793f5dabceSDavid Gibson g_string_free(hypertas, TRUE); 10803f5dabceSDavid Gibson _FDT(fdt_setprop(fdt, rtas, "qemu,hypertas-functions", 10813f5dabceSDavid Gibson qemu_hypertas->str, qemu_hypertas->len)); 10823f5dabceSDavid Gibson g_string_free(qemu_hypertas, TRUE); 10833f5dabceSDavid Gibson 10843f5dabceSDavid Gibson _FDT(fdt_setprop(fdt, rtas, "ibm,associativity-reference-points", 10853f5dabceSDavid Gibson refpoints, sizeof(refpoints))); 10863f5dabceSDavid Gibson 1087da9f80fbSSerhii Popovych _FDT(fdt_setprop(fdt, rtas, "ibm,max-associativity-domains", 1088da9f80fbSSerhii Popovych maxdomains, sizeof(maxdomains))); 1089da9f80fbSSerhii Popovych 10903f5dabceSDavid Gibson _FDT(fdt_setprop_cell(fdt, rtas, "rtas-error-log-max", 10913f5dabceSDavid Gibson RTAS_ERROR_LOG_MAX)); 10923f5dabceSDavid Gibson _FDT(fdt_setprop_cell(fdt, rtas, "rtas-event-scan-rate", 10933f5dabceSDavid Gibson RTAS_EVENT_SCAN_RATE)); 10943f5dabceSDavid Gibson 10954f441474SDavid Gibson g_assert(msi_nonbroken); 10963f5dabceSDavid Gibson _FDT(fdt_setprop(fdt, rtas, "ibm,change-msix-capable", NULL, 0)); 10973f5dabceSDavid Gibson 10983f5dabceSDavid Gibson /* 10993f5dabceSDavid Gibson * According to PAPR, rtas ibm,os-term does not guarantee a return 11003f5dabceSDavid Gibson * back to the guest cpu. 11013f5dabceSDavid Gibson * 11023f5dabceSDavid Gibson * While an additional ibm,extended-os-term property indicates 11033f5dabceSDavid Gibson * that rtas call return will always occur. Set this property. 11043f5dabceSDavid Gibson */ 11053f5dabceSDavid Gibson _FDT(fdt_setprop(fdt, rtas, "ibm,extended-os-term", NULL, 0)); 11063f5dabceSDavid Gibson 11073f5dabceSDavid Gibson _FDT(fdt_setprop(fdt, rtas, "ibm,lrdr-capacity", 11083f5dabceSDavid Gibson lrdr_capacity, sizeof(lrdr_capacity))); 11093f5dabceSDavid Gibson 11103f5dabceSDavid Gibson spapr_dt_rtas_tokens(fdt, rtas); 11113f5dabceSDavid Gibson } 11123f5dabceSDavid Gibson 11139fb4541fSSam Bobroff /* Prepare ibm,arch-vec-5-platform-support, which indicates the MMU features 11149fb4541fSSam Bobroff * that the guest may request and thus the valid values for bytes 24..26 of 11159fb4541fSSam Bobroff * option vector 5: */ 11169fb4541fSSam Bobroff static void spapr_dt_ov5_platform_support(void *fdt, int chosen) 11179fb4541fSSam Bobroff { 1118545d6e2bSSuraj Jitindar Singh PowerPCCPU *first_ppc_cpu = POWERPC_CPU(first_cpu); 1119545d6e2bSSuraj Jitindar Singh 1120f2b14e3aSCédric Le Goater char val[2 * 4] = { 112121f3f8dbSCédric Le Goater 23, 0x00, /* Xive mode, filled in below. */ 11229fb4541fSSam Bobroff 24, 0x00, /* Hash/Radix, filled in below. */ 11239fb4541fSSam Bobroff 25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */ 11249fb4541fSSam Bobroff 26, 0x40, /* Radix options: GTSE == yes. */ 11259fb4541fSSam Bobroff }; 11269fb4541fSSam Bobroff 11277abd43baSSuraj Jitindar Singh if (!ppc_check_compat(first_ppc_cpu, CPU_POWERPC_LOGICAL_3_00, 0, 11287abd43baSSuraj Jitindar Singh first_ppc_cpu->compat_pvr)) { 11297abd43baSSuraj Jitindar Singh /* If we're in a pre POWER9 compat mode then the guest should do hash */ 11307abd43baSSuraj Jitindar Singh val[3] = 0x00; /* Hash */ 11317abd43baSSuraj Jitindar Singh } else if (kvm_enabled()) { 11329fb4541fSSam Bobroff if (kvmppc_has_cap_mmu_radix() && kvmppc_has_cap_mmu_hash_v3()) { 1133f2b14e3aSCédric Le Goater val[3] = 0x80; /* OV5_MMU_BOTH */ 11349fb4541fSSam Bobroff } else if (kvmppc_has_cap_mmu_radix()) { 1135f2b14e3aSCédric Le Goater val[3] = 0x40; /* OV5_MMU_RADIX_300 */ 11369fb4541fSSam Bobroff } else { 1137f2b14e3aSCédric Le Goater val[3] = 0x00; /* Hash */ 11389fb4541fSSam Bobroff } 11399fb4541fSSam Bobroff } else { 11407abd43baSSuraj Jitindar Singh /* V3 MMU supports both hash and radix in tcg (with dynamic switching) */ 1141f2b14e3aSCédric Le Goater val[3] = 0xC0; 1142545d6e2bSSuraj Jitindar Singh } 11439fb4541fSSam Bobroff _FDT(fdt_setprop(fdt, chosen, "ibm,arch-vec-5-platform-support", 11449fb4541fSSam Bobroff val, sizeof(val))); 11459fb4541fSSam Bobroff } 11469fb4541fSSam Bobroff 11477c866c6aSDavid Gibson static void spapr_dt_chosen(sPAPRMachineState *spapr, void *fdt) 11487c866c6aSDavid Gibson { 11497c866c6aSDavid Gibson MachineState *machine = MACHINE(spapr); 11507c866c6aSDavid Gibson int chosen; 11517c866c6aSDavid Gibson const char *boot_device = machine->boot_order; 11527c866c6aSDavid Gibson char *stdout_path = spapr_vio_stdout_path(spapr->vio_bus); 11537c866c6aSDavid Gibson size_t cb = 0; 11547c866c6aSDavid Gibson char *bootlist = get_boot_devices_list(&cb, true); 11557c866c6aSDavid Gibson 11567c866c6aSDavid Gibson _FDT(chosen = fdt_add_subnode(fdt, 0, "chosen")); 11577c866c6aSDavid Gibson 11587c866c6aSDavid Gibson _FDT(fdt_setprop_string(fdt, chosen, "bootargs", machine->kernel_cmdline)); 11597c866c6aSDavid Gibson _FDT(fdt_setprop_cell(fdt, chosen, "linux,initrd-start", 11607c866c6aSDavid Gibson spapr->initrd_base)); 11617c866c6aSDavid Gibson _FDT(fdt_setprop_cell(fdt, chosen, "linux,initrd-end", 11627c866c6aSDavid Gibson spapr->initrd_base + spapr->initrd_size)); 11637c866c6aSDavid Gibson 11647c866c6aSDavid Gibson if (spapr->kernel_size) { 11657c866c6aSDavid Gibson uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR), 11667c866c6aSDavid Gibson cpu_to_be64(spapr->kernel_size) }; 11677c866c6aSDavid Gibson 11687c866c6aSDavid Gibson _FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel", 11697c866c6aSDavid Gibson &kprop, sizeof(kprop))); 11707c866c6aSDavid Gibson if (spapr->kernel_le) { 11717c866c6aSDavid Gibson _FDT(fdt_setprop(fdt, chosen, "qemu,boot-kernel-le", NULL, 0)); 11727c866c6aSDavid Gibson } 11737c866c6aSDavid Gibson } 11747c866c6aSDavid Gibson if (boot_menu) { 11757c866c6aSDavid Gibson _FDT((fdt_setprop_cell(fdt, chosen, "qemu,boot-menu", boot_menu))); 11767c866c6aSDavid Gibson } 11777c866c6aSDavid Gibson _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-width", graphic_width)); 11787c866c6aSDavid Gibson _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-height", graphic_height)); 11797c866c6aSDavid Gibson _FDT(fdt_setprop_cell(fdt, chosen, "qemu,graphic-depth", graphic_depth)); 11807c866c6aSDavid Gibson 11817c866c6aSDavid Gibson if (cb && bootlist) { 11827c866c6aSDavid Gibson int i; 11837c866c6aSDavid Gibson 11847c866c6aSDavid Gibson for (i = 0; i < cb; i++) { 11857c866c6aSDavid Gibson if (bootlist[i] == '\n') { 11867c866c6aSDavid Gibson bootlist[i] = ' '; 11877c866c6aSDavid Gibson } 11887c866c6aSDavid Gibson } 11897c866c6aSDavid Gibson _FDT(fdt_setprop_string(fdt, chosen, "qemu,boot-list", bootlist)); 11907c866c6aSDavid Gibson } 11917c866c6aSDavid Gibson 11927c866c6aSDavid Gibson if (boot_device && strlen(boot_device)) { 11937c866c6aSDavid Gibson _FDT(fdt_setprop_string(fdt, chosen, "qemu,boot-device", boot_device)); 11947c866c6aSDavid Gibson } 11957c866c6aSDavid Gibson 11967c866c6aSDavid Gibson if (!spapr->has_graphics && stdout_path) { 119790ee4e01SNikunj A Dadhania /* 119890ee4e01SNikunj A Dadhania * "linux,stdout-path" and "stdout" properties are deprecated by linux 119990ee4e01SNikunj A Dadhania * kernel. New platforms should only use the "stdout-path" property. Set 120090ee4e01SNikunj A Dadhania * the new property and continue using older property to remain 120190ee4e01SNikunj A Dadhania * compatible with the existing firmware. 120290ee4e01SNikunj A Dadhania */ 12037c866c6aSDavid Gibson _FDT(fdt_setprop_string(fdt, chosen, "linux,stdout-path", stdout_path)); 120490ee4e01SNikunj A Dadhania _FDT(fdt_setprop_string(fdt, chosen, "stdout-path", stdout_path)); 12057c866c6aSDavid Gibson } 12067c866c6aSDavid Gibson 12079fb4541fSSam Bobroff spapr_dt_ov5_platform_support(fdt, chosen); 12089fb4541fSSam Bobroff 12097c866c6aSDavid Gibson g_free(stdout_path); 12107c866c6aSDavid Gibson g_free(bootlist); 12117c866c6aSDavid Gibson } 12127c866c6aSDavid Gibson 1213fca5f2dcSDavid Gibson static void spapr_dt_hypervisor(sPAPRMachineState *spapr, void *fdt) 1214fca5f2dcSDavid Gibson { 1215fca5f2dcSDavid Gibson /* The /hypervisor node isn't in PAPR - this is a hack to allow PR 1216fca5f2dcSDavid Gibson * KVM to work under pHyp with some guest co-operation */ 1217fca5f2dcSDavid Gibson int hypervisor; 1218fca5f2dcSDavid Gibson uint8_t hypercall[16]; 1219fca5f2dcSDavid Gibson 1220fca5f2dcSDavid Gibson _FDT(hypervisor = fdt_add_subnode(fdt, 0, "hypervisor")); 1221fca5f2dcSDavid Gibson /* indicate KVM hypercall interface */ 1222fca5f2dcSDavid Gibson _FDT(fdt_setprop_string(fdt, hypervisor, "compatible", "linux,kvm")); 1223fca5f2dcSDavid Gibson if (kvmppc_has_cap_fixup_hcalls()) { 1224fca5f2dcSDavid Gibson /* 1225fca5f2dcSDavid Gibson * Older KVM versions with older guest kernels were broken 1226fca5f2dcSDavid Gibson * with the magic page, don't allow the guest to map it. 1227fca5f2dcSDavid Gibson */ 1228fca5f2dcSDavid Gibson if (!kvmppc_get_hypercall(first_cpu->env_ptr, hypercall, 1229fca5f2dcSDavid Gibson sizeof(hypercall))) { 1230fca5f2dcSDavid Gibson _FDT(fdt_setprop(fdt, hypervisor, "hcall-instructions", 1231fca5f2dcSDavid Gibson hypercall, sizeof(hypercall))); 1232fca5f2dcSDavid Gibson } 1233fca5f2dcSDavid Gibson } 1234fca5f2dcSDavid Gibson } 1235fca5f2dcSDavid Gibson 1236997b6cfcSDavid Gibson static void *spapr_build_fdt(sPAPRMachineState *spapr, 123753018216SPaolo Bonzini hwaddr rtas_addr, 123853018216SPaolo Bonzini hwaddr rtas_size) 123953018216SPaolo Bonzini { 1240c86c1affSDaniel Henrique Barboza MachineState *machine = MACHINE(spapr); 12413c0c47e3SDavid Gibson MachineClass *mc = MACHINE_GET_CLASS(machine); 1242c20d332aSBharata B Rao sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine); 12437c866c6aSDavid Gibson int ret; 124453018216SPaolo Bonzini void *fdt; 124553018216SPaolo Bonzini sPAPRPHBState *phb; 1246398a0bd5SDavid Gibson char *buf; 124753018216SPaolo Bonzini 1248398a0bd5SDavid Gibson fdt = g_malloc0(FDT_MAX_SIZE); 1249398a0bd5SDavid Gibson _FDT((fdt_create_empty_tree(fdt, FDT_MAX_SIZE))); 125053018216SPaolo Bonzini 1251398a0bd5SDavid Gibson /* Root node */ 1252398a0bd5SDavid Gibson _FDT(fdt_setprop_string(fdt, 0, "device_type", "chrp")); 1253398a0bd5SDavid Gibson _FDT(fdt_setprop_string(fdt, 0, "model", "IBM pSeries (emulated by qemu)")); 1254398a0bd5SDavid Gibson _FDT(fdt_setprop_string(fdt, 0, "compatible", "qemu,pseries")); 1255398a0bd5SDavid Gibson 1256398a0bd5SDavid Gibson /* 1257398a0bd5SDavid Gibson * Add info to guest to indentify which host is it being run on 1258398a0bd5SDavid Gibson * and what is the uuid of the guest 1259398a0bd5SDavid Gibson */ 1260398a0bd5SDavid Gibson if (kvmppc_get_host_model(&buf)) { 1261398a0bd5SDavid Gibson _FDT(fdt_setprop_string(fdt, 0, "host-model", buf)); 1262398a0bd5SDavid Gibson g_free(buf); 1263398a0bd5SDavid Gibson } 1264398a0bd5SDavid Gibson if (kvmppc_get_host_serial(&buf)) { 1265398a0bd5SDavid Gibson _FDT(fdt_setprop_string(fdt, 0, "host-serial", buf)); 1266398a0bd5SDavid Gibson g_free(buf); 1267398a0bd5SDavid Gibson } 1268398a0bd5SDavid Gibson 1269398a0bd5SDavid Gibson buf = qemu_uuid_unparse_strdup(&qemu_uuid); 1270398a0bd5SDavid Gibson 1271398a0bd5SDavid Gibson _FDT(fdt_setprop_string(fdt, 0, "vm,uuid", buf)); 1272398a0bd5SDavid Gibson if (qemu_uuid_set) { 1273398a0bd5SDavid Gibson _FDT(fdt_setprop_string(fdt, 0, "system-id", buf)); 1274398a0bd5SDavid Gibson } 1275398a0bd5SDavid Gibson g_free(buf); 1276398a0bd5SDavid Gibson 1277398a0bd5SDavid Gibson if (qemu_get_vm_name()) { 1278398a0bd5SDavid Gibson _FDT(fdt_setprop_string(fdt, 0, "ibm,partition-name", 1279398a0bd5SDavid Gibson qemu_get_vm_name())); 1280398a0bd5SDavid Gibson } 1281398a0bd5SDavid Gibson 1282398a0bd5SDavid Gibson _FDT(fdt_setprop_cell(fdt, 0, "#address-cells", 2)); 1283398a0bd5SDavid Gibson _FDT(fdt_setprop_cell(fdt, 0, "#size-cells", 2)); 128453018216SPaolo Bonzini 1285fc7e0765SDavid Gibson /* /interrupt controller */ 128672194664SGreg Kurz spapr_dt_xics(xics_max_server_number(spapr), fdt, PHANDLE_XICP); 1287fc7e0765SDavid Gibson 1288e8f986fcSBharata B Rao ret = spapr_populate_memory(spapr, fdt); 1289e8f986fcSBharata B Rao if (ret < 0) { 1290ce9863b7SCédric Le Goater error_report("couldn't setup memory nodes in fdt"); 1291e8f986fcSBharata B Rao exit(1); 129253018216SPaolo Bonzini } 129353018216SPaolo Bonzini 1294bf5a6696SDavid Gibson /* /vdevice */ 1295bf5a6696SDavid Gibson spapr_dt_vdevice(spapr->vio_bus, fdt); 129653018216SPaolo Bonzini 12974d9392beSThomas Huth if (object_resolve_path_type("", TYPE_SPAPR_RNG, NULL)) { 12984d9392beSThomas Huth ret = spapr_rng_populate_dt(fdt); 12994d9392beSThomas Huth if (ret < 0) { 1300ce9863b7SCédric Le Goater error_report("could not set up rng device in the fdt"); 13014d9392beSThomas Huth exit(1); 13024d9392beSThomas Huth } 13034d9392beSThomas Huth } 13044d9392beSThomas Huth 130553018216SPaolo Bonzini QLIST_FOREACH(phb, &spapr->phbs, list) { 130653018216SPaolo Bonzini ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt); 130753018216SPaolo Bonzini if (ret < 0) { 1308da34fed7SThomas Huth error_report("couldn't setup PCI devices in fdt"); 130953018216SPaolo Bonzini exit(1); 131053018216SPaolo Bonzini } 1311da34fed7SThomas Huth } 131253018216SPaolo Bonzini 13130da6f3feSBharata B Rao /* cpus */ 13140da6f3feSBharata B Rao spapr_populate_cpus_dt_node(fdt, spapr); 131553018216SPaolo Bonzini 1316c20d332aSBharata B Rao if (smc->dr_lmb_enabled) { 1317c20d332aSBharata B Rao _FDT(spapr_drc_populate_dt(fdt, 0, NULL, SPAPR_DR_CONNECTOR_TYPE_LMB)); 1318c20d332aSBharata B Rao } 1319c20d332aSBharata B Rao 1320c5514d0eSIgor Mammedov if (mc->has_hotpluggable_cpus) { 1321af81cf32SBharata B Rao int offset = fdt_path_offset(fdt, "/cpus"); 1322af81cf32SBharata B Rao ret = spapr_drc_populate_dt(fdt, offset, NULL, 1323af81cf32SBharata B Rao SPAPR_DR_CONNECTOR_TYPE_CPU); 1324af81cf32SBharata B Rao if (ret < 0) { 1325af81cf32SBharata B Rao error_report("Couldn't set up CPU DR device tree properties"); 1326af81cf32SBharata B Rao exit(1); 1327af81cf32SBharata B Rao } 1328af81cf32SBharata B Rao } 1329af81cf32SBharata B Rao 1330ffb1e275SDavid Gibson /* /event-sources */ 1331ffbb1705SMichael Roth spapr_dt_events(spapr, fdt); 1332ffb1e275SDavid Gibson 13333f5dabceSDavid Gibson /* /rtas */ 13343f5dabceSDavid Gibson spapr_dt_rtas(spapr, fdt); 13353f5dabceSDavid Gibson 13367c866c6aSDavid Gibson /* /chosen */ 13377c866c6aSDavid Gibson spapr_dt_chosen(spapr, fdt); 1338cf6e5223SDavid Gibson 1339fca5f2dcSDavid Gibson /* /hypervisor */ 1340fca5f2dcSDavid Gibson if (kvm_enabled()) { 1341fca5f2dcSDavid Gibson spapr_dt_hypervisor(spapr, fdt); 1342fca5f2dcSDavid Gibson } 1343fca5f2dcSDavid Gibson 1344cf6e5223SDavid Gibson /* Build memory reserve map */ 1345cf6e5223SDavid Gibson if (spapr->kernel_size) { 1346cf6e5223SDavid Gibson _FDT((fdt_add_mem_rsv(fdt, KERNEL_LOAD_ADDR, spapr->kernel_size))); 1347cf6e5223SDavid Gibson } 1348cf6e5223SDavid Gibson if (spapr->initrd_size) { 1349cf6e5223SDavid Gibson _FDT((fdt_add_mem_rsv(fdt, spapr->initrd_base, spapr->initrd_size))); 1350cf6e5223SDavid Gibson } 1351cf6e5223SDavid Gibson 13526787d27bSMichael Roth /* ibm,client-architecture-support updates */ 13536787d27bSMichael Roth ret = spapr_dt_cas_updates(spapr, fdt, spapr->ov5_cas); 13546787d27bSMichael Roth if (ret < 0) { 13556787d27bSMichael Roth error_report("couldn't setup CAS properties fdt"); 13566787d27bSMichael Roth exit(1); 13576787d27bSMichael Roth } 13586787d27bSMichael Roth 1359997b6cfcSDavid Gibson return fdt; 136053018216SPaolo Bonzini } 136153018216SPaolo Bonzini 136253018216SPaolo Bonzini static uint64_t translate_kernel_address(void *opaque, uint64_t addr) 136353018216SPaolo Bonzini { 136453018216SPaolo Bonzini return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; 136553018216SPaolo Bonzini } 136653018216SPaolo Bonzini 13671d1be34dSDavid Gibson static void emulate_spapr_hypercall(PPCVirtualHypervisor *vhyp, 13681d1be34dSDavid Gibson PowerPCCPU *cpu) 136953018216SPaolo Bonzini { 137053018216SPaolo Bonzini CPUPPCState *env = &cpu->env; 137153018216SPaolo Bonzini 13728d04fb55SJan Kiszka /* The TCG path should also be holding the BQL at this point */ 13738d04fb55SJan Kiszka g_assert(qemu_mutex_iothread_locked()); 13748d04fb55SJan Kiszka 137553018216SPaolo Bonzini if (msr_pr) { 137653018216SPaolo Bonzini hcall_dprintf("Hypercall made with MSR[PR]=1\n"); 137753018216SPaolo Bonzini env->gpr[3] = H_PRIVILEGE; 137853018216SPaolo Bonzini } else { 137953018216SPaolo Bonzini env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]); 138053018216SPaolo Bonzini } 138153018216SPaolo Bonzini } 138253018216SPaolo Bonzini 13839861bb3eSSuraj Jitindar Singh static uint64_t spapr_get_patbe(PPCVirtualHypervisor *vhyp) 13849861bb3eSSuraj Jitindar Singh { 13859861bb3eSSuraj Jitindar Singh sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp); 13869861bb3eSSuraj Jitindar Singh 13879861bb3eSSuraj Jitindar Singh return spapr->patb_entry; 13889861bb3eSSuraj Jitindar Singh } 13899861bb3eSSuraj Jitindar Singh 1390e6b8fd24SSamuel Mendoza-Jonas #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2)) 1391e6b8fd24SSamuel Mendoza-Jonas #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID) 1392e6b8fd24SSamuel Mendoza-Jonas #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY) 1393e6b8fd24SSamuel Mendoza-Jonas #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY)) 1394e6b8fd24SSamuel Mendoza-Jonas #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY)) 1395e6b8fd24SSamuel Mendoza-Jonas 1396715c5407SDavid Gibson /* 1397715c5407SDavid Gibson * Get the fd to access the kernel htab, re-opening it if necessary 1398715c5407SDavid Gibson */ 1399715c5407SDavid Gibson static int get_htab_fd(sPAPRMachineState *spapr) 1400715c5407SDavid Gibson { 140114b0d748SGreg Kurz Error *local_err = NULL; 140214b0d748SGreg Kurz 1403715c5407SDavid Gibson if (spapr->htab_fd >= 0) { 1404715c5407SDavid Gibson return spapr->htab_fd; 1405715c5407SDavid Gibson } 1406715c5407SDavid Gibson 140714b0d748SGreg Kurz spapr->htab_fd = kvmppc_get_htab_fd(false, 0, &local_err); 1408715c5407SDavid Gibson if (spapr->htab_fd < 0) { 140914b0d748SGreg Kurz error_report_err(local_err); 1410715c5407SDavid Gibson } 1411715c5407SDavid Gibson 1412715c5407SDavid Gibson return spapr->htab_fd; 1413715c5407SDavid Gibson } 1414715c5407SDavid Gibson 1415b4db5413SSuraj Jitindar Singh void close_htab_fd(sPAPRMachineState *spapr) 1416715c5407SDavid Gibson { 1417715c5407SDavid Gibson if (spapr->htab_fd >= 0) { 1418715c5407SDavid Gibson close(spapr->htab_fd); 1419715c5407SDavid Gibson } 1420715c5407SDavid Gibson spapr->htab_fd = -1; 1421715c5407SDavid Gibson } 1422715c5407SDavid Gibson 1423e57ca75cSDavid Gibson static hwaddr spapr_hpt_mask(PPCVirtualHypervisor *vhyp) 1424e57ca75cSDavid Gibson { 1425e57ca75cSDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp); 1426e57ca75cSDavid Gibson 1427e57ca75cSDavid Gibson return HTAB_SIZE(spapr) / HASH_PTEG_SIZE_64 - 1; 1428e57ca75cSDavid Gibson } 1429e57ca75cSDavid Gibson 14301ec26c75SGreg Kurz static target_ulong spapr_encode_hpt_for_kvm_pr(PPCVirtualHypervisor *vhyp) 14311ec26c75SGreg Kurz { 14321ec26c75SGreg Kurz sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp); 14331ec26c75SGreg Kurz 14341ec26c75SGreg Kurz assert(kvm_enabled()); 14351ec26c75SGreg Kurz 14361ec26c75SGreg Kurz if (!spapr->htab) { 14371ec26c75SGreg Kurz return 0; 14381ec26c75SGreg Kurz } 14391ec26c75SGreg Kurz 14401ec26c75SGreg Kurz return (target_ulong)(uintptr_t)spapr->htab | (spapr->htab_shift - 18); 14411ec26c75SGreg Kurz } 14421ec26c75SGreg Kurz 1443e57ca75cSDavid Gibson static const ppc_hash_pte64_t *spapr_map_hptes(PPCVirtualHypervisor *vhyp, 1444e57ca75cSDavid Gibson hwaddr ptex, int n) 1445e57ca75cSDavid Gibson { 1446e57ca75cSDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp); 1447e57ca75cSDavid Gibson hwaddr pte_offset = ptex * HASH_PTE_SIZE_64; 1448e57ca75cSDavid Gibson 1449e57ca75cSDavid Gibson if (!spapr->htab) { 1450e57ca75cSDavid Gibson /* 1451e57ca75cSDavid Gibson * HTAB is controlled by KVM. Fetch into temporary buffer 1452e57ca75cSDavid Gibson */ 1453e57ca75cSDavid Gibson ppc_hash_pte64_t *hptes = g_malloc(n * HASH_PTE_SIZE_64); 1454e57ca75cSDavid Gibson kvmppc_read_hptes(hptes, ptex, n); 1455e57ca75cSDavid Gibson return hptes; 1456e57ca75cSDavid Gibson } 1457e57ca75cSDavid Gibson 1458e57ca75cSDavid Gibson /* 1459e57ca75cSDavid Gibson * HTAB is controlled by QEMU. Just point to the internally 1460e57ca75cSDavid Gibson * accessible PTEG. 1461e57ca75cSDavid Gibson */ 1462e57ca75cSDavid Gibson return (const ppc_hash_pte64_t *)(spapr->htab + pte_offset); 1463e57ca75cSDavid Gibson } 1464e57ca75cSDavid Gibson 1465e57ca75cSDavid Gibson static void spapr_unmap_hptes(PPCVirtualHypervisor *vhyp, 1466e57ca75cSDavid Gibson const ppc_hash_pte64_t *hptes, 1467e57ca75cSDavid Gibson hwaddr ptex, int n) 1468e57ca75cSDavid Gibson { 1469e57ca75cSDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp); 1470e57ca75cSDavid Gibson 1471e57ca75cSDavid Gibson if (!spapr->htab) { 1472e57ca75cSDavid Gibson g_free((void *)hptes); 1473e57ca75cSDavid Gibson } 1474e57ca75cSDavid Gibson 1475e57ca75cSDavid Gibson /* Nothing to do for qemu managed HPT */ 1476e57ca75cSDavid Gibson } 1477e57ca75cSDavid Gibson 1478e57ca75cSDavid Gibson static void spapr_store_hpte(PPCVirtualHypervisor *vhyp, hwaddr ptex, 1479e57ca75cSDavid Gibson uint64_t pte0, uint64_t pte1) 1480e57ca75cSDavid Gibson { 1481e57ca75cSDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(vhyp); 1482e57ca75cSDavid Gibson hwaddr offset = ptex * HASH_PTE_SIZE_64; 1483e57ca75cSDavid Gibson 1484e57ca75cSDavid Gibson if (!spapr->htab) { 1485e57ca75cSDavid Gibson kvmppc_write_hpte(ptex, pte0, pte1); 1486e57ca75cSDavid Gibson } else { 1487e57ca75cSDavid Gibson stq_p(spapr->htab + offset, pte0); 1488e57ca75cSDavid Gibson stq_p(spapr->htab + offset + HASH_PTE_SIZE_64 / 2, pte1); 1489e57ca75cSDavid Gibson } 1490e57ca75cSDavid Gibson } 1491e57ca75cSDavid Gibson 14920b0b8310SDavid Gibson int spapr_hpt_shift_for_ramsize(uint64_t ramsize) 14938dfe8e7fSDavid Gibson { 14948dfe8e7fSDavid Gibson int shift; 14958dfe8e7fSDavid Gibson 14968dfe8e7fSDavid Gibson /* We aim for a hash table of size 1/128 the size of RAM (rounded 14978dfe8e7fSDavid Gibson * up). The PAPR recommendation is actually 1/64 of RAM size, but 14988dfe8e7fSDavid Gibson * that's much more than is needed for Linux guests */ 14998dfe8e7fSDavid Gibson shift = ctz64(pow2ceil(ramsize)) - 7; 15008dfe8e7fSDavid Gibson shift = MAX(shift, 18); /* Minimum architected size */ 15018dfe8e7fSDavid Gibson shift = MIN(shift, 46); /* Maximum architected size */ 15028dfe8e7fSDavid Gibson return shift; 15038dfe8e7fSDavid Gibson } 15048dfe8e7fSDavid Gibson 150506ec79e8SBharata B Rao void spapr_free_hpt(sPAPRMachineState *spapr) 150606ec79e8SBharata B Rao { 150706ec79e8SBharata B Rao g_free(spapr->htab); 150806ec79e8SBharata B Rao spapr->htab = NULL; 150906ec79e8SBharata B Rao spapr->htab_shift = 0; 151006ec79e8SBharata B Rao close_htab_fd(spapr); 151106ec79e8SBharata B Rao } 151206ec79e8SBharata B Rao 15132772cf6bSDavid Gibson void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift, 1514c5f54f3eSDavid Gibson Error **errp) 151553018216SPaolo Bonzini { 1516c5f54f3eSDavid Gibson long rc; 151753018216SPaolo Bonzini 1518c5f54f3eSDavid Gibson /* Clean up any HPT info from a previous boot */ 151906ec79e8SBharata B Rao spapr_free_hpt(spapr); 152053018216SPaolo Bonzini 1521c5f54f3eSDavid Gibson rc = kvmppc_reset_htab(shift); 1522c5f54f3eSDavid Gibson if (rc < 0) { 1523c5f54f3eSDavid Gibson /* kernel-side HPT needed, but couldn't allocate one */ 1524c5f54f3eSDavid Gibson error_setg_errno(errp, errno, 1525c5f54f3eSDavid Gibson "Failed to allocate KVM HPT of order %d (try smaller maxmem?)", 1526c5f54f3eSDavid Gibson shift); 1527c5f54f3eSDavid Gibson /* This is almost certainly fatal, but if the caller really 1528c5f54f3eSDavid Gibson * wants to carry on with shift == 0, it's welcome to try */ 1529c5f54f3eSDavid Gibson } else if (rc > 0) { 1530c5f54f3eSDavid Gibson /* kernel-side HPT allocated */ 1531c5f54f3eSDavid Gibson if (rc != shift) { 1532c5f54f3eSDavid Gibson error_setg(errp, 1533c5f54f3eSDavid Gibson "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)", 1534c5f54f3eSDavid Gibson shift, rc); 15357735fedaSBharata B Rao } 15367735fedaSBharata B Rao 153753018216SPaolo Bonzini spapr->htab_shift = shift; 1538c18ad9a5SDavid Gibson spapr->htab = NULL; 1539b817772aSBharata B Rao } else { 1540c5f54f3eSDavid Gibson /* kernel-side HPT not needed, allocate in userspace instead */ 1541c5f54f3eSDavid Gibson size_t size = 1ULL << shift; 1542c5f54f3eSDavid Gibson int i; 154301a57972SSamuel Mendoza-Jonas 1544c5f54f3eSDavid Gibson spapr->htab = qemu_memalign(size, size); 1545c5f54f3eSDavid Gibson if (!spapr->htab) { 1546c5f54f3eSDavid Gibson error_setg_errno(errp, errno, 1547c5f54f3eSDavid Gibson "Could not allocate HPT of order %d", shift); 1548c5f54f3eSDavid Gibson return; 1549b817772aSBharata B Rao } 1550b817772aSBharata B Rao 1551c5f54f3eSDavid Gibson memset(spapr->htab, 0, size); 1552c5f54f3eSDavid Gibson spapr->htab_shift = shift; 1553b817772aSBharata B Rao 1554c5f54f3eSDavid Gibson for (i = 0; i < size / HASH_PTE_SIZE_64; i++) { 1555c5f54f3eSDavid Gibson DIRTY_HPTE(HPTE(spapr->htab, i)); 15567735fedaSBharata B Rao } 155753018216SPaolo Bonzini } 1558ee4d9eccSSuraj Jitindar Singh /* We're setting up a hash table, so that means we're not radix */ 1559ee4d9eccSSuraj Jitindar Singh spapr->patb_entry = 0; 156053018216SPaolo Bonzini } 156153018216SPaolo Bonzini 1562b4db5413SSuraj Jitindar Singh void spapr_setup_hpt_and_vrma(sPAPRMachineState *spapr) 1563b4db5413SSuraj Jitindar Singh { 15642772cf6bSDavid Gibson int hpt_shift; 15652772cf6bSDavid Gibson 15662772cf6bSDavid Gibson if ((spapr->resize_hpt == SPAPR_RESIZE_HPT_DISABLED) 15672772cf6bSDavid Gibson || (spapr->cas_reboot 15682772cf6bSDavid Gibson && !spapr_ovec_test(spapr->ov5_cas, OV5_HPT_RESIZE))) { 15692772cf6bSDavid Gibson hpt_shift = spapr_hpt_shift_for_ramsize(MACHINE(spapr)->maxram_size); 15702772cf6bSDavid Gibson } else { 1571768a20f3SDavid Gibson uint64_t current_ram_size; 1572768a20f3SDavid Gibson 1573768a20f3SDavid Gibson current_ram_size = MACHINE(spapr)->ram_size + get_plugged_memory_size(); 1574768a20f3SDavid Gibson hpt_shift = spapr_hpt_shift_for_ramsize(current_ram_size); 15752772cf6bSDavid Gibson } 15762772cf6bSDavid Gibson spapr_reallocate_hpt(spapr, hpt_shift, &error_fatal); 15772772cf6bSDavid Gibson 1578b4db5413SSuraj Jitindar Singh if (spapr->vrma_adjust) { 1579c86c1affSDaniel Henrique Barboza spapr->rma_size = kvmppc_rma_size(spapr_node0_size(MACHINE(spapr)), 1580b4db5413SSuraj Jitindar Singh spapr->htab_shift); 1581b4db5413SSuraj Jitindar Singh } 1582b4db5413SSuraj Jitindar Singh } 1583b4db5413SSuraj Jitindar Singh 158482512483SGreg Kurz static int spapr_reset_drcs(Object *child, void *opaque) 158582512483SGreg Kurz { 158682512483SGreg Kurz sPAPRDRConnector *drc = 158782512483SGreg Kurz (sPAPRDRConnector *) object_dynamic_cast(child, 158882512483SGreg Kurz TYPE_SPAPR_DR_CONNECTOR); 158982512483SGreg Kurz 159082512483SGreg Kurz if (drc) { 159182512483SGreg Kurz spapr_drc_reset(drc); 159282512483SGreg Kurz } 159382512483SGreg Kurz 159482512483SGreg Kurz return 0; 159582512483SGreg Kurz } 159682512483SGreg Kurz 1597bcb5ce08SDavid Gibson static void spapr_machine_reset(void) 159853018216SPaolo Bonzini { 1599c5f54f3eSDavid Gibson MachineState *machine = MACHINE(qdev_get_machine()); 1600c5f54f3eSDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(machine); 1601182735efSAndreas Färber PowerPCCPU *first_ppc_cpu; 1602b7d1f77aSBenjamin Herrenschmidt uint32_t rtas_limit; 1603cae172abSDavid Gibson hwaddr rtas_addr, fdt_addr; 1604997b6cfcSDavid Gibson void *fdt; 1605997b6cfcSDavid Gibson int rc; 1606259186a7SAndreas Färber 160733face6bSDavid Gibson spapr_caps_reset(spapr); 160833face6bSDavid Gibson 16091481fe5fSLaurent Vivier first_ppc_cpu = POWERPC_CPU(first_cpu); 16101481fe5fSLaurent Vivier if (kvm_enabled() && kvmppc_has_cap_mmu_radix() && 16111481fe5fSLaurent Vivier ppc_check_compat(first_ppc_cpu, CPU_POWERPC_LOGICAL_3_00, 0, 16121481fe5fSLaurent Vivier spapr->max_compat_pvr)) { 1613b4db5413SSuraj Jitindar Singh /* If using KVM with radix mode available, VCPUs can be started 1614b4db5413SSuraj Jitindar Singh * without a HPT because KVM will start them in radix mode. 1615b4db5413SSuraj Jitindar Singh * Set the GR bit in PATB so that we know there is no HPT. */ 1616b4db5413SSuraj Jitindar Singh spapr->patb_entry = PATBE1_GR; 1617b4db5413SSuraj Jitindar Singh } else { 1618b4db5413SSuraj Jitindar Singh spapr_setup_hpt_and_vrma(spapr); 1619c5f54f3eSDavid Gibson } 162053018216SPaolo Bonzini 16219012a53fSGreg Kurz /* if this reset wasn't generated by CAS, we should reset our 16229012a53fSGreg Kurz * negotiated options and start from scratch */ 16239012a53fSGreg Kurz if (!spapr->cas_reboot) { 16249012a53fSGreg Kurz spapr_ovec_cleanup(spapr->ov5_cas); 16259012a53fSGreg Kurz spapr->ov5_cas = spapr_ovec_new(); 16269012a53fSGreg Kurz 16279012a53fSGreg Kurz ppc_set_compat(first_ppc_cpu, spapr->max_compat_pvr, &error_fatal); 16289012a53fSGreg Kurz } 16299012a53fSGreg Kurz 163053018216SPaolo Bonzini qemu_devices_reset(); 163182512483SGreg Kurz 163282512483SGreg Kurz /* DRC reset may cause a device to be unplugged. This will cause troubles 163382512483SGreg Kurz * if this device is used by another device (eg, a running vhost backend 163482512483SGreg Kurz * will crash QEMU if the DIMM holding the vring goes away). To avoid such 163582512483SGreg Kurz * situations, we reset DRCs after all devices have been reset. 163682512483SGreg Kurz */ 163782512483SGreg Kurz object_child_foreach_recursive(object_get_root(), spapr_reset_drcs, NULL); 163882512483SGreg Kurz 163956258174SDaniel Henrique Barboza spapr_clear_pending_events(spapr); 164053018216SPaolo Bonzini 1641b7d1f77aSBenjamin Herrenschmidt /* 1642b7d1f77aSBenjamin Herrenschmidt * We place the device tree and RTAS just below either the top of the RMA, 1643b7d1f77aSBenjamin Herrenschmidt * or just below 2GB, whichever is lowere, so that it can be 1644b7d1f77aSBenjamin Herrenschmidt * processed with 32-bit real mode code if necessary 1645b7d1f77aSBenjamin Herrenschmidt */ 1646b7d1f77aSBenjamin Herrenschmidt rtas_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR); 1647cae172abSDavid Gibson rtas_addr = rtas_limit - RTAS_MAX_SIZE; 1648cae172abSDavid Gibson fdt_addr = rtas_addr - FDT_MAX_SIZE; 1649b7d1f77aSBenjamin Herrenschmidt 1650cae172abSDavid Gibson fdt = spapr_build_fdt(spapr, rtas_addr, spapr->rtas_size); 165153018216SPaolo Bonzini 16522cac78c1SDavid Gibson spapr_load_rtas(spapr, fdt, rtas_addr); 1653b7d1f77aSBenjamin Herrenschmidt 1654997b6cfcSDavid Gibson rc = fdt_pack(fdt); 1655997b6cfcSDavid Gibson 1656997b6cfcSDavid Gibson /* Should only fail if we've built a corrupted tree */ 1657997b6cfcSDavid Gibson assert(rc == 0); 1658997b6cfcSDavid Gibson 1659997b6cfcSDavid Gibson if (fdt_totalsize(fdt) > FDT_MAX_SIZE) { 1660997b6cfcSDavid Gibson error_report("FDT too big ! 0x%x bytes (max is 0x%x)", 1661997b6cfcSDavid Gibson fdt_totalsize(fdt), FDT_MAX_SIZE); 1662997b6cfcSDavid Gibson exit(1); 1663997b6cfcSDavid Gibson } 1664997b6cfcSDavid Gibson 1665997b6cfcSDavid Gibson /* Load the fdt */ 1666997b6cfcSDavid Gibson qemu_fdt_dumpdtb(fdt, fdt_totalsize(fdt)); 1667cae172abSDavid Gibson cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); 1668997b6cfcSDavid Gibson g_free(fdt); 1669997b6cfcSDavid Gibson 167053018216SPaolo Bonzini /* Set up the entry state */ 1671*84369f63SDavid Gibson spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, fdt_addr); 1672182735efSAndreas Färber first_ppc_cpu->env.gpr[5] = 0; 167353018216SPaolo Bonzini 16746787d27bSMichael Roth spapr->cas_reboot = false; 167553018216SPaolo Bonzini } 167653018216SPaolo Bonzini 167728e02042SDavid Gibson static void spapr_create_nvram(sPAPRMachineState *spapr) 167853018216SPaolo Bonzini { 16792ff3de68SMarkus Armbruster DeviceState *dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram"); 16803978b863SPaolo Bonzini DriveInfo *dinfo = drive_get(IF_PFLASH, 0, 0); 168153018216SPaolo Bonzini 16823978b863SPaolo Bonzini if (dinfo) { 16836231a6daSMarkus Armbruster qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo), 16846231a6daSMarkus Armbruster &error_fatal); 168553018216SPaolo Bonzini } 168653018216SPaolo Bonzini 168753018216SPaolo Bonzini qdev_init_nofail(dev); 168853018216SPaolo Bonzini 168953018216SPaolo Bonzini spapr->nvram = (struct sPAPRNVRAM *)dev; 169053018216SPaolo Bonzini } 169153018216SPaolo Bonzini 169228e02042SDavid Gibson static void spapr_rtc_create(sPAPRMachineState *spapr) 169328df36a1SDavid Gibson { 1694147ff807SCédric Le Goater object_initialize(&spapr->rtc, sizeof(spapr->rtc), TYPE_SPAPR_RTC); 1695147ff807SCédric Le Goater object_property_add_child(OBJECT(spapr), "rtc", OBJECT(&spapr->rtc), 1696147ff807SCédric Le Goater &error_fatal); 1697147ff807SCédric Le Goater object_property_set_bool(OBJECT(&spapr->rtc), true, "realized", 1698147ff807SCédric Le Goater &error_fatal); 1699147ff807SCédric Le Goater object_property_add_alias(OBJECT(spapr), "rtc-time", OBJECT(&spapr->rtc), 1700147ff807SCédric Le Goater "date", &error_fatal); 170128df36a1SDavid Gibson } 170228df36a1SDavid Gibson 170353018216SPaolo Bonzini /* Returns whether we want to use VGA or not */ 170414c6a894SDavid Gibson static bool spapr_vga_init(PCIBus *pci_bus, Error **errp) 170553018216SPaolo Bonzini { 170653018216SPaolo Bonzini switch (vga_interface_type) { 170753018216SPaolo Bonzini case VGA_NONE: 17087effdaa3SMark Wu return false; 17097effdaa3SMark Wu case VGA_DEVICE: 17107effdaa3SMark Wu return true; 171153018216SPaolo Bonzini case VGA_STD: 1712b798c190SBenjamin Herrenschmidt case VGA_VIRTIO: 171353018216SPaolo Bonzini return pci_vga_init(pci_bus) != NULL; 171453018216SPaolo Bonzini default: 171514c6a894SDavid Gibson error_setg(errp, 171614c6a894SDavid Gibson "Unsupported VGA mode, only -vga std or -vga virtio is supported"); 171714c6a894SDavid Gibson return false; 171853018216SPaolo Bonzini } 171953018216SPaolo Bonzini } 172053018216SPaolo Bonzini 17214e5fe368SSuraj Jitindar Singh static int spapr_pre_load(void *opaque) 17224e5fe368SSuraj Jitindar Singh { 17234e5fe368SSuraj Jitindar Singh int rc; 17244e5fe368SSuraj Jitindar Singh 17254e5fe368SSuraj Jitindar Singh rc = spapr_caps_pre_load(opaque); 17264e5fe368SSuraj Jitindar Singh if (rc) { 17274e5fe368SSuraj Jitindar Singh return rc; 17284e5fe368SSuraj Jitindar Singh } 17294e5fe368SSuraj Jitindar Singh 17304e5fe368SSuraj Jitindar Singh return 0; 17314e5fe368SSuraj Jitindar Singh } 17324e5fe368SSuraj Jitindar Singh 1733880ae7deSDavid Gibson static int spapr_post_load(void *opaque, int version_id) 1734880ae7deSDavid Gibson { 173528e02042SDavid Gibson sPAPRMachineState *spapr = (sPAPRMachineState *)opaque; 1736880ae7deSDavid Gibson int err = 0; 1737880ae7deSDavid Gibson 1738be85537dSDavid Gibson err = spapr_caps_post_migration(spapr); 1739be85537dSDavid Gibson if (err) { 1740be85537dSDavid Gibson return err; 1741be85537dSDavid Gibson } 1742be85537dSDavid Gibson 1743a7ff1212SCédric Le Goater if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) { 17445bc8d26dSCédric Le Goater CPUState *cs; 17455bc8d26dSCédric Le Goater CPU_FOREACH(cs) { 17465bc8d26dSCédric Le Goater PowerPCCPU *cpu = POWERPC_CPU(cs); 17475bc8d26dSCédric Le Goater icp_resend(ICP(cpu->intc)); 1748a7ff1212SCédric Le Goater } 1749a7ff1212SCédric Le Goater } 1750a7ff1212SCédric Le Goater 1751631b22eaSStefan Weil /* In earlier versions, there was no separate qdev for the PAPR 1752880ae7deSDavid Gibson * RTC, so the RTC offset was stored directly in sPAPREnvironment. 1753880ae7deSDavid Gibson * So when migrating from those versions, poke the incoming offset 1754880ae7deSDavid Gibson * value into the RTC device */ 1755880ae7deSDavid Gibson if (version_id < 3) { 1756147ff807SCédric Le Goater err = spapr_rtc_import_offset(&spapr->rtc, spapr->rtc_offset); 1757880ae7deSDavid Gibson } 1758880ae7deSDavid Gibson 17590c86b2dfSLaurent Vivier if (kvm_enabled() && spapr->patb_entry) { 1760d39c90f5SBharata B Rao PowerPCCPU *cpu = POWERPC_CPU(first_cpu); 1761d39c90f5SBharata B Rao bool radix = !!(spapr->patb_entry & PATBE1_GR); 1762d39c90f5SBharata B Rao bool gtse = !!(cpu->env.spr[SPR_LPCR] & LPCR_GTSE); 1763d39c90f5SBharata B Rao 1764d39c90f5SBharata B Rao err = kvmppc_configure_v3_mmu(cpu, radix, gtse, spapr->patb_entry); 1765d39c90f5SBharata B Rao if (err) { 1766d39c90f5SBharata B Rao error_report("Process table config unsupported by the host"); 1767d39c90f5SBharata B Rao return -EINVAL; 1768d39c90f5SBharata B Rao } 1769d39c90f5SBharata B Rao } 1770d39c90f5SBharata B Rao 1771880ae7deSDavid Gibson return err; 1772880ae7deSDavid Gibson } 1773880ae7deSDavid Gibson 17744e5fe368SSuraj Jitindar Singh static int spapr_pre_save(void *opaque) 17754e5fe368SSuraj Jitindar Singh { 17764e5fe368SSuraj Jitindar Singh int rc; 17774e5fe368SSuraj Jitindar Singh 17784e5fe368SSuraj Jitindar Singh rc = spapr_caps_pre_save(opaque); 17794e5fe368SSuraj Jitindar Singh if (rc) { 17804e5fe368SSuraj Jitindar Singh return rc; 17814e5fe368SSuraj Jitindar Singh } 17824e5fe368SSuraj Jitindar Singh 17834e5fe368SSuraj Jitindar Singh return 0; 17844e5fe368SSuraj Jitindar Singh } 17854e5fe368SSuraj Jitindar Singh 1786880ae7deSDavid Gibson static bool version_before_3(void *opaque, int version_id) 1787880ae7deSDavid Gibson { 1788880ae7deSDavid Gibson return version_id < 3; 1789880ae7deSDavid Gibson } 1790880ae7deSDavid Gibson 1791fd38804bSDaniel Henrique Barboza static bool spapr_pending_events_needed(void *opaque) 1792fd38804bSDaniel Henrique Barboza { 1793fd38804bSDaniel Henrique Barboza sPAPRMachineState *spapr = (sPAPRMachineState *)opaque; 1794fd38804bSDaniel Henrique Barboza return !QTAILQ_EMPTY(&spapr->pending_events); 1795fd38804bSDaniel Henrique Barboza } 1796fd38804bSDaniel Henrique Barboza 1797fd38804bSDaniel Henrique Barboza static const VMStateDescription vmstate_spapr_event_entry = { 1798fd38804bSDaniel Henrique Barboza .name = "spapr_event_log_entry", 1799fd38804bSDaniel Henrique Barboza .version_id = 1, 1800fd38804bSDaniel Henrique Barboza .minimum_version_id = 1, 1801fd38804bSDaniel Henrique Barboza .fields = (VMStateField[]) { 18025341258eSDavid Gibson VMSTATE_UINT32(summary, sPAPREventLogEntry), 18035341258eSDavid Gibson VMSTATE_UINT32(extended_length, sPAPREventLogEntry), 1804fd38804bSDaniel Henrique Barboza VMSTATE_VBUFFER_ALLOC_UINT32(extended_log, sPAPREventLogEntry, 0, 18055341258eSDavid Gibson NULL, extended_length), 1806fd38804bSDaniel Henrique Barboza VMSTATE_END_OF_LIST() 1807fd38804bSDaniel Henrique Barboza }, 1808fd38804bSDaniel Henrique Barboza }; 1809fd38804bSDaniel Henrique Barboza 1810fd38804bSDaniel Henrique Barboza static const VMStateDescription vmstate_spapr_pending_events = { 1811fd38804bSDaniel Henrique Barboza .name = "spapr_pending_events", 1812fd38804bSDaniel Henrique Barboza .version_id = 1, 1813fd38804bSDaniel Henrique Barboza .minimum_version_id = 1, 1814fd38804bSDaniel Henrique Barboza .needed = spapr_pending_events_needed, 1815fd38804bSDaniel Henrique Barboza .fields = (VMStateField[]) { 1816fd38804bSDaniel Henrique Barboza VMSTATE_QTAILQ_V(pending_events, sPAPRMachineState, 1, 1817fd38804bSDaniel Henrique Barboza vmstate_spapr_event_entry, sPAPREventLogEntry, next), 1818fd38804bSDaniel Henrique Barboza VMSTATE_END_OF_LIST() 1819fd38804bSDaniel Henrique Barboza }, 1820fd38804bSDaniel Henrique Barboza }; 1821fd38804bSDaniel Henrique Barboza 182262ef3760SMichael Roth static bool spapr_ov5_cas_needed(void *opaque) 182362ef3760SMichael Roth { 182462ef3760SMichael Roth sPAPRMachineState *spapr = opaque; 182562ef3760SMichael Roth sPAPROptionVector *ov5_mask = spapr_ovec_new(); 182662ef3760SMichael Roth sPAPROptionVector *ov5_legacy = spapr_ovec_new(); 182762ef3760SMichael Roth sPAPROptionVector *ov5_removed = spapr_ovec_new(); 182862ef3760SMichael Roth bool cas_needed; 182962ef3760SMichael Roth 183062ef3760SMichael Roth /* Prior to the introduction of sPAPROptionVector, we had two option 183162ef3760SMichael Roth * vectors we dealt with: OV5_FORM1_AFFINITY, and OV5_DRCONF_MEMORY. 183262ef3760SMichael Roth * Both of these options encode machine topology into the device-tree 183362ef3760SMichael Roth * in such a way that the now-booted OS should still be able to interact 183462ef3760SMichael Roth * appropriately with QEMU regardless of what options were actually 183562ef3760SMichael Roth * negotiatied on the source side. 183662ef3760SMichael Roth * 183762ef3760SMichael Roth * As such, we can avoid migrating the CAS-negotiated options if these 183862ef3760SMichael Roth * are the only options available on the current machine/platform. 183962ef3760SMichael Roth * Since these are the only options available for pseries-2.7 and 184062ef3760SMichael Roth * earlier, this allows us to maintain old->new/new->old migration 184162ef3760SMichael Roth * compatibility. 184262ef3760SMichael Roth * 184362ef3760SMichael Roth * For QEMU 2.8+, there are additional CAS-negotiatable options available 184462ef3760SMichael Roth * via default pseries-2.8 machines and explicit command-line parameters. 184562ef3760SMichael Roth * Some of these options, like OV5_HP_EVT, *do* require QEMU to be aware 184662ef3760SMichael Roth * of the actual CAS-negotiated values to continue working properly. For 184762ef3760SMichael Roth * example, availability of memory unplug depends on knowing whether 184862ef3760SMichael Roth * OV5_HP_EVT was negotiated via CAS. 184962ef3760SMichael Roth * 185062ef3760SMichael Roth * Thus, for any cases where the set of available CAS-negotiatable 185162ef3760SMichael Roth * options extends beyond OV5_FORM1_AFFINITY and OV5_DRCONF_MEMORY, we 185262ef3760SMichael Roth * include the CAS-negotiated options in the migration stream. 185362ef3760SMichael Roth */ 185462ef3760SMichael Roth spapr_ovec_set(ov5_mask, OV5_FORM1_AFFINITY); 185562ef3760SMichael Roth spapr_ovec_set(ov5_mask, OV5_DRCONF_MEMORY); 185662ef3760SMichael Roth 185762ef3760SMichael Roth /* spapr_ovec_diff returns true if bits were removed. we avoid using 185862ef3760SMichael Roth * the mask itself since in the future it's possible "legacy" bits may be 185962ef3760SMichael Roth * removed via machine options, which could generate a false positive 186062ef3760SMichael Roth * that breaks migration. 186162ef3760SMichael Roth */ 186262ef3760SMichael Roth spapr_ovec_intersect(ov5_legacy, spapr->ov5, ov5_mask); 186362ef3760SMichael Roth cas_needed = spapr_ovec_diff(ov5_removed, spapr->ov5, ov5_legacy); 186462ef3760SMichael Roth 186562ef3760SMichael Roth spapr_ovec_cleanup(ov5_mask); 186662ef3760SMichael Roth spapr_ovec_cleanup(ov5_legacy); 186762ef3760SMichael Roth spapr_ovec_cleanup(ov5_removed); 186862ef3760SMichael Roth 186962ef3760SMichael Roth return cas_needed; 187062ef3760SMichael Roth } 187162ef3760SMichael Roth 187262ef3760SMichael Roth static const VMStateDescription vmstate_spapr_ov5_cas = { 187362ef3760SMichael Roth .name = "spapr_option_vector_ov5_cas", 187462ef3760SMichael Roth .version_id = 1, 187562ef3760SMichael Roth .minimum_version_id = 1, 187662ef3760SMichael Roth .needed = spapr_ov5_cas_needed, 187762ef3760SMichael Roth .fields = (VMStateField[]) { 187862ef3760SMichael Roth VMSTATE_STRUCT_POINTER_V(ov5_cas, sPAPRMachineState, 1, 187962ef3760SMichael Roth vmstate_spapr_ovec, sPAPROptionVector), 188062ef3760SMichael Roth VMSTATE_END_OF_LIST() 188162ef3760SMichael Roth }, 188262ef3760SMichael Roth }; 188362ef3760SMichael Roth 18849861bb3eSSuraj Jitindar Singh static bool spapr_patb_entry_needed(void *opaque) 18859861bb3eSSuraj Jitindar Singh { 18869861bb3eSSuraj Jitindar Singh sPAPRMachineState *spapr = opaque; 18879861bb3eSSuraj Jitindar Singh 18889861bb3eSSuraj Jitindar Singh return !!spapr->patb_entry; 18899861bb3eSSuraj Jitindar Singh } 18909861bb3eSSuraj Jitindar Singh 18919861bb3eSSuraj Jitindar Singh static const VMStateDescription vmstate_spapr_patb_entry = { 18929861bb3eSSuraj Jitindar Singh .name = "spapr_patb_entry", 18939861bb3eSSuraj Jitindar Singh .version_id = 1, 18949861bb3eSSuraj Jitindar Singh .minimum_version_id = 1, 18959861bb3eSSuraj Jitindar Singh .needed = spapr_patb_entry_needed, 18969861bb3eSSuraj Jitindar Singh .fields = (VMStateField[]) { 18979861bb3eSSuraj Jitindar Singh VMSTATE_UINT64(patb_entry, sPAPRMachineState), 18989861bb3eSSuraj Jitindar Singh VMSTATE_END_OF_LIST() 18999861bb3eSSuraj Jitindar Singh }, 19009861bb3eSSuraj Jitindar Singh }; 19019861bb3eSSuraj Jitindar Singh 19024be21d56SDavid Gibson static const VMStateDescription vmstate_spapr = { 19034be21d56SDavid Gibson .name = "spapr", 1904880ae7deSDavid Gibson .version_id = 3, 19054be21d56SDavid Gibson .minimum_version_id = 1, 19064e5fe368SSuraj Jitindar Singh .pre_load = spapr_pre_load, 1907880ae7deSDavid Gibson .post_load = spapr_post_load, 19084e5fe368SSuraj Jitindar Singh .pre_save = spapr_pre_save, 19094be21d56SDavid Gibson .fields = (VMStateField[]) { 1910880ae7deSDavid Gibson /* used to be @next_irq */ 1911880ae7deSDavid Gibson VMSTATE_UNUSED_BUFFER(version_before_3, 0, 4), 19124be21d56SDavid Gibson 19134be21d56SDavid Gibson /* RTC offset */ 191428e02042SDavid Gibson VMSTATE_UINT64_TEST(rtc_offset, sPAPRMachineState, version_before_3), 1915880ae7deSDavid Gibson 191628e02042SDavid Gibson VMSTATE_PPC_TIMEBASE_V(tb, sPAPRMachineState, 2), 19174be21d56SDavid Gibson VMSTATE_END_OF_LIST() 19184be21d56SDavid Gibson }, 191962ef3760SMichael Roth .subsections = (const VMStateDescription*[]) { 192062ef3760SMichael Roth &vmstate_spapr_ov5_cas, 19219861bb3eSSuraj Jitindar Singh &vmstate_spapr_patb_entry, 1922fd38804bSDaniel Henrique Barboza &vmstate_spapr_pending_events, 19234e5fe368SSuraj Jitindar Singh &vmstate_spapr_cap_htm, 19244e5fe368SSuraj Jitindar Singh &vmstate_spapr_cap_vsx, 19254e5fe368SSuraj Jitindar Singh &vmstate_spapr_cap_dfp, 19268f38eaf8SSuraj Jitindar Singh &vmstate_spapr_cap_cfpc, 192709114fd8SSuraj Jitindar Singh &vmstate_spapr_cap_sbbc, 19284be8d4e7SSuraj Jitindar Singh &vmstate_spapr_cap_ibs, 192962ef3760SMichael Roth NULL 193062ef3760SMichael Roth } 19314be21d56SDavid Gibson }; 19324be21d56SDavid Gibson 19334be21d56SDavid Gibson static int htab_save_setup(QEMUFile *f, void *opaque) 19344be21d56SDavid Gibson { 193528e02042SDavid Gibson sPAPRMachineState *spapr = opaque; 19364be21d56SDavid Gibson 19374be21d56SDavid Gibson /* "Iteration" header */ 19383a384297SBharata B Rao if (!spapr->htab_shift) { 19393a384297SBharata B Rao qemu_put_be32(f, -1); 19403a384297SBharata B Rao } else { 19414be21d56SDavid Gibson qemu_put_be32(f, spapr->htab_shift); 19423a384297SBharata B Rao } 19434be21d56SDavid Gibson 1944e68cb8b4SAlexey Kardashevskiy if (spapr->htab) { 1945e68cb8b4SAlexey Kardashevskiy spapr->htab_save_index = 0; 1946e68cb8b4SAlexey Kardashevskiy spapr->htab_first_pass = true; 1947e68cb8b4SAlexey Kardashevskiy } else { 19483a384297SBharata B Rao if (spapr->htab_shift) { 1949e68cb8b4SAlexey Kardashevskiy assert(kvm_enabled()); 19504be21d56SDavid Gibson } 19513a384297SBharata B Rao } 19524be21d56SDavid Gibson 1953e68cb8b4SAlexey Kardashevskiy 1954e68cb8b4SAlexey Kardashevskiy return 0; 1955e68cb8b4SAlexey Kardashevskiy } 19564be21d56SDavid Gibson 1957332f7721SGreg Kurz static void htab_save_chunk(QEMUFile *f, sPAPRMachineState *spapr, 1958332f7721SGreg Kurz int chunkstart, int n_valid, int n_invalid) 1959332f7721SGreg Kurz { 1960332f7721SGreg Kurz qemu_put_be32(f, chunkstart); 1961332f7721SGreg Kurz qemu_put_be16(f, n_valid); 1962332f7721SGreg Kurz qemu_put_be16(f, n_invalid); 1963332f7721SGreg Kurz qemu_put_buffer(f, HPTE(spapr->htab, chunkstart), 1964332f7721SGreg Kurz HASH_PTE_SIZE_64 * n_valid); 1965332f7721SGreg Kurz } 1966332f7721SGreg Kurz 1967332f7721SGreg Kurz static void htab_save_end_marker(QEMUFile *f) 1968332f7721SGreg Kurz { 1969332f7721SGreg Kurz qemu_put_be32(f, 0); 1970332f7721SGreg Kurz qemu_put_be16(f, 0); 1971332f7721SGreg Kurz qemu_put_be16(f, 0); 1972332f7721SGreg Kurz } 1973332f7721SGreg Kurz 197428e02042SDavid Gibson static void htab_save_first_pass(QEMUFile *f, sPAPRMachineState *spapr, 19754be21d56SDavid Gibson int64_t max_ns) 19764be21d56SDavid Gibson { 1977378bc217SDavid Gibson bool has_timeout = max_ns != -1; 19784be21d56SDavid Gibson int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64; 19794be21d56SDavid Gibson int index = spapr->htab_save_index; 1980bc72ad67SAlex Bligh int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); 19814be21d56SDavid Gibson 19824be21d56SDavid Gibson assert(spapr->htab_first_pass); 19834be21d56SDavid Gibson 19844be21d56SDavid Gibson do { 19854be21d56SDavid Gibson int chunkstart; 19864be21d56SDavid Gibson 19874be21d56SDavid Gibson /* Consume invalid HPTEs */ 19884be21d56SDavid Gibson while ((index < htabslots) 19894be21d56SDavid Gibson && !HPTE_VALID(HPTE(spapr->htab, index))) { 19904be21d56SDavid Gibson CLEAN_HPTE(HPTE(spapr->htab, index)); 199124ec2863SMarc-André Lureau index++; 19924be21d56SDavid Gibson } 19934be21d56SDavid Gibson 19944be21d56SDavid Gibson /* Consume valid HPTEs */ 19954be21d56SDavid Gibson chunkstart = index; 1996338c25b6SSamuel Mendoza-Jonas while ((index < htabslots) && (index - chunkstart < USHRT_MAX) 19974be21d56SDavid Gibson && HPTE_VALID(HPTE(spapr->htab, index))) { 19984be21d56SDavid Gibson CLEAN_HPTE(HPTE(spapr->htab, index)); 199924ec2863SMarc-André Lureau index++; 20004be21d56SDavid Gibson } 20014be21d56SDavid Gibson 20024be21d56SDavid Gibson if (index > chunkstart) { 20034be21d56SDavid Gibson int n_valid = index - chunkstart; 20044be21d56SDavid Gibson 2005332f7721SGreg Kurz htab_save_chunk(f, spapr, chunkstart, n_valid, 0); 20064be21d56SDavid Gibson 2007378bc217SDavid Gibson if (has_timeout && 2008378bc217SDavid Gibson (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) { 20094be21d56SDavid Gibson break; 20104be21d56SDavid Gibson } 20114be21d56SDavid Gibson } 20124be21d56SDavid Gibson } while ((index < htabslots) && !qemu_file_rate_limit(f)); 20134be21d56SDavid Gibson 20144be21d56SDavid Gibson if (index >= htabslots) { 20154be21d56SDavid Gibson assert(index == htabslots); 20164be21d56SDavid Gibson index = 0; 20174be21d56SDavid Gibson spapr->htab_first_pass = false; 20184be21d56SDavid Gibson } 20194be21d56SDavid Gibson spapr->htab_save_index = index; 20204be21d56SDavid Gibson } 20214be21d56SDavid Gibson 202228e02042SDavid Gibson static int htab_save_later_pass(QEMUFile *f, sPAPRMachineState *spapr, 20234be21d56SDavid Gibson int64_t max_ns) 20244be21d56SDavid Gibson { 20254be21d56SDavid Gibson bool final = max_ns < 0; 20264be21d56SDavid Gibson int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64; 20274be21d56SDavid Gibson int examined = 0, sent = 0; 20284be21d56SDavid Gibson int index = spapr->htab_save_index; 2029bc72ad67SAlex Bligh int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME); 20304be21d56SDavid Gibson 20314be21d56SDavid Gibson assert(!spapr->htab_first_pass); 20324be21d56SDavid Gibson 20334be21d56SDavid Gibson do { 20344be21d56SDavid Gibson int chunkstart, invalidstart; 20354be21d56SDavid Gibson 20364be21d56SDavid Gibson /* Consume non-dirty HPTEs */ 20374be21d56SDavid Gibson while ((index < htabslots) 20384be21d56SDavid Gibson && !HPTE_DIRTY(HPTE(spapr->htab, index))) { 20394be21d56SDavid Gibson index++; 20404be21d56SDavid Gibson examined++; 20414be21d56SDavid Gibson } 20424be21d56SDavid Gibson 20434be21d56SDavid Gibson chunkstart = index; 20444be21d56SDavid Gibson /* Consume valid dirty HPTEs */ 2045338c25b6SSamuel Mendoza-Jonas while ((index < htabslots) && (index - chunkstart < USHRT_MAX) 20464be21d56SDavid Gibson && HPTE_DIRTY(HPTE(spapr->htab, index)) 20474be21d56SDavid Gibson && HPTE_VALID(HPTE(spapr->htab, index))) { 20484be21d56SDavid Gibson CLEAN_HPTE(HPTE(spapr->htab, index)); 20494be21d56SDavid Gibson index++; 20504be21d56SDavid Gibson examined++; 20514be21d56SDavid Gibson } 20524be21d56SDavid Gibson 20534be21d56SDavid Gibson invalidstart = index; 20544be21d56SDavid Gibson /* Consume invalid dirty HPTEs */ 2055338c25b6SSamuel Mendoza-Jonas while ((index < htabslots) && (index - invalidstart < USHRT_MAX) 20564be21d56SDavid Gibson && HPTE_DIRTY(HPTE(spapr->htab, index)) 20574be21d56SDavid Gibson && !HPTE_VALID(HPTE(spapr->htab, index))) { 20584be21d56SDavid Gibson CLEAN_HPTE(HPTE(spapr->htab, index)); 20594be21d56SDavid Gibson index++; 20604be21d56SDavid Gibson examined++; 20614be21d56SDavid Gibson } 20624be21d56SDavid Gibson 20634be21d56SDavid Gibson if (index > chunkstart) { 20644be21d56SDavid Gibson int n_valid = invalidstart - chunkstart; 20654be21d56SDavid Gibson int n_invalid = index - invalidstart; 20664be21d56SDavid Gibson 2067332f7721SGreg Kurz htab_save_chunk(f, spapr, chunkstart, n_valid, n_invalid); 20684be21d56SDavid Gibson sent += index - chunkstart; 20694be21d56SDavid Gibson 2070bc72ad67SAlex Bligh if (!final && (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) { 20714be21d56SDavid Gibson break; 20724be21d56SDavid Gibson } 20734be21d56SDavid Gibson } 20744be21d56SDavid Gibson 20754be21d56SDavid Gibson if (examined >= htabslots) { 20764be21d56SDavid Gibson break; 20774be21d56SDavid Gibson } 20784be21d56SDavid Gibson 20794be21d56SDavid Gibson if (index >= htabslots) { 20804be21d56SDavid Gibson assert(index == htabslots); 20814be21d56SDavid Gibson index = 0; 20824be21d56SDavid Gibson } 20834be21d56SDavid Gibson } while ((examined < htabslots) && (!qemu_file_rate_limit(f) || final)); 20844be21d56SDavid Gibson 20854be21d56SDavid Gibson if (index >= htabslots) { 20864be21d56SDavid Gibson assert(index == htabslots); 20874be21d56SDavid Gibson index = 0; 20884be21d56SDavid Gibson } 20894be21d56SDavid Gibson 20904be21d56SDavid Gibson spapr->htab_save_index = index; 20914be21d56SDavid Gibson 2092e68cb8b4SAlexey Kardashevskiy return (examined >= htabslots) && (sent == 0) ? 1 : 0; 20934be21d56SDavid Gibson } 20944be21d56SDavid Gibson 2095e68cb8b4SAlexey Kardashevskiy #define MAX_ITERATION_NS 5000000 /* 5 ms */ 2096e68cb8b4SAlexey Kardashevskiy #define MAX_KVM_BUF_SIZE 2048 2097e68cb8b4SAlexey Kardashevskiy 20984be21d56SDavid Gibson static int htab_save_iterate(QEMUFile *f, void *opaque) 20994be21d56SDavid Gibson { 210028e02042SDavid Gibson sPAPRMachineState *spapr = opaque; 2101715c5407SDavid Gibson int fd; 2102e68cb8b4SAlexey Kardashevskiy int rc = 0; 21034be21d56SDavid Gibson 21044be21d56SDavid Gibson /* Iteration header */ 21053a384297SBharata B Rao if (!spapr->htab_shift) { 21063a384297SBharata B Rao qemu_put_be32(f, -1); 2107e8cd4247SLaurent Vivier return 1; 21083a384297SBharata B Rao } else { 21094be21d56SDavid Gibson qemu_put_be32(f, 0); 21103a384297SBharata B Rao } 21114be21d56SDavid Gibson 2112e68cb8b4SAlexey Kardashevskiy if (!spapr->htab) { 2113e68cb8b4SAlexey Kardashevskiy assert(kvm_enabled()); 2114e68cb8b4SAlexey Kardashevskiy 2115715c5407SDavid Gibson fd = get_htab_fd(spapr); 2116715c5407SDavid Gibson if (fd < 0) { 2117715c5407SDavid Gibson return fd; 211801a57972SSamuel Mendoza-Jonas } 211901a57972SSamuel Mendoza-Jonas 2120715c5407SDavid Gibson rc = kvmppc_save_htab(f, fd, MAX_KVM_BUF_SIZE, MAX_ITERATION_NS); 2121e68cb8b4SAlexey Kardashevskiy if (rc < 0) { 2122e68cb8b4SAlexey Kardashevskiy return rc; 2123e68cb8b4SAlexey Kardashevskiy } 2124e68cb8b4SAlexey Kardashevskiy } else if (spapr->htab_first_pass) { 21254be21d56SDavid Gibson htab_save_first_pass(f, spapr, MAX_ITERATION_NS); 21264be21d56SDavid Gibson } else { 2127e68cb8b4SAlexey Kardashevskiy rc = htab_save_later_pass(f, spapr, MAX_ITERATION_NS); 21284be21d56SDavid Gibson } 21294be21d56SDavid Gibson 2130332f7721SGreg Kurz htab_save_end_marker(f); 21314be21d56SDavid Gibson 2132e68cb8b4SAlexey Kardashevskiy return rc; 21334be21d56SDavid Gibson } 21344be21d56SDavid Gibson 21354be21d56SDavid Gibson static int htab_save_complete(QEMUFile *f, void *opaque) 21364be21d56SDavid Gibson { 213728e02042SDavid Gibson sPAPRMachineState *spapr = opaque; 2138715c5407SDavid Gibson int fd; 21394be21d56SDavid Gibson 21404be21d56SDavid Gibson /* Iteration header */ 21413a384297SBharata B Rao if (!spapr->htab_shift) { 21423a384297SBharata B Rao qemu_put_be32(f, -1); 21433a384297SBharata B Rao return 0; 21443a384297SBharata B Rao } else { 21454be21d56SDavid Gibson qemu_put_be32(f, 0); 21463a384297SBharata B Rao } 21474be21d56SDavid Gibson 2148e68cb8b4SAlexey Kardashevskiy if (!spapr->htab) { 2149e68cb8b4SAlexey Kardashevskiy int rc; 2150e68cb8b4SAlexey Kardashevskiy 2151e68cb8b4SAlexey Kardashevskiy assert(kvm_enabled()); 2152e68cb8b4SAlexey Kardashevskiy 2153715c5407SDavid Gibson fd = get_htab_fd(spapr); 2154715c5407SDavid Gibson if (fd < 0) { 2155715c5407SDavid Gibson return fd; 215601a57972SSamuel Mendoza-Jonas } 215701a57972SSamuel Mendoza-Jonas 2158715c5407SDavid Gibson rc = kvmppc_save_htab(f, fd, MAX_KVM_BUF_SIZE, -1); 2159e68cb8b4SAlexey Kardashevskiy if (rc < 0) { 2160e68cb8b4SAlexey Kardashevskiy return rc; 2161e68cb8b4SAlexey Kardashevskiy } 2162e68cb8b4SAlexey Kardashevskiy } else { 2163378bc217SDavid Gibson if (spapr->htab_first_pass) { 2164378bc217SDavid Gibson htab_save_first_pass(f, spapr, -1); 2165378bc217SDavid Gibson } 21664be21d56SDavid Gibson htab_save_later_pass(f, spapr, -1); 2167e68cb8b4SAlexey Kardashevskiy } 21684be21d56SDavid Gibson 21694be21d56SDavid Gibson /* End marker */ 2170332f7721SGreg Kurz htab_save_end_marker(f); 21714be21d56SDavid Gibson 21724be21d56SDavid Gibson return 0; 21734be21d56SDavid Gibson } 21744be21d56SDavid Gibson 21754be21d56SDavid Gibson static int htab_load(QEMUFile *f, void *opaque, int version_id) 21764be21d56SDavid Gibson { 217728e02042SDavid Gibson sPAPRMachineState *spapr = opaque; 21784be21d56SDavid Gibson uint32_t section_hdr; 2179e68cb8b4SAlexey Kardashevskiy int fd = -1; 218014b0d748SGreg Kurz Error *local_err = NULL; 21814be21d56SDavid Gibson 21824be21d56SDavid Gibson if (version_id < 1 || version_id > 1) { 218398a5d100SDavid Gibson error_report("htab_load() bad version"); 21844be21d56SDavid Gibson return -EINVAL; 21854be21d56SDavid Gibson } 21864be21d56SDavid Gibson 21874be21d56SDavid Gibson section_hdr = qemu_get_be32(f); 21884be21d56SDavid Gibson 21893a384297SBharata B Rao if (section_hdr == -1) { 21903a384297SBharata B Rao spapr_free_hpt(spapr); 21913a384297SBharata B Rao return 0; 21923a384297SBharata B Rao } 21933a384297SBharata B Rao 21944be21d56SDavid Gibson if (section_hdr) { 2195c5f54f3eSDavid Gibson /* First section gives the htab size */ 2196c5f54f3eSDavid Gibson spapr_reallocate_hpt(spapr, section_hdr, &local_err); 2197c5f54f3eSDavid Gibson if (local_err) { 2198c5f54f3eSDavid Gibson error_report_err(local_err); 21994be21d56SDavid Gibson return -EINVAL; 22004be21d56SDavid Gibson } 22014be21d56SDavid Gibson return 0; 22024be21d56SDavid Gibson } 22034be21d56SDavid Gibson 2204e68cb8b4SAlexey Kardashevskiy if (!spapr->htab) { 2205e68cb8b4SAlexey Kardashevskiy assert(kvm_enabled()); 2206e68cb8b4SAlexey Kardashevskiy 220714b0d748SGreg Kurz fd = kvmppc_get_htab_fd(true, 0, &local_err); 2208e68cb8b4SAlexey Kardashevskiy if (fd < 0) { 220914b0d748SGreg Kurz error_report_err(local_err); 221082be8e73SGreg Kurz return fd; 2211e68cb8b4SAlexey Kardashevskiy } 2212e68cb8b4SAlexey Kardashevskiy } 2213e68cb8b4SAlexey Kardashevskiy 22144be21d56SDavid Gibson while (true) { 22154be21d56SDavid Gibson uint32_t index; 22164be21d56SDavid Gibson uint16_t n_valid, n_invalid; 22174be21d56SDavid Gibson 22184be21d56SDavid Gibson index = qemu_get_be32(f); 22194be21d56SDavid Gibson n_valid = qemu_get_be16(f); 22204be21d56SDavid Gibson n_invalid = qemu_get_be16(f); 22214be21d56SDavid Gibson 22224be21d56SDavid Gibson if ((index == 0) && (n_valid == 0) && (n_invalid == 0)) { 22234be21d56SDavid Gibson /* End of Stream */ 22244be21d56SDavid Gibson break; 22254be21d56SDavid Gibson } 22264be21d56SDavid Gibson 2227e68cb8b4SAlexey Kardashevskiy if ((index + n_valid + n_invalid) > 22284be21d56SDavid Gibson (HTAB_SIZE(spapr) / HASH_PTE_SIZE_64)) { 22294be21d56SDavid Gibson /* Bad index in stream */ 223098a5d100SDavid Gibson error_report( 223198a5d100SDavid Gibson "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)", 223298a5d100SDavid Gibson index, n_valid, n_invalid, spapr->htab_shift); 22334be21d56SDavid Gibson return -EINVAL; 22344be21d56SDavid Gibson } 22354be21d56SDavid Gibson 2236e68cb8b4SAlexey Kardashevskiy if (spapr->htab) { 22374be21d56SDavid Gibson if (n_valid) { 22384be21d56SDavid Gibson qemu_get_buffer(f, HPTE(spapr->htab, index), 22394be21d56SDavid Gibson HASH_PTE_SIZE_64 * n_valid); 22404be21d56SDavid Gibson } 22414be21d56SDavid Gibson if (n_invalid) { 22424be21d56SDavid Gibson memset(HPTE(spapr->htab, index + n_valid), 0, 22434be21d56SDavid Gibson HASH_PTE_SIZE_64 * n_invalid); 22444be21d56SDavid Gibson } 2245e68cb8b4SAlexey Kardashevskiy } else { 2246e68cb8b4SAlexey Kardashevskiy int rc; 2247e68cb8b4SAlexey Kardashevskiy 2248e68cb8b4SAlexey Kardashevskiy assert(fd >= 0); 2249e68cb8b4SAlexey Kardashevskiy 2250e68cb8b4SAlexey Kardashevskiy rc = kvmppc_load_htab_chunk(f, fd, index, n_valid, n_invalid); 2251e68cb8b4SAlexey Kardashevskiy if (rc < 0) { 2252e68cb8b4SAlexey Kardashevskiy return rc; 2253e68cb8b4SAlexey Kardashevskiy } 2254e68cb8b4SAlexey Kardashevskiy } 2255e68cb8b4SAlexey Kardashevskiy } 2256e68cb8b4SAlexey Kardashevskiy 2257e68cb8b4SAlexey Kardashevskiy if (!spapr->htab) { 2258e68cb8b4SAlexey Kardashevskiy assert(fd >= 0); 2259e68cb8b4SAlexey Kardashevskiy close(fd); 22604be21d56SDavid Gibson } 22614be21d56SDavid Gibson 22624be21d56SDavid Gibson return 0; 22634be21d56SDavid Gibson } 22644be21d56SDavid Gibson 226570f794fcSJuan Quintela static void htab_save_cleanup(void *opaque) 2266c573fc03SThomas Huth { 2267c573fc03SThomas Huth sPAPRMachineState *spapr = opaque; 2268c573fc03SThomas Huth 2269c573fc03SThomas Huth close_htab_fd(spapr); 2270c573fc03SThomas Huth } 2271c573fc03SThomas Huth 22724be21d56SDavid Gibson static SaveVMHandlers savevm_htab_handlers = { 22739907e842SJuan Quintela .save_setup = htab_save_setup, 22744be21d56SDavid Gibson .save_live_iterate = htab_save_iterate, 2275a3e06c3dSDr. David Alan Gilbert .save_live_complete_precopy = htab_save_complete, 227670f794fcSJuan Quintela .save_cleanup = htab_save_cleanup, 22774be21d56SDavid Gibson .load_state = htab_load, 22784be21d56SDavid Gibson }; 22794be21d56SDavid Gibson 22805b2128d2SAlexander Graf static void spapr_boot_set(void *opaque, const char *boot_device, 22815b2128d2SAlexander Graf Error **errp) 22825b2128d2SAlexander Graf { 2283c86c1affSDaniel Henrique Barboza MachineState *machine = MACHINE(opaque); 22845b2128d2SAlexander Graf machine->boot_order = g_strdup(boot_device); 22855b2128d2SAlexander Graf } 22865b2128d2SAlexander Graf 2287224245bfSDavid Gibson static void spapr_create_lmb_dr_connectors(sPAPRMachineState *spapr) 2288224245bfSDavid Gibson { 2289224245bfSDavid Gibson MachineState *machine = MACHINE(spapr); 2290224245bfSDavid Gibson uint64_t lmb_size = SPAPR_MEMORY_BLOCK_SIZE; 2291e8f986fcSBharata B Rao uint32_t nr_lmbs = (machine->maxram_size - machine->ram_size)/lmb_size; 2292224245bfSDavid Gibson int i; 2293224245bfSDavid Gibson 2294224245bfSDavid Gibson for (i = 0; i < nr_lmbs; i++) { 2295224245bfSDavid Gibson uint64_t addr; 2296224245bfSDavid Gibson 2297e8f986fcSBharata B Rao addr = i * lmb_size + spapr->hotplug_memory.base; 22986caf3ac6SDavid Gibson spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_LMB, 2299224245bfSDavid Gibson addr / lmb_size); 2300224245bfSDavid Gibson } 2301224245bfSDavid Gibson } 2302224245bfSDavid Gibson 2303224245bfSDavid Gibson /* 2304224245bfSDavid Gibson * If RAM size, maxmem size and individual node mem sizes aren't aligned 2305224245bfSDavid Gibson * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest 2306224245bfSDavid Gibson * since we can't support such unaligned sizes with DRCONF_MEMORY. 2307224245bfSDavid Gibson */ 23087c150d6fSDavid Gibson static void spapr_validate_node_memory(MachineState *machine, Error **errp) 2309224245bfSDavid Gibson { 2310224245bfSDavid Gibson int i; 2311224245bfSDavid Gibson 23127c150d6fSDavid Gibson if (machine->ram_size % SPAPR_MEMORY_BLOCK_SIZE) { 23137c150d6fSDavid Gibson error_setg(errp, "Memory size 0x" RAM_ADDR_FMT 23147c150d6fSDavid Gibson " is not aligned to %llu MiB", 23157c150d6fSDavid Gibson machine->ram_size, 2316224245bfSDavid Gibson SPAPR_MEMORY_BLOCK_SIZE / M_BYTE); 23177c150d6fSDavid Gibson return; 23187c150d6fSDavid Gibson } 23197c150d6fSDavid Gibson 23207c150d6fSDavid Gibson if (machine->maxram_size % SPAPR_MEMORY_BLOCK_SIZE) { 23217c150d6fSDavid Gibson error_setg(errp, "Maximum memory size 0x" RAM_ADDR_FMT 23227c150d6fSDavid Gibson " is not aligned to %llu MiB", 23237c150d6fSDavid Gibson machine->ram_size, 23247c150d6fSDavid Gibson SPAPR_MEMORY_BLOCK_SIZE / M_BYTE); 23257c150d6fSDavid Gibson return; 2326224245bfSDavid Gibson } 2327224245bfSDavid Gibson 2328224245bfSDavid Gibson for (i = 0; i < nb_numa_nodes; i++) { 2329224245bfSDavid Gibson if (numa_info[i].node_mem % SPAPR_MEMORY_BLOCK_SIZE) { 23307c150d6fSDavid Gibson error_setg(errp, 23317c150d6fSDavid Gibson "Node %d memory size 0x%" PRIx64 23327c150d6fSDavid Gibson " is not aligned to %llu MiB", 23337c150d6fSDavid Gibson i, numa_info[i].node_mem, 2334224245bfSDavid Gibson SPAPR_MEMORY_BLOCK_SIZE / M_BYTE); 23357c150d6fSDavid Gibson return; 2336224245bfSDavid Gibson } 2337224245bfSDavid Gibson } 2338224245bfSDavid Gibson } 2339224245bfSDavid Gibson 2340535455fdSIgor Mammedov /* find cpu slot in machine->possible_cpus by core_id */ 2341535455fdSIgor Mammedov static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx) 2342535455fdSIgor Mammedov { 2343535455fdSIgor Mammedov int index = id / smp_threads; 2344535455fdSIgor Mammedov 2345535455fdSIgor Mammedov if (index >= ms->possible_cpus->len) { 2346535455fdSIgor Mammedov return NULL; 2347535455fdSIgor Mammedov } 2348535455fdSIgor Mammedov if (idx) { 2349535455fdSIgor Mammedov *idx = index; 2350535455fdSIgor Mammedov } 2351535455fdSIgor Mammedov return &ms->possible_cpus->cpus[index]; 2352535455fdSIgor Mammedov } 2353535455fdSIgor Mammedov 2354fa98fbfcSSam Bobroff static void spapr_set_vsmt_mode(sPAPRMachineState *spapr, Error **errp) 2355fa98fbfcSSam Bobroff { 2356fa98fbfcSSam Bobroff Error *local_err = NULL; 2357fa98fbfcSSam Bobroff bool vsmt_user = !!spapr->vsmt; 2358fa98fbfcSSam Bobroff int kvm_smt = kvmppc_smt_threads(); 2359fa98fbfcSSam Bobroff int ret; 2360fa98fbfcSSam Bobroff 2361fa98fbfcSSam Bobroff if (!kvm_enabled() && (smp_threads > 1)) { 2362fa98fbfcSSam Bobroff error_setg(&local_err, "TCG cannot support more than 1 thread/core " 2363fa98fbfcSSam Bobroff "on a pseries machine"); 2364fa98fbfcSSam Bobroff goto out; 2365fa98fbfcSSam Bobroff } 2366fa98fbfcSSam Bobroff if (!is_power_of_2(smp_threads)) { 2367fa98fbfcSSam Bobroff error_setg(&local_err, "Cannot support %d threads/core on a pseries " 2368fa98fbfcSSam Bobroff "machine because it must be a power of 2", smp_threads); 2369fa98fbfcSSam Bobroff goto out; 2370fa98fbfcSSam Bobroff } 2371fa98fbfcSSam Bobroff 2372fa98fbfcSSam Bobroff /* Detemine the VSMT mode to use: */ 2373fa98fbfcSSam Bobroff if (vsmt_user) { 2374fa98fbfcSSam Bobroff if (spapr->vsmt < smp_threads) { 2375fa98fbfcSSam Bobroff error_setg(&local_err, "Cannot support VSMT mode %d" 2376fa98fbfcSSam Bobroff " because it must be >= threads/core (%d)", 2377fa98fbfcSSam Bobroff spapr->vsmt, smp_threads); 2378fa98fbfcSSam Bobroff goto out; 2379fa98fbfcSSam Bobroff } 2380fa98fbfcSSam Bobroff /* In this case, spapr->vsmt has been set by the command line */ 2381fa98fbfcSSam Bobroff } else { 23828904e5a7SDavid Gibson /* 23838904e5a7SDavid Gibson * Default VSMT value is tricky, because we need it to be as 23848904e5a7SDavid Gibson * consistent as possible (for migration), but this requires 23858904e5a7SDavid Gibson * changing it for at least some existing cases. We pick 8 as 23868904e5a7SDavid Gibson * the value that we'd get with KVM on POWER8, the 23878904e5a7SDavid Gibson * overwhelmingly common case in production systems. 23888904e5a7SDavid Gibson */ 23894ad64cbdSLaurent Vivier spapr->vsmt = MAX(8, smp_threads); 2390fa98fbfcSSam Bobroff } 2391fa98fbfcSSam Bobroff 2392fa98fbfcSSam Bobroff /* KVM: If necessary, set the SMT mode: */ 2393fa98fbfcSSam Bobroff if (kvm_enabled() && (spapr->vsmt != kvm_smt)) { 2394fa98fbfcSSam Bobroff ret = kvmppc_set_smt_threads(spapr->vsmt); 2395fa98fbfcSSam Bobroff if (ret) { 23961f20f2e0SDavid Gibson /* Looks like KVM isn't able to change VSMT mode */ 2397fa98fbfcSSam Bobroff error_setg(&local_err, 2398fa98fbfcSSam Bobroff "Failed to set KVM's VSMT mode to %d (errno %d)", 2399fa98fbfcSSam Bobroff spapr->vsmt, ret); 24001f20f2e0SDavid Gibson /* We can live with that if the default one is big enough 24011f20f2e0SDavid Gibson * for the number of threads, and a submultiple of the one 24021f20f2e0SDavid Gibson * we want. In this case we'll waste some vcpu ids, but 24031f20f2e0SDavid Gibson * behaviour will be correct */ 24041f20f2e0SDavid Gibson if ((kvm_smt >= smp_threads) && ((spapr->vsmt % kvm_smt) == 0)) { 24051f20f2e0SDavid Gibson warn_report_err(local_err); 24061f20f2e0SDavid Gibson local_err = NULL; 24071f20f2e0SDavid Gibson goto out; 24081f20f2e0SDavid Gibson } else { 2409fa98fbfcSSam Bobroff if (!vsmt_user) { 24101f20f2e0SDavid Gibson error_append_hint(&local_err, 24111f20f2e0SDavid Gibson "On PPC, a VM with %d threads/core" 24121f20f2e0SDavid Gibson " on a host with %d threads/core" 24131f20f2e0SDavid Gibson " requires the use of VSMT mode %d.\n", 2414fa98fbfcSSam Bobroff smp_threads, kvm_smt, spapr->vsmt); 2415fa98fbfcSSam Bobroff } 2416fa98fbfcSSam Bobroff kvmppc_hint_smt_possible(&local_err); 2417fa98fbfcSSam Bobroff goto out; 2418fa98fbfcSSam Bobroff } 2419fa98fbfcSSam Bobroff } 24201f20f2e0SDavid Gibson } 2421fa98fbfcSSam Bobroff /* else TCG: nothing to do currently */ 2422fa98fbfcSSam Bobroff out: 2423fa98fbfcSSam Bobroff error_propagate(errp, local_err); 2424fa98fbfcSSam Bobroff } 2425fa98fbfcSSam Bobroff 24261a5008fcSGreg Kurz static void spapr_init_cpus(sPAPRMachineState *spapr) 24271a5008fcSGreg Kurz { 24281a5008fcSGreg Kurz MachineState *machine = MACHINE(spapr); 24291a5008fcSGreg Kurz MachineClass *mc = MACHINE_GET_CLASS(machine); 24301a5008fcSGreg Kurz sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine); 24311a5008fcSGreg Kurz const char *type = spapr_get_cpu_core_type(machine->cpu_type); 24321a5008fcSGreg Kurz const CPUArchIdList *possible_cpus; 24331a5008fcSGreg Kurz int boot_cores_nr = smp_cpus / smp_threads; 24341a5008fcSGreg Kurz int i; 24351a5008fcSGreg Kurz 24361a5008fcSGreg Kurz possible_cpus = mc->possible_cpu_arch_ids(machine); 24371a5008fcSGreg Kurz if (mc->has_hotpluggable_cpus) { 24381a5008fcSGreg Kurz if (smp_cpus % smp_threads) { 24391a5008fcSGreg Kurz error_report("smp_cpus (%u) must be multiple of threads (%u)", 24401a5008fcSGreg Kurz smp_cpus, smp_threads); 24411a5008fcSGreg Kurz exit(1); 24421a5008fcSGreg Kurz } 24431a5008fcSGreg Kurz if (max_cpus % smp_threads) { 24441a5008fcSGreg Kurz error_report("max_cpus (%u) must be multiple of threads (%u)", 24451a5008fcSGreg Kurz max_cpus, smp_threads); 24461a5008fcSGreg Kurz exit(1); 24471a5008fcSGreg Kurz } 24481a5008fcSGreg Kurz } else { 24491a5008fcSGreg Kurz if (max_cpus != smp_cpus) { 24501a5008fcSGreg Kurz error_report("This machine version does not support CPU hotplug"); 24511a5008fcSGreg Kurz exit(1); 24521a5008fcSGreg Kurz } 24531a5008fcSGreg Kurz boot_cores_nr = possible_cpus->len; 24541a5008fcSGreg Kurz } 24551a5008fcSGreg Kurz 24561a5008fcSGreg Kurz /* VSMT must be set in order to be able to compute VCPU ids, ie to 24571a5008fcSGreg Kurz * call xics_max_server_number() or spapr_vcpu_id(). 24581a5008fcSGreg Kurz */ 24591a5008fcSGreg Kurz spapr_set_vsmt_mode(spapr, &error_fatal); 24601a5008fcSGreg Kurz 24611a5008fcSGreg Kurz if (smc->pre_2_10_has_unused_icps) { 24621a5008fcSGreg Kurz int i; 24631a5008fcSGreg Kurz 24641a5008fcSGreg Kurz for (i = 0; i < xics_max_server_number(spapr); i++) { 24651a5008fcSGreg Kurz /* Dummy entries get deregistered when real ICPState objects 24661a5008fcSGreg Kurz * are registered during CPU core hotplug. 24671a5008fcSGreg Kurz */ 24681a5008fcSGreg Kurz pre_2_10_vmstate_register_dummy_icp(i); 24691a5008fcSGreg Kurz } 24701a5008fcSGreg Kurz } 24711a5008fcSGreg Kurz 24721a5008fcSGreg Kurz for (i = 0; i < possible_cpus->len; i++) { 24731a5008fcSGreg Kurz int core_id = i * smp_threads; 24741a5008fcSGreg Kurz 24751a5008fcSGreg Kurz if (mc->has_hotpluggable_cpus) { 24761a5008fcSGreg Kurz spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_CPU, 24771a5008fcSGreg Kurz spapr_vcpu_id(spapr, core_id)); 24781a5008fcSGreg Kurz } 24791a5008fcSGreg Kurz 24801a5008fcSGreg Kurz if (i < boot_cores_nr) { 24811a5008fcSGreg Kurz Object *core = object_new(type); 24821a5008fcSGreg Kurz int nr_threads = smp_threads; 24831a5008fcSGreg Kurz 24841a5008fcSGreg Kurz /* Handle the partially filled core for older machine types */ 24851a5008fcSGreg Kurz if ((i + 1) * smp_threads >= smp_cpus) { 24861a5008fcSGreg Kurz nr_threads = smp_cpus - i * smp_threads; 24871a5008fcSGreg Kurz } 24881a5008fcSGreg Kurz 24891a5008fcSGreg Kurz object_property_set_int(core, nr_threads, "nr-threads", 24901a5008fcSGreg Kurz &error_fatal); 24911a5008fcSGreg Kurz object_property_set_int(core, core_id, CPU_CORE_PROP_CORE_ID, 24921a5008fcSGreg Kurz &error_fatal); 24931a5008fcSGreg Kurz object_property_set_bool(core, true, "realized", &error_fatal); 24941a5008fcSGreg Kurz } 24951a5008fcSGreg Kurz } 24961a5008fcSGreg Kurz } 24971a5008fcSGreg Kurz 249853018216SPaolo Bonzini /* pSeries LPAR / sPAPR hardware init */ 2499bcb5ce08SDavid Gibson static void spapr_machine_init(MachineState *machine) 250053018216SPaolo Bonzini { 250128e02042SDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(machine); 2502224245bfSDavid Gibson sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine); 25033ef96221SMarcel Apfelbaum const char *kernel_filename = machine->kernel_filename; 25043ef96221SMarcel Apfelbaum const char *initrd_filename = machine->initrd_filename; 250553018216SPaolo Bonzini PCIHostState *phb; 250653018216SPaolo Bonzini int i; 250753018216SPaolo Bonzini MemoryRegion *sysmem = get_system_memory(); 250853018216SPaolo Bonzini MemoryRegion *ram = g_new(MemoryRegion, 1); 2509c86c1affSDaniel Henrique Barboza hwaddr node0_size = spapr_node0_size(machine); 2510b7d1f77aSBenjamin Herrenschmidt long load_limit, fw_size; 251153018216SPaolo Bonzini char *filename; 251230f4b05bSDavid Gibson Error *resize_hpt_err = NULL; 251353018216SPaolo Bonzini 2514226419d6SMichael S. Tsirkin msi_nonbroken = true; 251553018216SPaolo Bonzini 251653018216SPaolo Bonzini QLIST_INIT(&spapr->phbs); 25170cffce56SDavid Gibson QTAILQ_INIT(&spapr->pending_dimm_unplugs); 251853018216SPaolo Bonzini 251930f4b05bSDavid Gibson /* Check HPT resizing availability */ 252030f4b05bSDavid Gibson kvmppc_check_papr_resize_hpt(&resize_hpt_err); 252130f4b05bSDavid Gibson if (spapr->resize_hpt == SPAPR_RESIZE_HPT_DEFAULT) { 252230f4b05bSDavid Gibson /* 252330f4b05bSDavid Gibson * If the user explicitly requested a mode we should either 252430f4b05bSDavid Gibson * supply it, or fail completely (which we do below). But if 252530f4b05bSDavid Gibson * it's not set explicitly, we reset our mode to something 252630f4b05bSDavid Gibson * that works 252730f4b05bSDavid Gibson */ 252830f4b05bSDavid Gibson if (resize_hpt_err) { 252930f4b05bSDavid Gibson spapr->resize_hpt = SPAPR_RESIZE_HPT_DISABLED; 253030f4b05bSDavid Gibson error_free(resize_hpt_err); 253130f4b05bSDavid Gibson resize_hpt_err = NULL; 253230f4b05bSDavid Gibson } else { 253330f4b05bSDavid Gibson spapr->resize_hpt = smc->resize_hpt_default; 253430f4b05bSDavid Gibson } 253530f4b05bSDavid Gibson } 253630f4b05bSDavid Gibson 253730f4b05bSDavid Gibson assert(spapr->resize_hpt != SPAPR_RESIZE_HPT_DEFAULT); 253830f4b05bSDavid Gibson 253930f4b05bSDavid Gibson if ((spapr->resize_hpt != SPAPR_RESIZE_HPT_DISABLED) && resize_hpt_err) { 254030f4b05bSDavid Gibson /* 254130f4b05bSDavid Gibson * User requested HPT resize, but this host can't supply it. Bail out 254230f4b05bSDavid Gibson */ 254330f4b05bSDavid Gibson error_report_err(resize_hpt_err); 254430f4b05bSDavid Gibson exit(1); 254530f4b05bSDavid Gibson } 254630f4b05bSDavid Gibson 2547c4177479SAlexey Kardashevskiy spapr->rma_size = node0_size; 254853018216SPaolo Bonzini 254953018216SPaolo Bonzini /* With KVM, we don't actually know whether KVM supports an 255053018216SPaolo Bonzini * unbounded RMA (PR KVM) or is limited by the hash table size 255153018216SPaolo Bonzini * (HV KVM using VRMA), so we always assume the latter 255253018216SPaolo Bonzini * 255353018216SPaolo Bonzini * In that case, we also limit the initial allocations for RTAS 255453018216SPaolo Bonzini * etc... to 256M since we have no way to know what the VRMA size 255553018216SPaolo Bonzini * is going to be as it depends on the size of the hash table 2556090052aaSDavid Gibson * which isn't determined yet. 255753018216SPaolo Bonzini */ 255853018216SPaolo Bonzini if (kvm_enabled()) { 255953018216SPaolo Bonzini spapr->vrma_adjust = 1; 256053018216SPaolo Bonzini spapr->rma_size = MIN(spapr->rma_size, 0x10000000); 256153018216SPaolo Bonzini } 2562912acdf4SBenjamin Herrenschmidt 2563090052aaSDavid Gibson /* Actually we don't support unbounded RMA anymore since we added 2564090052aaSDavid Gibson * proper emulation of HV mode. The max we can get is 16G which 2565090052aaSDavid Gibson * also happens to be what we configure for PAPR mode so make sure 2566090052aaSDavid Gibson * we don't do anything bigger than that 2567912acdf4SBenjamin Herrenschmidt */ 2568912acdf4SBenjamin Herrenschmidt spapr->rma_size = MIN(spapr->rma_size, 0x400000000ull); 256953018216SPaolo Bonzini 2570c4177479SAlexey Kardashevskiy if (spapr->rma_size > node0_size) { 2571d54e4d76SDavid Gibson error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx")", 2572c4177479SAlexey Kardashevskiy spapr->rma_size); 2573c4177479SAlexey Kardashevskiy exit(1); 2574c4177479SAlexey Kardashevskiy } 2575c4177479SAlexey Kardashevskiy 2576b7d1f77aSBenjamin Herrenschmidt /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */ 2577b7d1f77aSBenjamin Herrenschmidt load_limit = MIN(spapr->rma_size, RTAS_MAX_ADDR) - FW_OVERHEAD; 257853018216SPaolo Bonzini 25797b565160SDavid Gibson /* Set up Interrupt Controller before we create the VCPUs */ 258071cd4dacSCédric Le Goater xics_system_init(machine, XICS_IRQS_SPAPR, &error_fatal); 25817b565160SDavid Gibson 2582dc1b5eeeSGreg Kurz /* Set up containers for ibm,client-architecture-support negotiated options 2583dc1b5eeeSGreg Kurz */ 2584facdb8b6SMichael Roth spapr->ov5 = spapr_ovec_new(); 2585facdb8b6SMichael Roth spapr->ov5_cas = spapr_ovec_new(); 2586facdb8b6SMichael Roth 2587224245bfSDavid Gibson if (smc->dr_lmb_enabled) { 2588facdb8b6SMichael Roth spapr_ovec_set(spapr->ov5, OV5_DRCONF_MEMORY); 25897c150d6fSDavid Gibson spapr_validate_node_memory(machine, &error_fatal); 2590224245bfSDavid Gibson } 2591224245bfSDavid Gibson 2592417ece33SMichael Roth spapr_ovec_set(spapr->ov5, OV5_FORM1_AFFINITY); 2593545d6e2bSSuraj Jitindar Singh if (!kvm_enabled() || kvmppc_has_cap_mmu_radix()) { 2594545d6e2bSSuraj Jitindar Singh /* KVM and TCG always allow GTSE with radix... */ 25959fb4541fSSam Bobroff spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_GTSE); 25969fb4541fSSam Bobroff } 25979fb4541fSSam Bobroff /* ... but not with hash (currently). */ 2598417ece33SMichael Roth 2599ffbb1705SMichael Roth /* advertise support for dedicated HP event source to guests */ 2600ffbb1705SMichael Roth if (spapr->use_hotplug_event_source) { 2601ffbb1705SMichael Roth spapr_ovec_set(spapr->ov5, OV5_HP_EVT); 2602ffbb1705SMichael Roth } 2603ffbb1705SMichael Roth 26042772cf6bSDavid Gibson /* advertise support for HPT resizing */ 26052772cf6bSDavid Gibson if (spapr->resize_hpt != SPAPR_RESIZE_HPT_DISABLED) { 26062772cf6bSDavid Gibson spapr_ovec_set(spapr->ov5, OV5_HPT_RESIZE); 26072772cf6bSDavid Gibson } 26082772cf6bSDavid Gibson 2609a324d6f1SBharata B Rao /* advertise support for ibm,dyamic-memory-v2 */ 2610a324d6f1SBharata B Rao spapr_ovec_set(spapr->ov5, OV5_DRMEM_V2); 2611a324d6f1SBharata B Rao 261253018216SPaolo Bonzini /* init CPUs */ 26130c86d0fdSDavid Gibson spapr_init_cpus(spapr); 261453018216SPaolo Bonzini 2615026bfd89SDavid Gibson if (kvm_enabled()) { 2616026bfd89SDavid Gibson /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */ 2617026bfd89SDavid Gibson kvmppc_enable_logical_ci_hcalls(); 2618ef9971ddSAlexey Kardashevskiy kvmppc_enable_set_mode_hcall(); 26195145ad4fSNathan Whitehorn 26205145ad4fSNathan Whitehorn /* H_CLEAR_MOD/_REF are mandatory in PAPR, but off by default */ 26215145ad4fSNathan Whitehorn kvmppc_enable_clear_ref_mod_hcalls(); 2622026bfd89SDavid Gibson } 2623026bfd89SDavid Gibson 262453018216SPaolo Bonzini /* allocate RAM */ 2625f92f5da1SAlexey Kardashevskiy memory_region_allocate_system_memory(ram, NULL, "ppc_spapr.ram", 2626fb164994SDavid Gibson machine->ram_size); 2627f92f5da1SAlexey Kardashevskiy memory_region_add_subregion(sysmem, 0, ram); 262853018216SPaolo Bonzini 26294a1c9cf0SBharata B Rao /* initialize hotplug memory address space */ 26304a1c9cf0SBharata B Rao if (machine->ram_size < machine->maxram_size) { 26314a1c9cf0SBharata B Rao ram_addr_t hotplug_mem_size = machine->maxram_size - machine->ram_size; 263271c9a3ddSBharata B Rao /* 263371c9a3ddSBharata B Rao * Limit the number of hotpluggable memory slots to half the number 263471c9a3ddSBharata B Rao * slots that KVM supports, leaving the other half for PCI and other 263571c9a3ddSBharata B Rao * devices. However ensure that number of slots doesn't drop below 32. 263671c9a3ddSBharata B Rao */ 263771c9a3ddSBharata B Rao int max_memslots = kvm_enabled() ? kvm_get_max_memslots() / 2 : 263871c9a3ddSBharata B Rao SPAPR_MAX_RAM_SLOTS; 26394a1c9cf0SBharata B Rao 264071c9a3ddSBharata B Rao if (max_memslots < SPAPR_MAX_RAM_SLOTS) { 264171c9a3ddSBharata B Rao max_memslots = SPAPR_MAX_RAM_SLOTS; 264271c9a3ddSBharata B Rao } 264371c9a3ddSBharata B Rao if (machine->ram_slots > max_memslots) { 2644d54e4d76SDavid Gibson error_report("Specified number of memory slots %" 2645d54e4d76SDavid Gibson PRIu64" exceeds max supported %d", 264671c9a3ddSBharata B Rao machine->ram_slots, max_memslots); 2647d54e4d76SDavid Gibson exit(1); 26484a1c9cf0SBharata B Rao } 26494a1c9cf0SBharata B Rao 26504a1c9cf0SBharata B Rao spapr->hotplug_memory.base = ROUND_UP(machine->ram_size, 26514a1c9cf0SBharata B Rao SPAPR_HOTPLUG_MEM_ALIGN); 26524a1c9cf0SBharata B Rao memory_region_init(&spapr->hotplug_memory.mr, OBJECT(spapr), 26534a1c9cf0SBharata B Rao "hotplug-memory", hotplug_mem_size); 26544a1c9cf0SBharata B Rao memory_region_add_subregion(sysmem, spapr->hotplug_memory.base, 26554a1c9cf0SBharata B Rao &spapr->hotplug_memory.mr); 26564a1c9cf0SBharata B Rao } 26574a1c9cf0SBharata B Rao 2658224245bfSDavid Gibson if (smc->dr_lmb_enabled) { 2659224245bfSDavid Gibson spapr_create_lmb_dr_connectors(spapr); 2660224245bfSDavid Gibson } 2661224245bfSDavid Gibson 266253018216SPaolo Bonzini filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin"); 26634c56440dSStefan Weil if (!filename) { 2664730fce59SThomas Huth error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin"); 26654c56440dSStefan Weil exit(1); 26664c56440dSStefan Weil } 2667b7d1f77aSBenjamin Herrenschmidt spapr->rtas_size = get_image_size(filename); 26688afc22a2SZhou Jie if (spapr->rtas_size < 0) { 26698afc22a2SZhou Jie error_report("Could not get size of LPAR rtas '%s'", filename); 26708afc22a2SZhou Jie exit(1); 26718afc22a2SZhou Jie } 2672b7d1f77aSBenjamin Herrenschmidt spapr->rtas_blob = g_malloc(spapr->rtas_size); 2673b7d1f77aSBenjamin Herrenschmidt if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) { 2674730fce59SThomas Huth error_report("Could not load LPAR rtas '%s'", filename); 267553018216SPaolo Bonzini exit(1); 267653018216SPaolo Bonzini } 267753018216SPaolo Bonzini if (spapr->rtas_size > RTAS_MAX_SIZE) { 2678730fce59SThomas Huth error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)", 26792f285bddSPeter Maydell (size_t)spapr->rtas_size, RTAS_MAX_SIZE); 268053018216SPaolo Bonzini exit(1); 268153018216SPaolo Bonzini } 268253018216SPaolo Bonzini g_free(filename); 268353018216SPaolo Bonzini 2684ffbb1705SMichael Roth /* Set up RTAS event infrastructure */ 268553018216SPaolo Bonzini spapr_events_init(spapr); 268653018216SPaolo Bonzini 268712f42174SDavid Gibson /* Set up the RTC RTAS interfaces */ 268828df36a1SDavid Gibson spapr_rtc_create(spapr); 268912f42174SDavid Gibson 269053018216SPaolo Bonzini /* Set up VIO bus */ 269153018216SPaolo Bonzini spapr->vio_bus = spapr_vio_bus_init(); 269253018216SPaolo Bonzini 2693b8846a4dSPeter Maydell for (i = 0; i < serial_max_hds(); i++) { 26949bca0edbSPeter Maydell if (serial_hd(i)) { 26959bca0edbSPeter Maydell spapr_vty_create(spapr->vio_bus, serial_hd(i)); 269653018216SPaolo Bonzini } 269753018216SPaolo Bonzini } 269853018216SPaolo Bonzini 269953018216SPaolo Bonzini /* We always have at least the nvram device on VIO */ 270053018216SPaolo Bonzini spapr_create_nvram(spapr); 270153018216SPaolo Bonzini 270253018216SPaolo Bonzini /* Set up PCI */ 270353018216SPaolo Bonzini spapr_pci_rtas_init(); 270453018216SPaolo Bonzini 270589dfd6e1SDavid Gibson phb = spapr_create_phb(spapr, 0); 270653018216SPaolo Bonzini 270753018216SPaolo Bonzini for (i = 0; i < nb_nics; i++) { 270853018216SPaolo Bonzini NICInfo *nd = &nd_table[i]; 270953018216SPaolo Bonzini 271053018216SPaolo Bonzini if (!nd->model) { 27113c3a4e7aSThomas Huth nd->model = g_strdup("spapr-vlan"); 271253018216SPaolo Bonzini } 271353018216SPaolo Bonzini 27143c3a4e7aSThomas Huth if (g_str_equal(nd->model, "spapr-vlan") || 27153c3a4e7aSThomas Huth g_str_equal(nd->model, "ibmveth")) { 271653018216SPaolo Bonzini spapr_vlan_create(spapr->vio_bus, nd); 271753018216SPaolo Bonzini } else { 271829b358f9SDavid Gibson pci_nic_init_nofail(&nd_table[i], phb->bus, nd->model, NULL); 271953018216SPaolo Bonzini } 272053018216SPaolo Bonzini } 272153018216SPaolo Bonzini 272253018216SPaolo Bonzini for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { 272353018216SPaolo Bonzini spapr_vscsi_create(spapr->vio_bus); 272453018216SPaolo Bonzini } 272553018216SPaolo Bonzini 272653018216SPaolo Bonzini /* Graphics */ 272714c6a894SDavid Gibson if (spapr_vga_init(phb->bus, &error_fatal)) { 272853018216SPaolo Bonzini spapr->has_graphics = true; 2729c6e76503SPaolo Bonzini machine->usb |= defaults_enabled() && !machine->usb_disabled; 273053018216SPaolo Bonzini } 273153018216SPaolo Bonzini 27324ee9ced9SMarcel Apfelbaum if (machine->usb) { 273357040d45SThomas Huth if (smc->use_ohci_by_default) { 273453018216SPaolo Bonzini pci_create_simple(phb->bus, -1, "pci-ohci"); 273557040d45SThomas Huth } else { 273657040d45SThomas Huth pci_create_simple(phb->bus, -1, "nec-usb-xhci"); 273757040d45SThomas Huth } 2738c86580b8SMarkus Armbruster 273953018216SPaolo Bonzini if (spapr->has_graphics) { 2740c86580b8SMarkus Armbruster USBBus *usb_bus = usb_bus_find(-1); 2741c86580b8SMarkus Armbruster 2742c86580b8SMarkus Armbruster usb_create_simple(usb_bus, "usb-kbd"); 2743c86580b8SMarkus Armbruster usb_create_simple(usb_bus, "usb-mouse"); 274453018216SPaolo Bonzini } 274553018216SPaolo Bonzini } 274653018216SPaolo Bonzini 274753018216SPaolo Bonzini if (spapr->rma_size < (MIN_RMA_SLOF << 20)) { 2748d54e4d76SDavid Gibson error_report( 2749d54e4d76SDavid Gibson "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)", 2750d54e4d76SDavid Gibson MIN_RMA_SLOF); 275153018216SPaolo Bonzini exit(1); 275253018216SPaolo Bonzini } 275353018216SPaolo Bonzini 275453018216SPaolo Bonzini if (kernel_filename) { 275553018216SPaolo Bonzini uint64_t lowaddr = 0; 275653018216SPaolo Bonzini 2757a19f7fb0SDavid Gibson spapr->kernel_size = load_elf(kernel_filename, translate_kernel_address, 2758a19f7fb0SDavid Gibson NULL, NULL, &lowaddr, NULL, 1, 2759a19f7fb0SDavid Gibson PPC_ELF_MACHINE, 0, 0); 2760a19f7fb0SDavid Gibson if (spapr->kernel_size == ELF_LOAD_WRONG_ENDIAN) { 2761a19f7fb0SDavid Gibson spapr->kernel_size = load_elf(kernel_filename, 2762a19f7fb0SDavid Gibson translate_kernel_address, NULL, NULL, 2763a19f7fb0SDavid Gibson &lowaddr, NULL, 0, PPC_ELF_MACHINE, 27647ef295eaSPeter Crosthwaite 0, 0); 2765a19f7fb0SDavid Gibson spapr->kernel_le = spapr->kernel_size > 0; 276616457e7fSBenjamin Herrenschmidt } 2767a19f7fb0SDavid Gibson if (spapr->kernel_size < 0) { 2768a19f7fb0SDavid Gibson error_report("error loading %s: %s", kernel_filename, 2769a19f7fb0SDavid Gibson load_elf_strerror(spapr->kernel_size)); 277053018216SPaolo Bonzini exit(1); 277153018216SPaolo Bonzini } 277253018216SPaolo Bonzini 277353018216SPaolo Bonzini /* load initrd */ 277453018216SPaolo Bonzini if (initrd_filename) { 277553018216SPaolo Bonzini /* Try to locate the initrd in the gap between the kernel 277653018216SPaolo Bonzini * and the firmware. Add a bit of space just in case 277753018216SPaolo Bonzini */ 2778a19f7fb0SDavid Gibson spapr->initrd_base = (KERNEL_LOAD_ADDR + spapr->kernel_size 2779a19f7fb0SDavid Gibson + 0x1ffff) & ~0xffff; 2780a19f7fb0SDavid Gibson spapr->initrd_size = load_image_targphys(initrd_filename, 2781a19f7fb0SDavid Gibson spapr->initrd_base, 2782a19f7fb0SDavid Gibson load_limit 2783a19f7fb0SDavid Gibson - spapr->initrd_base); 2784a19f7fb0SDavid Gibson if (spapr->initrd_size < 0) { 2785d54e4d76SDavid Gibson error_report("could not load initial ram disk '%s'", 278653018216SPaolo Bonzini initrd_filename); 278753018216SPaolo Bonzini exit(1); 278853018216SPaolo Bonzini } 278953018216SPaolo Bonzini } 279053018216SPaolo Bonzini } 279153018216SPaolo Bonzini 27928e7ea787SAndreas Färber if (bios_name == NULL) { 27938e7ea787SAndreas Färber bios_name = FW_FILE_NAME; 27948e7ea787SAndreas Färber } 27958e7ea787SAndreas Färber filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 27964c56440dSStefan Weil if (!filename) { 279768fea5a0SThomas Huth error_report("Could not find LPAR firmware '%s'", bios_name); 27984c56440dSStefan Weil exit(1); 27994c56440dSStefan Weil } 280053018216SPaolo Bonzini fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE); 280168fea5a0SThomas Huth if (fw_size <= 0) { 280268fea5a0SThomas Huth error_report("Could not load LPAR firmware '%s'", filename); 280353018216SPaolo Bonzini exit(1); 280453018216SPaolo Bonzini } 280553018216SPaolo Bonzini g_free(filename); 280653018216SPaolo Bonzini 280728e02042SDavid Gibson /* FIXME: Should register things through the MachineState's qdev 280828e02042SDavid Gibson * interface, this is a legacy from the sPAPREnvironment structure 280928e02042SDavid Gibson * which predated MachineState but had a similar function */ 28104be21d56SDavid Gibson vmstate_register(NULL, 0, &vmstate_spapr, spapr); 28114be21d56SDavid Gibson register_savevm_live(NULL, "spapr/htab", -1, 1, 28124be21d56SDavid Gibson &savevm_htab_handlers, spapr); 28134be21d56SDavid Gibson 28145b2128d2SAlexander Graf qemu_register_boot_set(spapr_boot_set, spapr); 281542043e4fSLaurent Vivier 281642043e4fSLaurent Vivier if (kvm_enabled()) { 28173dc410aeSAlexey Kardashevskiy /* to stop and start vmclock */ 281842043e4fSLaurent Vivier qemu_add_vm_change_state_handler(cpu_ppc_clock_vm_state_change, 281942043e4fSLaurent Vivier &spapr->tb); 28203dc410aeSAlexey Kardashevskiy 28213dc410aeSAlexey Kardashevskiy kvmppc_spapr_enable_inkernel_multitce(); 282242043e4fSLaurent Vivier } 282353018216SPaolo Bonzini } 282453018216SPaolo Bonzini 2825135a129aSAneesh Kumar K.V static int spapr_kvm_type(const char *vm_type) 2826135a129aSAneesh Kumar K.V { 2827135a129aSAneesh Kumar K.V if (!vm_type) { 2828135a129aSAneesh Kumar K.V return 0; 2829135a129aSAneesh Kumar K.V } 2830135a129aSAneesh Kumar K.V 2831135a129aSAneesh Kumar K.V if (!strcmp(vm_type, "HV")) { 2832135a129aSAneesh Kumar K.V return 1; 2833135a129aSAneesh Kumar K.V } 2834135a129aSAneesh Kumar K.V 2835135a129aSAneesh Kumar K.V if (!strcmp(vm_type, "PR")) { 2836135a129aSAneesh Kumar K.V return 2; 2837135a129aSAneesh Kumar K.V } 2838135a129aSAneesh Kumar K.V 2839135a129aSAneesh Kumar K.V error_report("Unknown kvm-type specified '%s'", vm_type); 2840135a129aSAneesh Kumar K.V exit(1); 2841135a129aSAneesh Kumar K.V } 2842135a129aSAneesh Kumar K.V 284371461b0fSAlexey Kardashevskiy /* 2844627b84f4SGonglei * Implementation of an interface to adjust firmware path 284571461b0fSAlexey Kardashevskiy * for the bootindex property handling. 284671461b0fSAlexey Kardashevskiy */ 284771461b0fSAlexey Kardashevskiy static char *spapr_get_fw_dev_path(FWPathProvider *p, BusState *bus, 284871461b0fSAlexey Kardashevskiy DeviceState *dev) 284971461b0fSAlexey Kardashevskiy { 285071461b0fSAlexey Kardashevskiy #define CAST(type, obj, name) \ 285171461b0fSAlexey Kardashevskiy ((type *)object_dynamic_cast(OBJECT(obj), (name))) 285271461b0fSAlexey Kardashevskiy SCSIDevice *d = CAST(SCSIDevice, dev, TYPE_SCSI_DEVICE); 285371461b0fSAlexey Kardashevskiy sPAPRPHBState *phb = CAST(sPAPRPHBState, dev, TYPE_SPAPR_PCI_HOST_BRIDGE); 2854c4e13492SFelipe Franciosi VHostSCSICommon *vsc = CAST(VHostSCSICommon, dev, TYPE_VHOST_SCSI_COMMON); 285571461b0fSAlexey Kardashevskiy 285671461b0fSAlexey Kardashevskiy if (d) { 285771461b0fSAlexey Kardashevskiy void *spapr = CAST(void, bus->parent, "spapr-vscsi"); 285871461b0fSAlexey Kardashevskiy VirtIOSCSI *virtio = CAST(VirtIOSCSI, bus->parent, TYPE_VIRTIO_SCSI); 285971461b0fSAlexey Kardashevskiy USBDevice *usb = CAST(USBDevice, bus->parent, TYPE_USB_DEVICE); 286071461b0fSAlexey Kardashevskiy 286171461b0fSAlexey Kardashevskiy if (spapr) { 286271461b0fSAlexey Kardashevskiy /* 286371461b0fSAlexey Kardashevskiy * Replace "channel@0/disk@0,0" with "disk@8000000000000000": 286471461b0fSAlexey Kardashevskiy * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun 286571461b0fSAlexey Kardashevskiy * in the top 16 bits of the 64-bit LUN 286671461b0fSAlexey Kardashevskiy */ 286771461b0fSAlexey Kardashevskiy unsigned id = 0x8000 | (d->id << 8) | d->lun; 286871461b0fSAlexey Kardashevskiy return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev), 286971461b0fSAlexey Kardashevskiy (uint64_t)id << 48); 287071461b0fSAlexey Kardashevskiy } else if (virtio) { 287171461b0fSAlexey Kardashevskiy /* 287271461b0fSAlexey Kardashevskiy * We use SRP luns of the form 01000000 | (target << 8) | lun 287371461b0fSAlexey Kardashevskiy * in the top 32 bits of the 64-bit LUN 287471461b0fSAlexey Kardashevskiy * Note: the quote above is from SLOF and it is wrong, 287571461b0fSAlexey Kardashevskiy * the actual binding is: 287671461b0fSAlexey Kardashevskiy * swap 0100 or 10 << or 20 << ( target lun-id -- srplun ) 287771461b0fSAlexey Kardashevskiy */ 287871461b0fSAlexey Kardashevskiy unsigned id = 0x1000000 | (d->id << 16) | d->lun; 2879bac658d1SThomas Huth if (d->lun >= 256) { 2880bac658d1SThomas Huth /* Use the LUN "flat space addressing method" */ 2881bac658d1SThomas Huth id |= 0x4000; 2882bac658d1SThomas Huth } 288371461b0fSAlexey Kardashevskiy return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev), 288471461b0fSAlexey Kardashevskiy (uint64_t)id << 32); 288571461b0fSAlexey Kardashevskiy } else if (usb) { 288671461b0fSAlexey Kardashevskiy /* 288771461b0fSAlexey Kardashevskiy * We use SRP luns of the form 01000000 | (usb-port << 16) | lun 288871461b0fSAlexey Kardashevskiy * in the top 32 bits of the 64-bit LUN 288971461b0fSAlexey Kardashevskiy */ 289071461b0fSAlexey Kardashevskiy unsigned usb_port = atoi(usb->port->path); 289171461b0fSAlexey Kardashevskiy unsigned id = 0x1000000 | (usb_port << 16) | d->lun; 289271461b0fSAlexey Kardashevskiy return g_strdup_printf("%s@%"PRIX64, qdev_fw_name(dev), 289371461b0fSAlexey Kardashevskiy (uint64_t)id << 32); 289471461b0fSAlexey Kardashevskiy } 289571461b0fSAlexey Kardashevskiy } 289671461b0fSAlexey Kardashevskiy 2897b99260ebSThomas Huth /* 2898b99260ebSThomas Huth * SLOF probes the USB devices, and if it recognizes that the device is a 2899b99260ebSThomas Huth * storage device, it changes its name to "storage" instead of "usb-host", 2900b99260ebSThomas Huth * and additionally adds a child node for the SCSI LUN, so the correct 2901b99260ebSThomas Huth * boot path in SLOF is something like .../storage@1/disk@xxx" instead. 2902b99260ebSThomas Huth */ 2903b99260ebSThomas Huth if (strcmp("usb-host", qdev_fw_name(dev)) == 0) { 2904b99260ebSThomas Huth USBDevice *usbdev = CAST(USBDevice, dev, TYPE_USB_DEVICE); 2905b99260ebSThomas Huth if (usb_host_dev_is_scsi_storage(usbdev)) { 2906b99260ebSThomas Huth return g_strdup_printf("storage@%s/disk", usbdev->port->path); 2907b99260ebSThomas Huth } 2908b99260ebSThomas Huth } 2909b99260ebSThomas Huth 291071461b0fSAlexey Kardashevskiy if (phb) { 291171461b0fSAlexey Kardashevskiy /* Replace "pci" with "pci@800000020000000" */ 291271461b0fSAlexey Kardashevskiy return g_strdup_printf("pci@%"PRIX64, phb->buid); 291371461b0fSAlexey Kardashevskiy } 291471461b0fSAlexey Kardashevskiy 2915c4e13492SFelipe Franciosi if (vsc) { 2916c4e13492SFelipe Franciosi /* Same logic as virtio above */ 2917c4e13492SFelipe Franciosi unsigned id = 0x1000000 | (vsc->target << 16) | vsc->lun; 2918c4e13492SFelipe Franciosi return g_strdup_printf("disk@%"PRIX64, (uint64_t)id << 32); 2919c4e13492SFelipe Franciosi } 2920c4e13492SFelipe Franciosi 29214871dd4cSThomas Huth if (g_str_equal("pci-bridge", qdev_fw_name(dev))) { 29224871dd4cSThomas Huth /* SLOF uses "pci" instead of "pci-bridge" for PCI bridges */ 29234871dd4cSThomas Huth PCIDevice *pcidev = CAST(PCIDevice, dev, TYPE_PCI_DEVICE); 29244871dd4cSThomas Huth return g_strdup_printf("pci@%x", PCI_SLOT(pcidev->devfn)); 29254871dd4cSThomas Huth } 29264871dd4cSThomas Huth 292771461b0fSAlexey Kardashevskiy return NULL; 292871461b0fSAlexey Kardashevskiy } 292971461b0fSAlexey Kardashevskiy 293023825581SEduardo Habkost static char *spapr_get_kvm_type(Object *obj, Error **errp) 293123825581SEduardo Habkost { 293228e02042SDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(obj); 293323825581SEduardo Habkost 293428e02042SDavid Gibson return g_strdup(spapr->kvm_type); 293523825581SEduardo Habkost } 293623825581SEduardo Habkost 293723825581SEduardo Habkost static void spapr_set_kvm_type(Object *obj, const char *value, Error **errp) 293823825581SEduardo Habkost { 293928e02042SDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(obj); 294023825581SEduardo Habkost 294128e02042SDavid Gibson g_free(spapr->kvm_type); 294228e02042SDavid Gibson spapr->kvm_type = g_strdup(value); 294323825581SEduardo Habkost } 294423825581SEduardo Habkost 2945f6229214SMichael Roth static bool spapr_get_modern_hotplug_events(Object *obj, Error **errp) 2946f6229214SMichael Roth { 2947f6229214SMichael Roth sPAPRMachineState *spapr = SPAPR_MACHINE(obj); 2948f6229214SMichael Roth 2949f6229214SMichael Roth return spapr->use_hotplug_event_source; 2950f6229214SMichael Roth } 2951f6229214SMichael Roth 2952f6229214SMichael Roth static void spapr_set_modern_hotplug_events(Object *obj, bool value, 2953f6229214SMichael Roth Error **errp) 2954f6229214SMichael Roth { 2955f6229214SMichael Roth sPAPRMachineState *spapr = SPAPR_MACHINE(obj); 2956f6229214SMichael Roth 2957f6229214SMichael Roth spapr->use_hotplug_event_source = value; 2958f6229214SMichael Roth } 2959f6229214SMichael Roth 2960fcad0d21SAlexey Kardashevskiy static bool spapr_get_msix_emulation(Object *obj, Error **errp) 2961fcad0d21SAlexey Kardashevskiy { 2962fcad0d21SAlexey Kardashevskiy return true; 2963fcad0d21SAlexey Kardashevskiy } 2964fcad0d21SAlexey Kardashevskiy 296530f4b05bSDavid Gibson static char *spapr_get_resize_hpt(Object *obj, Error **errp) 296630f4b05bSDavid Gibson { 296730f4b05bSDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(obj); 296830f4b05bSDavid Gibson 296930f4b05bSDavid Gibson switch (spapr->resize_hpt) { 297030f4b05bSDavid Gibson case SPAPR_RESIZE_HPT_DEFAULT: 297130f4b05bSDavid Gibson return g_strdup("default"); 297230f4b05bSDavid Gibson case SPAPR_RESIZE_HPT_DISABLED: 297330f4b05bSDavid Gibson return g_strdup("disabled"); 297430f4b05bSDavid Gibson case SPAPR_RESIZE_HPT_ENABLED: 297530f4b05bSDavid Gibson return g_strdup("enabled"); 297630f4b05bSDavid Gibson case SPAPR_RESIZE_HPT_REQUIRED: 297730f4b05bSDavid Gibson return g_strdup("required"); 297830f4b05bSDavid Gibson } 297930f4b05bSDavid Gibson g_assert_not_reached(); 298030f4b05bSDavid Gibson } 298130f4b05bSDavid Gibson 298230f4b05bSDavid Gibson static void spapr_set_resize_hpt(Object *obj, const char *value, Error **errp) 298330f4b05bSDavid Gibson { 298430f4b05bSDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(obj); 298530f4b05bSDavid Gibson 298630f4b05bSDavid Gibson if (strcmp(value, "default") == 0) { 298730f4b05bSDavid Gibson spapr->resize_hpt = SPAPR_RESIZE_HPT_DEFAULT; 298830f4b05bSDavid Gibson } else if (strcmp(value, "disabled") == 0) { 298930f4b05bSDavid Gibson spapr->resize_hpt = SPAPR_RESIZE_HPT_DISABLED; 299030f4b05bSDavid Gibson } else if (strcmp(value, "enabled") == 0) { 299130f4b05bSDavid Gibson spapr->resize_hpt = SPAPR_RESIZE_HPT_ENABLED; 299230f4b05bSDavid Gibson } else if (strcmp(value, "required") == 0) { 299330f4b05bSDavid Gibson spapr->resize_hpt = SPAPR_RESIZE_HPT_REQUIRED; 299430f4b05bSDavid Gibson } else { 299530f4b05bSDavid Gibson error_setg(errp, "Bad value for \"resize-hpt\" property"); 299630f4b05bSDavid Gibson } 299730f4b05bSDavid Gibson } 299830f4b05bSDavid Gibson 2999fa98fbfcSSam Bobroff static void spapr_get_vsmt(Object *obj, Visitor *v, const char *name, 3000fa98fbfcSSam Bobroff void *opaque, Error **errp) 3001fa98fbfcSSam Bobroff { 3002fa98fbfcSSam Bobroff visit_type_uint32(v, name, (uint32_t *)opaque, errp); 3003fa98fbfcSSam Bobroff } 3004fa98fbfcSSam Bobroff 3005fa98fbfcSSam Bobroff static void spapr_set_vsmt(Object *obj, Visitor *v, const char *name, 3006fa98fbfcSSam Bobroff void *opaque, Error **errp) 3007fa98fbfcSSam Bobroff { 3008fa98fbfcSSam Bobroff visit_type_uint32(v, name, (uint32_t *)opaque, errp); 3009fa98fbfcSSam Bobroff } 3010fa98fbfcSSam Bobroff 3011bcb5ce08SDavid Gibson static void spapr_instance_init(Object *obj) 301223825581SEduardo Habkost { 3013715c5407SDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(obj); 3014715c5407SDavid Gibson 3015715c5407SDavid Gibson spapr->htab_fd = -1; 3016f6229214SMichael Roth spapr->use_hotplug_event_source = true; 301723825581SEduardo Habkost object_property_add_str(obj, "kvm-type", 301823825581SEduardo Habkost spapr_get_kvm_type, spapr_set_kvm_type, NULL); 301949d2e648SMarcel Apfelbaum object_property_set_description(obj, "kvm-type", 302049d2e648SMarcel Apfelbaum "Specifies the KVM virtualization mode (HV, PR)", 302149d2e648SMarcel Apfelbaum NULL); 3022f6229214SMichael Roth object_property_add_bool(obj, "modern-hotplug-events", 3023f6229214SMichael Roth spapr_get_modern_hotplug_events, 3024f6229214SMichael Roth spapr_set_modern_hotplug_events, 3025f6229214SMichael Roth NULL); 3026f6229214SMichael Roth object_property_set_description(obj, "modern-hotplug-events", 3027f6229214SMichael Roth "Use dedicated hotplug event mechanism in" 3028f6229214SMichael Roth " place of standard EPOW events when possible" 3029f6229214SMichael Roth " (required for memory hot-unplug support)", 3030f6229214SMichael Roth NULL); 30317843c0d6SDavid Gibson ppc_compat_add_property(obj, "max-cpu-compat", &spapr->max_compat_pvr, 30327843c0d6SDavid Gibson "Maximum permitted CPU compatibility mode", 30337843c0d6SDavid Gibson &error_fatal); 303430f4b05bSDavid Gibson 303530f4b05bSDavid Gibson object_property_add_str(obj, "resize-hpt", 303630f4b05bSDavid Gibson spapr_get_resize_hpt, spapr_set_resize_hpt, NULL); 303730f4b05bSDavid Gibson object_property_set_description(obj, "resize-hpt", 303830f4b05bSDavid Gibson "Resizing of the Hash Page Table (enabled, disabled, required)", 303930f4b05bSDavid Gibson NULL); 3040fa98fbfcSSam Bobroff object_property_add(obj, "vsmt", "uint32", spapr_get_vsmt, 3041fa98fbfcSSam Bobroff spapr_set_vsmt, NULL, &spapr->vsmt, &error_abort); 3042fa98fbfcSSam Bobroff object_property_set_description(obj, "vsmt", 3043fa98fbfcSSam Bobroff "Virtual SMT: KVM behaves as if this were" 3044fa98fbfcSSam Bobroff " the host's SMT mode", &error_abort); 3045fcad0d21SAlexey Kardashevskiy object_property_add_bool(obj, "vfio-no-msix-emulation", 3046fcad0d21SAlexey Kardashevskiy spapr_get_msix_emulation, NULL, NULL); 304723825581SEduardo Habkost } 304823825581SEduardo Habkost 304987bbdd9cSDavid Gibson static void spapr_machine_finalizefn(Object *obj) 305087bbdd9cSDavid Gibson { 305187bbdd9cSDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(obj); 305287bbdd9cSDavid Gibson 305387bbdd9cSDavid Gibson g_free(spapr->kvm_type); 305487bbdd9cSDavid Gibson } 305587bbdd9cSDavid Gibson 30561c7ad77eSNicholas Piggin void spapr_do_system_reset_on_cpu(CPUState *cs, run_on_cpu_data arg) 305734316482SAlexey Kardashevskiy { 305834316482SAlexey Kardashevskiy cpu_synchronize_state(cs); 305934316482SAlexey Kardashevskiy ppc_cpu_do_system_reset(cs); 306034316482SAlexey Kardashevskiy } 306134316482SAlexey Kardashevskiy 306234316482SAlexey Kardashevskiy static void spapr_nmi(NMIState *n, int cpu_index, Error **errp) 306334316482SAlexey Kardashevskiy { 306434316482SAlexey Kardashevskiy CPUState *cs; 306534316482SAlexey Kardashevskiy 306634316482SAlexey Kardashevskiy CPU_FOREACH(cs) { 30671c7ad77eSNicholas Piggin async_run_on_cpu(cs, spapr_do_system_reset_on_cpu, RUN_ON_CPU_NULL); 306834316482SAlexey Kardashevskiy } 306934316482SAlexey Kardashevskiy } 307034316482SAlexey Kardashevskiy 307179b78a6bSMichael Roth static void spapr_add_lmbs(DeviceState *dev, uint64_t addr_start, uint64_t size, 307279b78a6bSMichael Roth uint32_t node, bool dedicated_hp_event_source, 307379b78a6bSMichael Roth Error **errp) 3074c20d332aSBharata B Rao { 3075c20d332aSBharata B Rao sPAPRDRConnector *drc; 3076c20d332aSBharata B Rao uint32_t nr_lmbs = size/SPAPR_MEMORY_BLOCK_SIZE; 3077c20d332aSBharata B Rao int i, fdt_offset, fdt_size; 3078c20d332aSBharata B Rao void *fdt; 307979b78a6bSMichael Roth uint64_t addr = addr_start; 308094fd9cbaSLaurent Vivier bool hotplugged = spapr_drc_hotplugged(dev); 3081160bb678SGreg Kurz Error *local_err = NULL; 3082c20d332aSBharata B Rao 3083c20d332aSBharata B Rao for (i = 0; i < nr_lmbs; i++) { 3084fbf55397SDavid Gibson drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, 3085c20d332aSBharata B Rao addr / SPAPR_MEMORY_BLOCK_SIZE); 3086c20d332aSBharata B Rao g_assert(drc); 3087c20d332aSBharata B Rao 3088c20d332aSBharata B Rao fdt = create_device_tree(&fdt_size); 3089c20d332aSBharata B Rao fdt_offset = spapr_populate_memory_node(fdt, node, addr, 3090c20d332aSBharata B Rao SPAPR_MEMORY_BLOCK_SIZE); 3091c20d332aSBharata B Rao 3092160bb678SGreg Kurz spapr_drc_attach(drc, dev, fdt, fdt_offset, &local_err); 3093160bb678SGreg Kurz if (local_err) { 3094160bb678SGreg Kurz while (addr > addr_start) { 3095160bb678SGreg Kurz addr -= SPAPR_MEMORY_BLOCK_SIZE; 3096160bb678SGreg Kurz drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, 3097160bb678SGreg Kurz addr / SPAPR_MEMORY_BLOCK_SIZE); 3098a8dc47fdSDavid Gibson spapr_drc_detach(drc); 3099160bb678SGreg Kurz } 3100160bb678SGreg Kurz g_free(fdt); 3101160bb678SGreg Kurz error_propagate(errp, local_err); 3102160bb678SGreg Kurz return; 3103160bb678SGreg Kurz } 310494fd9cbaSLaurent Vivier if (!hotplugged) { 310594fd9cbaSLaurent Vivier spapr_drc_reset(drc); 310694fd9cbaSLaurent Vivier } 3107c20d332aSBharata B Rao addr += SPAPR_MEMORY_BLOCK_SIZE; 3108c20d332aSBharata B Rao } 31095dd5238cSJianjun Duan /* send hotplug notification to the 31105dd5238cSJianjun Duan * guest only in case of hotplugged memory 31115dd5238cSJianjun Duan */ 311294fd9cbaSLaurent Vivier if (hotplugged) { 311379b78a6bSMichael Roth if (dedicated_hp_event_source) { 3114fbf55397SDavid Gibson drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, 311579b78a6bSMichael Roth addr_start / SPAPR_MEMORY_BLOCK_SIZE); 311679b78a6bSMichael Roth spapr_hotplug_req_add_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB, 311779b78a6bSMichael Roth nr_lmbs, 31180b55aa91SDavid Gibson spapr_drc_index(drc)); 311979b78a6bSMichael Roth } else { 312079b78a6bSMichael Roth spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB, 312179b78a6bSMichael Roth nr_lmbs); 312279b78a6bSMichael Roth } 3123c20d332aSBharata B Rao } 31245dd5238cSJianjun Duan } 3125c20d332aSBharata B Rao 3126c20d332aSBharata B Rao static void spapr_memory_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 3127c20d332aSBharata B Rao uint32_t node, Error **errp) 3128c20d332aSBharata B Rao { 3129c20d332aSBharata B Rao Error *local_err = NULL; 3130c20d332aSBharata B Rao sPAPRMachineState *ms = SPAPR_MACHINE(hotplug_dev); 3131c20d332aSBharata B Rao PCDIMMDevice *dimm = PC_DIMM(dev); 3132c20d332aSBharata B Rao PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); 313304790978SThomas Huth MemoryRegion *mr; 313404790978SThomas Huth uint64_t align, size, addr; 313504790978SThomas Huth 313604790978SThomas Huth mr = ddc->get_memory_region(dimm, &local_err); 313704790978SThomas Huth if (local_err) { 313804790978SThomas Huth goto out; 313904790978SThomas Huth } 314004790978SThomas Huth align = memory_region_get_alignment(mr); 314104790978SThomas Huth size = memory_region_size(mr); 3142df587133SThomas Huth 3143d6a9b0b8SMichael S. Tsirkin pc_dimm_memory_plug(dev, &ms->hotplug_memory, mr, align, &local_err); 3144c20d332aSBharata B Rao if (local_err) { 3145c20d332aSBharata B Rao goto out; 3146c20d332aSBharata B Rao } 3147c20d332aSBharata B Rao 31489ed442b8SMarc-André Lureau addr = object_property_get_uint(OBJECT(dimm), 31499ed442b8SMarc-André Lureau PC_DIMM_ADDR_PROP, &local_err); 3150c20d332aSBharata B Rao if (local_err) { 3151160bb678SGreg Kurz goto out_unplug; 3152c20d332aSBharata B Rao } 3153c20d332aSBharata B Rao 315479b78a6bSMichael Roth spapr_add_lmbs(dev, addr, size, node, 315579b78a6bSMichael Roth spapr_ovec_test(ms->ov5_cas, OV5_HP_EVT), 3156160bb678SGreg Kurz &local_err); 3157160bb678SGreg Kurz if (local_err) { 3158160bb678SGreg Kurz goto out_unplug; 3159160bb678SGreg Kurz } 3160c20d332aSBharata B Rao 3161160bb678SGreg Kurz return; 3162160bb678SGreg Kurz 3163160bb678SGreg Kurz out_unplug: 3164160bb678SGreg Kurz pc_dimm_memory_unplug(dev, &ms->hotplug_memory, mr); 3165c20d332aSBharata B Rao out: 3166c20d332aSBharata B Rao error_propagate(errp, local_err); 3167c20d332aSBharata B Rao } 3168c20d332aSBharata B Rao 3169c871bc70SLaurent Vivier static void spapr_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 3170c871bc70SLaurent Vivier Error **errp) 3171c871bc70SLaurent Vivier { 3172c871bc70SLaurent Vivier PCDIMMDevice *dimm = PC_DIMM(dev); 3173c871bc70SLaurent Vivier PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); 317404790978SThomas Huth MemoryRegion *mr; 317504790978SThomas Huth uint64_t size; 3176c871bc70SLaurent Vivier char *mem_dev; 3177c871bc70SLaurent Vivier 317804790978SThomas Huth mr = ddc->get_memory_region(dimm, errp); 317904790978SThomas Huth if (!mr) { 318004790978SThomas Huth return; 318104790978SThomas Huth } 318204790978SThomas Huth size = memory_region_size(mr); 318304790978SThomas Huth 3184c871bc70SLaurent Vivier if (size % SPAPR_MEMORY_BLOCK_SIZE) { 3185c871bc70SLaurent Vivier error_setg(errp, "Hotplugged memory size must be a multiple of " 3186c871bc70SLaurent Vivier "%lld MB", SPAPR_MEMORY_BLOCK_SIZE / M_BYTE); 3187c871bc70SLaurent Vivier return; 3188c871bc70SLaurent Vivier } 3189c871bc70SLaurent Vivier 3190c871bc70SLaurent Vivier mem_dev = object_property_get_str(OBJECT(dimm), PC_DIMM_MEMDEV_PROP, NULL); 3191c871bc70SLaurent Vivier if (mem_dev && !kvmppc_is_mem_backend_page_size_ok(mem_dev)) { 3192c871bc70SLaurent Vivier error_setg(errp, "Memory backend has bad page size. " 3193c871bc70SLaurent Vivier "Use 'memory-backend-file' with correct mem-path."); 31948a9e0e7bSGreg Kurz goto out; 3195c871bc70SLaurent Vivier } 31968a9e0e7bSGreg Kurz 31978a9e0e7bSGreg Kurz out: 31988a9e0e7bSGreg Kurz g_free(mem_dev); 3199c871bc70SLaurent Vivier } 3200c871bc70SLaurent Vivier 32010cffce56SDavid Gibson struct sPAPRDIMMState { 32020cffce56SDavid Gibson PCDIMMDevice *dimm; 3203cf632463SBharata B Rao uint32_t nr_lmbs; 32040cffce56SDavid Gibson QTAILQ_ENTRY(sPAPRDIMMState) next; 32050cffce56SDavid Gibson }; 32060cffce56SDavid Gibson 32070cffce56SDavid Gibson static sPAPRDIMMState *spapr_pending_dimm_unplugs_find(sPAPRMachineState *s, 32080cffce56SDavid Gibson PCDIMMDevice *dimm) 32090cffce56SDavid Gibson { 32100cffce56SDavid Gibson sPAPRDIMMState *dimm_state = NULL; 32110cffce56SDavid Gibson 32120cffce56SDavid Gibson QTAILQ_FOREACH(dimm_state, &s->pending_dimm_unplugs, next) { 32130cffce56SDavid Gibson if (dimm_state->dimm == dimm) { 32140cffce56SDavid Gibson break; 32150cffce56SDavid Gibson } 32160cffce56SDavid Gibson } 32170cffce56SDavid Gibson return dimm_state; 32180cffce56SDavid Gibson } 32190cffce56SDavid Gibson 32208d5981c4SBharata B Rao static sPAPRDIMMState *spapr_pending_dimm_unplugs_add(sPAPRMachineState *spapr, 32218d5981c4SBharata B Rao uint32_t nr_lmbs, 32228d5981c4SBharata B Rao PCDIMMDevice *dimm) 32230cffce56SDavid Gibson { 32248d5981c4SBharata B Rao sPAPRDIMMState *ds = NULL; 32258d5981c4SBharata B Rao 32268d5981c4SBharata B Rao /* 32278d5981c4SBharata B Rao * If this request is for a DIMM whose removal had failed earlier 32288d5981c4SBharata B Rao * (due to guest's refusal to remove the LMBs), we would have this 32298d5981c4SBharata B Rao * dimm already in the pending_dimm_unplugs list. In that 32308d5981c4SBharata B Rao * case don't add again. 32318d5981c4SBharata B Rao */ 32328d5981c4SBharata B Rao ds = spapr_pending_dimm_unplugs_find(spapr, dimm); 32338d5981c4SBharata B Rao if (!ds) { 32348d5981c4SBharata B Rao ds = g_malloc0(sizeof(sPAPRDIMMState)); 32358d5981c4SBharata B Rao ds->nr_lmbs = nr_lmbs; 32368d5981c4SBharata B Rao ds->dimm = dimm; 32378d5981c4SBharata B Rao QTAILQ_INSERT_HEAD(&spapr->pending_dimm_unplugs, ds, next); 32388d5981c4SBharata B Rao } 32398d5981c4SBharata B Rao return ds; 32400cffce56SDavid Gibson } 32410cffce56SDavid Gibson 32420cffce56SDavid Gibson static void spapr_pending_dimm_unplugs_remove(sPAPRMachineState *spapr, 32430cffce56SDavid Gibson sPAPRDIMMState *dimm_state) 32440cffce56SDavid Gibson { 32450cffce56SDavid Gibson QTAILQ_REMOVE(&spapr->pending_dimm_unplugs, dimm_state, next); 32460cffce56SDavid Gibson g_free(dimm_state); 32470cffce56SDavid Gibson } 3248cf632463SBharata B Rao 324916ee9980SDaniel Henrique Barboza static sPAPRDIMMState *spapr_recover_pending_dimm_state(sPAPRMachineState *ms, 325016ee9980SDaniel Henrique Barboza PCDIMMDevice *dimm) 325116ee9980SDaniel Henrique Barboza { 325216ee9980SDaniel Henrique Barboza sPAPRDRConnector *drc; 325316ee9980SDaniel Henrique Barboza PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); 325404790978SThomas Huth MemoryRegion *mr = ddc->get_memory_region(dimm, &error_abort); 325516ee9980SDaniel Henrique Barboza uint64_t size = memory_region_size(mr); 325616ee9980SDaniel Henrique Barboza uint32_t nr_lmbs = size / SPAPR_MEMORY_BLOCK_SIZE; 325716ee9980SDaniel Henrique Barboza uint32_t avail_lmbs = 0; 325816ee9980SDaniel Henrique Barboza uint64_t addr_start, addr; 325916ee9980SDaniel Henrique Barboza int i; 326016ee9980SDaniel Henrique Barboza 326116ee9980SDaniel Henrique Barboza addr_start = object_property_get_int(OBJECT(dimm), PC_DIMM_ADDR_PROP, 326216ee9980SDaniel Henrique Barboza &error_abort); 326316ee9980SDaniel Henrique Barboza 326416ee9980SDaniel Henrique Barboza addr = addr_start; 326516ee9980SDaniel Henrique Barboza for (i = 0; i < nr_lmbs; i++) { 3266fbf55397SDavid Gibson drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, 326716ee9980SDaniel Henrique Barboza addr / SPAPR_MEMORY_BLOCK_SIZE); 326816ee9980SDaniel Henrique Barboza g_assert(drc); 3269454b580aSDavid Gibson if (drc->dev) { 327016ee9980SDaniel Henrique Barboza avail_lmbs++; 327116ee9980SDaniel Henrique Barboza } 327216ee9980SDaniel Henrique Barboza addr += SPAPR_MEMORY_BLOCK_SIZE; 327316ee9980SDaniel Henrique Barboza } 327416ee9980SDaniel Henrique Barboza 32758d5981c4SBharata B Rao return spapr_pending_dimm_unplugs_add(ms, avail_lmbs, dimm); 327616ee9980SDaniel Henrique Barboza } 327716ee9980SDaniel Henrique Barboza 327831834723SDaniel Henrique Barboza /* Callback to be called during DRC release. */ 327931834723SDaniel Henrique Barboza void spapr_lmb_release(DeviceState *dev) 3280cf632463SBharata B Rao { 3281765d1bddSDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_hotplug_handler(dev)); 3282765d1bddSDavid Gibson PCDIMMDevice *dimm = PC_DIMM(dev); 3283765d1bddSDavid Gibson PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); 328404790978SThomas Huth MemoryRegion *mr = ddc->get_memory_region(dimm, &error_abort); 32850cffce56SDavid Gibson sPAPRDIMMState *ds = spapr_pending_dimm_unplugs_find(spapr, PC_DIMM(dev)); 3286cf632463SBharata B Rao 328716ee9980SDaniel Henrique Barboza /* This information will get lost if a migration occurs 328816ee9980SDaniel Henrique Barboza * during the unplug process. In this case recover it. */ 328916ee9980SDaniel Henrique Barboza if (ds == NULL) { 329016ee9980SDaniel Henrique Barboza ds = spapr_recover_pending_dimm_state(spapr, PC_DIMM(dev)); 32918d5981c4SBharata B Rao g_assert(ds); 3292454b580aSDavid Gibson /* The DRC being examined by the caller at least must be counted */ 3293454b580aSDavid Gibson g_assert(ds->nr_lmbs); 329416ee9980SDaniel Henrique Barboza } 3295454b580aSDavid Gibson 3296454b580aSDavid Gibson if (--ds->nr_lmbs) { 3297cf632463SBharata B Rao return; 3298cf632463SBharata B Rao } 3299cf632463SBharata B Rao 3300cf632463SBharata B Rao /* 3301cf632463SBharata B Rao * Now that all the LMBs have been removed by the guest, call the 3302cf632463SBharata B Rao * pc-dimm unplug handler to cleanup up the pc-dimm device. 3303cf632463SBharata B Rao */ 3304765d1bddSDavid Gibson pc_dimm_memory_unplug(dev, &spapr->hotplug_memory, mr); 3305cf632463SBharata B Rao object_unparent(OBJECT(dev)); 33062a129767SDaniel Henrique Barboza spapr_pending_dimm_unplugs_remove(spapr, ds); 3307cf632463SBharata B Rao } 3308cf632463SBharata B Rao 3309cf632463SBharata B Rao static void spapr_memory_unplug_request(HotplugHandler *hotplug_dev, 3310cf632463SBharata B Rao DeviceState *dev, Error **errp) 3311cf632463SBharata B Rao { 33120cffce56SDavid Gibson sPAPRMachineState *spapr = SPAPR_MACHINE(hotplug_dev); 3313cf632463SBharata B Rao Error *local_err = NULL; 3314cf632463SBharata B Rao PCDIMMDevice *dimm = PC_DIMM(dev); 3315cf632463SBharata B Rao PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); 331604790978SThomas Huth MemoryRegion *mr; 331704790978SThomas Huth uint32_t nr_lmbs; 331804790978SThomas Huth uint64_t size, addr_start, addr; 33190cffce56SDavid Gibson int i; 33200cffce56SDavid Gibson sPAPRDRConnector *drc; 332104790978SThomas Huth 332204790978SThomas Huth mr = ddc->get_memory_region(dimm, &local_err); 332304790978SThomas Huth if (local_err) { 332404790978SThomas Huth goto out; 332504790978SThomas Huth } 332604790978SThomas Huth size = memory_region_size(mr); 332704790978SThomas Huth nr_lmbs = size / SPAPR_MEMORY_BLOCK_SIZE; 332804790978SThomas Huth 33299ed442b8SMarc-André Lureau addr_start = object_property_get_uint(OBJECT(dimm), PC_DIMM_ADDR_PROP, 33300cffce56SDavid Gibson &local_err); 3331cf632463SBharata B Rao if (local_err) { 3332cf632463SBharata B Rao goto out; 3333cf632463SBharata B Rao } 3334cf632463SBharata B Rao 33352a129767SDaniel Henrique Barboza /* 33362a129767SDaniel Henrique Barboza * An existing pending dimm state for this DIMM means that there is an 33372a129767SDaniel Henrique Barboza * unplug operation in progress, waiting for the spapr_lmb_release 33382a129767SDaniel Henrique Barboza * callback to complete the job (BQL can't cover that far). In this case, 33392a129767SDaniel Henrique Barboza * bail out to avoid detaching DRCs that were already released. 33402a129767SDaniel Henrique Barboza */ 33412a129767SDaniel Henrique Barboza if (spapr_pending_dimm_unplugs_find(spapr, dimm)) { 33422a129767SDaniel Henrique Barboza error_setg(&local_err, 33432a129767SDaniel Henrique Barboza "Memory unplug already in progress for device %s", 33442a129767SDaniel Henrique Barboza dev->id); 33452a129767SDaniel Henrique Barboza goto out; 33462a129767SDaniel Henrique Barboza } 33472a129767SDaniel Henrique Barboza 33488d5981c4SBharata B Rao spapr_pending_dimm_unplugs_add(spapr, nr_lmbs, dimm); 33490cffce56SDavid Gibson 33500cffce56SDavid Gibson addr = addr_start; 33510cffce56SDavid Gibson for (i = 0; i < nr_lmbs; i++) { 3352fbf55397SDavid Gibson drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, 33530cffce56SDavid Gibson addr / SPAPR_MEMORY_BLOCK_SIZE); 33540cffce56SDavid Gibson g_assert(drc); 33550cffce56SDavid Gibson 3356a8dc47fdSDavid Gibson spapr_drc_detach(drc); 33570cffce56SDavid Gibson addr += SPAPR_MEMORY_BLOCK_SIZE; 33580cffce56SDavid Gibson } 33590cffce56SDavid Gibson 3360fbf55397SDavid Gibson drc = spapr_drc_by_id(TYPE_SPAPR_DRC_LMB, 33610cffce56SDavid Gibson addr_start / SPAPR_MEMORY_BLOCK_SIZE); 33620cffce56SDavid Gibson spapr_hotplug_req_remove_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB, 33630b55aa91SDavid Gibson nr_lmbs, spapr_drc_index(drc)); 3364cf632463SBharata B Rao out: 3365cf632463SBharata B Rao error_propagate(errp, local_err); 3366cf632463SBharata B Rao } 3367cf632463SBharata B Rao 336804d0ffbdSGreg Kurz static void *spapr_populate_hotplug_cpu_dt(CPUState *cs, int *fdt_offset, 3369af81cf32SBharata B Rao sPAPRMachineState *spapr) 3370af81cf32SBharata B Rao { 3371af81cf32SBharata B Rao PowerPCCPU *cpu = POWERPC_CPU(cs); 3372af81cf32SBharata B Rao DeviceClass *dc = DEVICE_GET_CLASS(cs); 337314bb4486SGreg Kurz int id = spapr_get_vcpu_id(cpu); 3374af81cf32SBharata B Rao void *fdt; 3375af81cf32SBharata B Rao int offset, fdt_size; 3376af81cf32SBharata B Rao char *nodename; 3377af81cf32SBharata B Rao 3378af81cf32SBharata B Rao fdt = create_device_tree(&fdt_size); 3379af81cf32SBharata B Rao nodename = g_strdup_printf("%s@%x", dc->fw_name, id); 3380af81cf32SBharata B Rao offset = fdt_add_subnode(fdt, 0, nodename); 3381af81cf32SBharata B Rao 3382af81cf32SBharata B Rao spapr_populate_cpu_dt(cs, fdt, offset, spapr); 3383af81cf32SBharata B Rao g_free(nodename); 3384af81cf32SBharata B Rao 3385af81cf32SBharata B Rao *fdt_offset = offset; 3386af81cf32SBharata B Rao return fdt; 3387af81cf32SBharata B Rao } 3388af81cf32SBharata B Rao 3389765d1bddSDavid Gibson /* Callback to be called during DRC release. */ 3390765d1bddSDavid Gibson void spapr_core_release(DeviceState *dev) 3391ff9006ddSIgor Mammedov { 3392765d1bddSDavid Gibson MachineState *ms = MACHINE(qdev_get_hotplug_handler(dev)); 339346f7afa3SGreg Kurz sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(ms); 3394ff9006ddSIgor Mammedov CPUCore *cc = CPU_CORE(dev); 3395535455fdSIgor Mammedov CPUArchId *core_slot = spapr_find_cpu_slot(ms, cc->core_id, NULL); 3396ff9006ddSIgor Mammedov 339746f7afa3SGreg Kurz if (smc->pre_2_10_has_unused_icps) { 339846f7afa3SGreg Kurz sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); 339946f7afa3SGreg Kurz int i; 340046f7afa3SGreg Kurz 340146f7afa3SGreg Kurz for (i = 0; i < cc->nr_threads; i++) { 340294ad93bdSGreg Kurz CPUState *cs = CPU(sc->threads[i]); 340346f7afa3SGreg Kurz 340446f7afa3SGreg Kurz pre_2_10_vmstate_register_dummy_icp(cs->cpu_index); 340546f7afa3SGreg Kurz } 340646f7afa3SGreg Kurz } 340746f7afa3SGreg Kurz 340807572c06SGreg Kurz assert(core_slot); 3409535455fdSIgor Mammedov core_slot->cpu = NULL; 3410ff9006ddSIgor Mammedov object_unparent(OBJECT(dev)); 3411ff9006ddSIgor Mammedov } 3412ff9006ddSIgor Mammedov 3413115debf2SIgor Mammedov static 3414115debf2SIgor Mammedov void spapr_core_unplug_request(HotplugHandler *hotplug_dev, DeviceState *dev, 3415ff9006ddSIgor Mammedov Error **errp) 3416ff9006ddSIgor Mammedov { 341772194664SGreg Kurz sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev)); 3418535455fdSIgor Mammedov int index; 3419535455fdSIgor Mammedov sPAPRDRConnector *drc; 3420535455fdSIgor Mammedov CPUCore *cc = CPU_CORE(dev); 3421ff9006ddSIgor Mammedov 3422535455fdSIgor Mammedov if (!spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index)) { 3423535455fdSIgor Mammedov error_setg(errp, "Unable to find CPU core with core-id: %d", 3424535455fdSIgor Mammedov cc->core_id); 3425535455fdSIgor Mammedov return; 3426535455fdSIgor Mammedov } 3427ff9006ddSIgor Mammedov if (index == 0) { 3428ff9006ddSIgor Mammedov error_setg(errp, "Boot CPU core may not be unplugged"); 3429ff9006ddSIgor Mammedov return; 3430ff9006ddSIgor Mammedov } 3431ff9006ddSIgor Mammedov 34325d0fb150SGreg Kurz drc = spapr_drc_by_id(TYPE_SPAPR_DRC_CPU, 34335d0fb150SGreg Kurz spapr_vcpu_id(spapr, cc->core_id)); 3434ff9006ddSIgor Mammedov g_assert(drc); 3435ff9006ddSIgor Mammedov 3436a8dc47fdSDavid Gibson spapr_drc_detach(drc); 3437ff9006ddSIgor Mammedov 3438ff9006ddSIgor Mammedov spapr_hotplug_req_remove_by_index(drc); 3439ff9006ddSIgor Mammedov } 3440ff9006ddSIgor Mammedov 3441ff9006ddSIgor Mammedov static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 3442ff9006ddSIgor Mammedov Error **errp) 3443ff9006ddSIgor Mammedov { 3444ff9006ddSIgor Mammedov sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev)); 3445ff9006ddSIgor Mammedov MachineClass *mc = MACHINE_GET_CLASS(spapr); 344646f7afa3SGreg Kurz sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); 3447ff9006ddSIgor Mammedov sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev)); 3448ff9006ddSIgor Mammedov CPUCore *cc = CPU_CORE(dev); 344994ad93bdSGreg Kurz CPUState *cs = CPU(core->threads[0]); 3450ff9006ddSIgor Mammedov sPAPRDRConnector *drc; 3451ff9006ddSIgor Mammedov Error *local_err = NULL; 3452535455fdSIgor Mammedov CPUArchId *core_slot; 3453535455fdSIgor Mammedov int index; 345494fd9cbaSLaurent Vivier bool hotplugged = spapr_drc_hotplugged(dev); 3455ff9006ddSIgor Mammedov 3456535455fdSIgor Mammedov core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index); 3457535455fdSIgor Mammedov if (!core_slot) { 3458535455fdSIgor Mammedov error_setg(errp, "Unable to find CPU core with core-id: %d", 3459535455fdSIgor Mammedov cc->core_id); 3460535455fdSIgor Mammedov return; 3461535455fdSIgor Mammedov } 34625d0fb150SGreg Kurz drc = spapr_drc_by_id(TYPE_SPAPR_DRC_CPU, 34635d0fb150SGreg Kurz spapr_vcpu_id(spapr, cc->core_id)); 3464ff9006ddSIgor Mammedov 3465c5514d0eSIgor Mammedov g_assert(drc || !mc->has_hotpluggable_cpus); 3466ff9006ddSIgor Mammedov 3467e49c63d5SGreg Kurz if (drc) { 3468e49c63d5SGreg Kurz void *fdt; 3469e49c63d5SGreg Kurz int fdt_offset; 3470e49c63d5SGreg Kurz 3471ff9006ddSIgor Mammedov fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr); 3472ff9006ddSIgor Mammedov 34735c1da812SDavid Gibson spapr_drc_attach(drc, dev, fdt, fdt_offset, &local_err); 3474ff9006ddSIgor Mammedov if (local_err) { 3475ff9006ddSIgor Mammedov g_free(fdt); 3476ff9006ddSIgor Mammedov error_propagate(errp, local_err); 3477ff9006ddSIgor Mammedov return; 3478ff9006ddSIgor Mammedov } 3479ff9006ddSIgor Mammedov 348094fd9cbaSLaurent Vivier if (hotplugged) { 3481ff9006ddSIgor Mammedov /* 348294fd9cbaSLaurent Vivier * Send hotplug notification interrupt to the guest only 348394fd9cbaSLaurent Vivier * in case of hotplugged CPUs. 3484ff9006ddSIgor Mammedov */ 3485ff9006ddSIgor Mammedov spapr_hotplug_req_add_by_index(drc); 348694fd9cbaSLaurent Vivier } else { 348794fd9cbaSLaurent Vivier spapr_drc_reset(drc); 3488ff9006ddSIgor Mammedov } 348994fd9cbaSLaurent Vivier } 349094fd9cbaSLaurent Vivier 3491535455fdSIgor Mammedov core_slot->cpu = OBJECT(dev); 349246f7afa3SGreg Kurz 349346f7afa3SGreg Kurz if (smc->pre_2_10_has_unused_icps) { 349446f7afa3SGreg Kurz int i; 349546f7afa3SGreg Kurz 349646f7afa3SGreg Kurz for (i = 0; i < cc->nr_threads; i++) { 3497bc877283SGreg Kurz cs = CPU(core->threads[i]); 349846f7afa3SGreg Kurz pre_2_10_vmstate_unregister_dummy_icp(cs->cpu_index); 349946f7afa3SGreg Kurz } 350046f7afa3SGreg Kurz } 3501ff9006ddSIgor Mammedov } 3502ff9006ddSIgor Mammedov 3503ff9006ddSIgor Mammedov static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, 3504ff9006ddSIgor Mammedov Error **errp) 3505ff9006ddSIgor Mammedov { 3506ff9006ddSIgor Mammedov MachineState *machine = MACHINE(OBJECT(hotplug_dev)); 3507ff9006ddSIgor Mammedov MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev); 3508ff9006ddSIgor Mammedov Error *local_err = NULL; 3509ff9006ddSIgor Mammedov CPUCore *cc = CPU_CORE(dev); 35102e9c10ebSIgor Mammedov const char *base_core_type = spapr_get_cpu_core_type(machine->cpu_type); 3511ff9006ddSIgor Mammedov const char *type = object_get_typename(OBJECT(dev)); 3512535455fdSIgor Mammedov CPUArchId *core_slot; 3513535455fdSIgor Mammedov int index; 3514ff9006ddSIgor Mammedov 3515c5514d0eSIgor Mammedov if (dev->hotplugged && !mc->has_hotpluggable_cpus) { 3516ff9006ddSIgor Mammedov error_setg(&local_err, "CPU hotplug not supported for this machine"); 3517ff9006ddSIgor Mammedov goto out; 3518ff9006ddSIgor Mammedov } 3519ff9006ddSIgor Mammedov 3520ff9006ddSIgor Mammedov if (strcmp(base_core_type, type)) { 3521ff9006ddSIgor Mammedov error_setg(&local_err, "CPU core type should be %s", base_core_type); 3522ff9006ddSIgor Mammedov goto out; 3523ff9006ddSIgor Mammedov } 3524ff9006ddSIgor Mammedov 3525ff9006ddSIgor Mammedov if (cc->core_id % smp_threads) { 3526ff9006ddSIgor Mammedov error_setg(&local_err, "invalid core id %d", cc->core_id); 3527ff9006ddSIgor Mammedov goto out; 3528ff9006ddSIgor Mammedov } 3529ff9006ddSIgor Mammedov 3530459264efSDavid Gibson /* 3531459264efSDavid Gibson * In general we should have homogeneous threads-per-core, but old 3532459264efSDavid Gibson * (pre hotplug support) machine types allow the last core to have 3533459264efSDavid Gibson * reduced threads as a compatibility hack for when we allowed 3534459264efSDavid Gibson * total vcpus not a multiple of threads-per-core. 3535459264efSDavid Gibson */ 3536459264efSDavid Gibson if (mc->has_hotpluggable_cpus && (cc->nr_threads != smp_threads)) { 3537df8658deSGreg Kurz error_setg(&local_err, "invalid nr-threads %d, must be %d", 35388149e299SDavid Gibson cc->nr_threads, smp_threads); 3539df8658deSGreg Kurz goto out; 35408149e299SDavid Gibson } 35418149e299SDavid Gibson 3542535455fdSIgor Mammedov core_slot = spapr_find_cpu_slot(MACHINE(hotplug_dev), cc->core_id, &index); 3543535455fdSIgor Mammedov if (!core_slot) { 3544ff9006ddSIgor Mammedov error_setg(&local_err, "core id %d out of range", cc->core_id); 3545ff9006ddSIgor Mammedov goto out; 3546ff9006ddSIgor Mammedov } 3547ff9006ddSIgor Mammedov 3548535455fdSIgor Mammedov if (core_slot->cpu) { 3549ff9006ddSIgor Mammedov error_setg(&local_err, "core %d already populated", cc->core_id); 3550ff9006ddSIgor Mammedov goto out; 3551ff9006ddSIgor Mammedov } 3552ff9006ddSIgor Mammedov 3553a0ceb640SIgor Mammedov numa_cpu_pre_plug(core_slot, dev, &local_err); 35540b8497f0SIgor Mammedov 3555ff9006ddSIgor Mammedov out: 3556ff9006ddSIgor Mammedov error_propagate(errp, local_err); 3557ff9006ddSIgor Mammedov } 3558ff9006ddSIgor Mammedov 3559c20d332aSBharata B Rao static void spapr_machine_device_plug(HotplugHandler *hotplug_dev, 3560c20d332aSBharata B Rao DeviceState *dev, Error **errp) 3561c20d332aSBharata B Rao { 3562c86c1affSDaniel Henrique Barboza MachineState *ms = MACHINE(hotplug_dev); 3563c86c1affSDaniel Henrique Barboza sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(ms); 3564c20d332aSBharata B Rao 3565c20d332aSBharata B Rao if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 3566b556854bSBharata B Rao int node; 3567c20d332aSBharata B Rao 3568c20d332aSBharata B Rao if (!smc->dr_lmb_enabled) { 3569c20d332aSBharata B Rao error_setg(errp, "Memory hotplug not supported for this machine"); 3570c20d332aSBharata B Rao return; 3571c20d332aSBharata B Rao } 35729ed442b8SMarc-André Lureau node = object_property_get_uint(OBJECT(dev), PC_DIMM_NODE_PROP, errp); 3573c20d332aSBharata B Rao if (*errp) { 3574c20d332aSBharata B Rao return; 3575c20d332aSBharata B Rao } 35761a5512bbSGonglei if (node < 0 || node >= MAX_NODES) { 35771a5512bbSGonglei error_setg(errp, "Invaild node %d", node); 35781a5512bbSGonglei return; 35791a5512bbSGonglei } 3580c20d332aSBharata B Rao 3581c20d332aSBharata B Rao spapr_memory_plug(hotplug_dev, dev, node, errp); 3582af81cf32SBharata B Rao } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) { 3583af81cf32SBharata B Rao spapr_core_plug(hotplug_dev, dev, errp); 3584c20d332aSBharata B Rao } 3585c20d332aSBharata B Rao } 3586c20d332aSBharata B Rao 3587cf632463SBharata B Rao static void spapr_machine_device_unplug_request(HotplugHandler *hotplug_dev, 3588cf632463SBharata B Rao DeviceState *dev, Error **errp) 3589cf632463SBharata B Rao { 3590c86c1affSDaniel Henrique Barboza sPAPRMachineState *sms = SPAPR_MACHINE(OBJECT(hotplug_dev)); 3591c86c1affSDaniel Henrique Barboza MachineClass *mc = MACHINE_GET_CLASS(sms); 3592cf632463SBharata B Rao 3593cf632463SBharata B Rao if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 3594cf632463SBharata B Rao if (spapr_ovec_test(sms->ov5_cas, OV5_HP_EVT)) { 3595cf632463SBharata B Rao spapr_memory_unplug_request(hotplug_dev, dev, errp); 3596cf632463SBharata B Rao } else { 3597cf632463SBharata B Rao /* NOTE: this means there is a window after guest reset, prior to 3598cf632463SBharata B Rao * CAS negotiation, where unplug requests will fail due to the 3599cf632463SBharata B Rao * capability not being detected yet. This is a bit different than 3600cf632463SBharata B Rao * the case with PCI unplug, where the events will be queued and 3601cf632463SBharata B Rao * eventually handled by the guest after boot 3602cf632463SBharata B Rao */ 3603cf632463SBharata B Rao error_setg(errp, "Memory hot unplug not supported for this guest"); 3604cf632463SBharata B Rao } 36056f4b5c3eSBharata B Rao } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) { 3606c5514d0eSIgor Mammedov if (!mc->has_hotpluggable_cpus) { 36076f4b5c3eSBharata B Rao error_setg(errp, "CPU hot unplug not supported on this machine"); 36086f4b5c3eSBharata B Rao return; 36096f4b5c3eSBharata B Rao } 3610115debf2SIgor Mammedov spapr_core_unplug_request(hotplug_dev, dev, errp); 3611c20d332aSBharata B Rao } 3612c20d332aSBharata B Rao } 3613c20d332aSBharata B Rao 361494a94e4cSBharata B Rao static void spapr_machine_device_pre_plug(HotplugHandler *hotplug_dev, 361594a94e4cSBharata B Rao DeviceState *dev, Error **errp) 361694a94e4cSBharata B Rao { 3617c871bc70SLaurent Vivier if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { 3618c871bc70SLaurent Vivier spapr_memory_pre_plug(hotplug_dev, dev, errp); 3619c871bc70SLaurent Vivier } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) { 362094a94e4cSBharata B Rao spapr_core_pre_plug(hotplug_dev, dev, errp); 362194a94e4cSBharata B Rao } 362294a94e4cSBharata B Rao } 362394a94e4cSBharata B Rao 36247ebaf795SBharata B Rao static HotplugHandler *spapr_get_hotplug_handler(MachineState *machine, 3625c20d332aSBharata B Rao DeviceState *dev) 3626c20d332aSBharata B Rao { 362794a94e4cSBharata B Rao if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || 362894a94e4cSBharata B Rao object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) { 3629c20d332aSBharata B Rao return HOTPLUG_HANDLER(machine); 3630c20d332aSBharata B Rao } 3631c20d332aSBharata B Rao return NULL; 3632c20d332aSBharata B Rao } 3633c20d332aSBharata B Rao 3634ea089eebSIgor Mammedov static CpuInstanceProperties 3635ea089eebSIgor Mammedov spapr_cpu_index_to_props(MachineState *machine, unsigned cpu_index) 363620bb648dSDavid Gibson { 3637ea089eebSIgor Mammedov CPUArchId *core_slot; 3638ea089eebSIgor Mammedov MachineClass *mc = MACHINE_GET_CLASS(machine); 3639ea089eebSIgor Mammedov 3640ea089eebSIgor Mammedov /* make sure possible_cpu are intialized */ 3641ea089eebSIgor Mammedov mc->possible_cpu_arch_ids(machine); 3642ea089eebSIgor Mammedov /* get CPU core slot containing thread that matches cpu_index */ 3643ea089eebSIgor Mammedov core_slot = spapr_find_cpu_slot(machine, cpu_index, NULL); 3644ea089eebSIgor Mammedov assert(core_slot); 3645ea089eebSIgor Mammedov return core_slot->props; 364620bb648dSDavid Gibson } 364720bb648dSDavid Gibson 364879e07936SIgor Mammedov static int64_t spapr_get_default_cpu_node_id(const MachineState *ms, int idx) 364979e07936SIgor Mammedov { 365079e07936SIgor Mammedov return idx / smp_cores % nb_numa_nodes; 365179e07936SIgor Mammedov } 365279e07936SIgor Mammedov 3653535455fdSIgor Mammedov static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine) 3654535455fdSIgor Mammedov { 3655535455fdSIgor Mammedov int i; 3656d342eb76SIgor Mammedov const char *core_type; 3657535455fdSIgor Mammedov int spapr_max_cores = max_cpus / smp_threads; 3658535455fdSIgor Mammedov MachineClass *mc = MACHINE_GET_CLASS(machine); 3659535455fdSIgor Mammedov 3660c5514d0eSIgor Mammedov if (!mc->has_hotpluggable_cpus) { 3661535455fdSIgor Mammedov spapr_max_cores = QEMU_ALIGN_UP(smp_cpus, smp_threads) / smp_threads; 3662535455fdSIgor Mammedov } 3663535455fdSIgor Mammedov if (machine->possible_cpus) { 3664535455fdSIgor Mammedov assert(machine->possible_cpus->len == spapr_max_cores); 3665535455fdSIgor Mammedov return machine->possible_cpus; 3666535455fdSIgor Mammedov } 3667535455fdSIgor Mammedov 3668d342eb76SIgor Mammedov core_type = spapr_get_cpu_core_type(machine->cpu_type); 3669d342eb76SIgor Mammedov if (!core_type) { 3670d342eb76SIgor Mammedov error_report("Unable to find sPAPR CPU Core definition"); 3671d342eb76SIgor Mammedov exit(1); 3672d342eb76SIgor Mammedov } 3673d342eb76SIgor Mammedov 3674535455fdSIgor Mammedov machine->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + 3675535455fdSIgor Mammedov sizeof(CPUArchId) * spapr_max_cores); 3676535455fdSIgor Mammedov machine->possible_cpus->len = spapr_max_cores; 3677535455fdSIgor Mammedov for (i = 0; i < machine->possible_cpus->len; i++) { 3678535455fdSIgor Mammedov int core_id = i * smp_threads; 3679535455fdSIgor Mammedov 3680d342eb76SIgor Mammedov machine->possible_cpus->cpus[i].type = core_type; 3681f2d672c2SIgor Mammedov machine->possible_cpus->cpus[i].vcpus_count = smp_threads; 3682535455fdSIgor Mammedov machine->possible_cpus->cpus[i].arch_id = core_id; 3683535455fdSIgor Mammedov machine->possible_cpus->cpus[i].props.has_core_id = true; 3684535455fdSIgor Mammedov machine->possible_cpus->cpus[i].props.core_id = core_id; 3685535455fdSIgor Mammedov } 3686535455fdSIgor Mammedov return machine->possible_cpus; 3687535455fdSIgor Mammedov } 3688535455fdSIgor Mammedov 36896737d9adSDavid Gibson static void spapr_phb_placement(sPAPRMachineState *spapr, uint32_t index, 3690daa23699SDavid Gibson uint64_t *buid, hwaddr *pio, 3691daa23699SDavid Gibson hwaddr *mmio32, hwaddr *mmio64, 36926737d9adSDavid Gibson unsigned n_dma, uint32_t *liobns, Error **errp) 36936737d9adSDavid Gibson { 3694357d1e3bSDavid Gibson /* 3695357d1e3bSDavid Gibson * New-style PHB window placement. 3696357d1e3bSDavid Gibson * 3697357d1e3bSDavid Gibson * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window 3698357d1e3bSDavid Gibson * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO 3699357d1e3bSDavid Gibson * windows. 3700357d1e3bSDavid Gibson * 3701357d1e3bSDavid Gibson * Some guest kernels can't work with MMIO windows above 1<<46 3702357d1e3bSDavid Gibson * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB 3703357d1e3bSDavid Gibson * 3704357d1e3bSDavid Gibson * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each 3705357d1e3bSDavid Gibson * PHB stacked together. (32TiB+2GiB)..(32TiB+64GiB) contains the 3706357d1e3bSDavid Gibson * 2GiB 32-bit MMIO windows for each PHB. Then 33..64TiB has the 3707357d1e3bSDavid Gibson * 1TiB 64-bit MMIO windows for each PHB. 3708357d1e3bSDavid Gibson */ 37096737d9adSDavid Gibson const uint64_t base_buid = 0x800000020000000ULL; 371025e6a118SMichael S. Tsirkin #define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \ 371125e6a118SMichael S. Tsirkin SPAPR_PCI_MEM64_WIN_SIZE - 1) 37126737d9adSDavid Gibson int i; 37136737d9adSDavid Gibson 3714357d1e3bSDavid Gibson /* Sanity check natural alignments */ 3715357d1e3bSDavid Gibson QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE % SPAPR_PCI_MEM64_WIN_SIZE) != 0); 3716357d1e3bSDavid Gibson QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT % SPAPR_PCI_MEM64_WIN_SIZE) != 0); 3717357d1e3bSDavid Gibson QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE % SPAPR_PCI_MEM32_WIN_SIZE) != 0); 3718357d1e3bSDavid Gibson QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE % SPAPR_PCI_IO_WIN_SIZE) != 0); 3719357d1e3bSDavid Gibson /* Sanity check bounds */ 372025e6a118SMichael S. Tsirkin QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_IO_WIN_SIZE) > 372125e6a118SMichael S. Tsirkin SPAPR_PCI_MEM32_WIN_SIZE); 372225e6a118SMichael S. Tsirkin QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS * SPAPR_PCI_MEM32_WIN_SIZE) > 372325e6a118SMichael S. Tsirkin SPAPR_PCI_MEM64_WIN_SIZE); 37242efff1c0SDavid Gibson 372525e6a118SMichael S. Tsirkin if (index >= SPAPR_MAX_PHBS) { 372625e6a118SMichael S. Tsirkin error_setg(errp, "\"index\" for PAPR PHB is too large (max %llu)", 372725e6a118SMichael S. Tsirkin SPAPR_MAX_PHBS - 1); 37286737d9adSDavid Gibson return; 37296737d9adSDavid Gibson } 37306737d9adSDavid Gibson 37316737d9adSDavid Gibson *buid = base_buid + index; 37326737d9adSDavid Gibson for (i = 0; i < n_dma; ++i) { 37336737d9adSDavid Gibson liobns[i] = SPAPR_PCI_LIOBN(index, i); 37346737d9adSDavid Gibson } 37356737d9adSDavid Gibson 3736357d1e3bSDavid Gibson *pio = SPAPR_PCI_BASE + index * SPAPR_PCI_IO_WIN_SIZE; 3737357d1e3bSDavid Gibson *mmio32 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM32_WIN_SIZE; 3738357d1e3bSDavid Gibson *mmio64 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM64_WIN_SIZE; 37396737d9adSDavid Gibson } 37406737d9adSDavid Gibson 37417844e12bSCédric Le Goater static ICSState *spapr_ics_get(XICSFabric *dev, int irq) 37427844e12bSCédric Le Goater { 37437844e12bSCédric Le Goater sPAPRMachineState *spapr = SPAPR_MACHINE(dev); 37447844e12bSCédric Le Goater 37457844e12bSCédric Le Goater return ics_valid_irq(spapr->ics, irq) ? spapr->ics : NULL; 37467844e12bSCédric Le Goater } 37477844e12bSCédric Le Goater 37487844e12bSCédric Le Goater static void spapr_ics_resend(XICSFabric *dev) 37497844e12bSCédric Le Goater { 37507844e12bSCédric Le Goater sPAPRMachineState *spapr = SPAPR_MACHINE(dev); 37517844e12bSCédric Le Goater 37527844e12bSCédric Le Goater ics_resend(spapr->ics); 37537844e12bSCédric Le Goater } 37547844e12bSCédric Le Goater 375581210c20SSam Bobroff static ICPState *spapr_icp_get(XICSFabric *xi, int vcpu_id) 3756b2fc59aaSCédric Le Goater { 37572e886fb3SSam Bobroff PowerPCCPU *cpu = spapr_find_cpu(vcpu_id); 3758b2fc59aaSCédric Le Goater 37595bc8d26dSCédric Le Goater return cpu ? ICP(cpu->intc) : NULL; 3760b2fc59aaSCédric Le Goater } 3761b2fc59aaSCédric Le Goater 376260c6823bSCédric Le Goater #define ICS_IRQ_FREE(ics, srcno) \ 376360c6823bSCédric Le Goater (!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK))) 376460c6823bSCédric Le Goater 376560c6823bSCédric Le Goater static int ics_find_free_block(ICSState *ics, int num, int alignnum) 376660c6823bSCédric Le Goater { 376760c6823bSCédric Le Goater int first, i; 376860c6823bSCédric Le Goater 376960c6823bSCédric Le Goater for (first = 0; first < ics->nr_irqs; first += alignnum) { 377060c6823bSCédric Le Goater if (num > (ics->nr_irqs - first)) { 377160c6823bSCédric Le Goater return -1; 377260c6823bSCédric Le Goater } 377360c6823bSCédric Le Goater for (i = first; i < first + num; ++i) { 377460c6823bSCédric Le Goater if (!ICS_IRQ_FREE(ics, i)) { 377560c6823bSCédric Le Goater break; 377660c6823bSCédric Le Goater } 377760c6823bSCédric Le Goater } 377860c6823bSCédric Le Goater if (i == (first + num)) { 377960c6823bSCédric Le Goater return first; 378060c6823bSCédric Le Goater } 378160c6823bSCédric Le Goater } 378260c6823bSCédric Le Goater 378360c6823bSCédric Le Goater return -1; 378460c6823bSCédric Le Goater } 378560c6823bSCédric Le Goater 37869e7dc5fcSCédric Le Goater /* 37879e7dc5fcSCédric Le Goater * Allocate the IRQ number and set the IRQ type, LSI or MSI 37889e7dc5fcSCédric Le Goater */ 37899e7dc5fcSCédric Le Goater static void spapr_irq_set_lsi(sPAPRMachineState *spapr, int irq, bool lsi) 37909e7dc5fcSCédric Le Goater { 37919e7dc5fcSCédric Le Goater ics_set_irq_type(spapr->ics, irq - spapr->ics->offset, lsi); 37929e7dc5fcSCédric Le Goater } 37939e7dc5fcSCédric Le Goater 379460c6823bSCédric Le Goater int spapr_irq_alloc(sPAPRMachineState *spapr, int irq_hint, bool lsi, 379560c6823bSCédric Le Goater Error **errp) 379660c6823bSCédric Le Goater { 379760c6823bSCédric Le Goater ICSState *ics = spapr->ics; 379860c6823bSCédric Le Goater int irq; 379960c6823bSCédric Le Goater 38001d36c75aSGreg Kurz assert(ics); 38011d36c75aSGreg Kurz 380260c6823bSCédric Le Goater if (irq_hint) { 380360c6823bSCédric Le Goater if (!ICS_IRQ_FREE(ics, irq_hint - ics->offset)) { 380460c6823bSCédric Le Goater error_setg(errp, "can't allocate IRQ %d: already in use", irq_hint); 380560c6823bSCédric Le Goater return -1; 380660c6823bSCédric Le Goater } 380760c6823bSCédric Le Goater irq = irq_hint; 380860c6823bSCédric Le Goater } else { 380960c6823bSCédric Le Goater irq = ics_find_free_block(ics, 1, 1); 381060c6823bSCédric Le Goater if (irq < 0) { 381160c6823bSCédric Le Goater error_setg(errp, "can't allocate IRQ: no IRQ left"); 381260c6823bSCédric Le Goater return -1; 381360c6823bSCédric Le Goater } 381460c6823bSCédric Le Goater irq += ics->offset; 381560c6823bSCédric Le Goater } 381660c6823bSCédric Le Goater 38179e7dc5fcSCédric Le Goater spapr_irq_set_lsi(spapr, irq, lsi); 381860c6823bSCédric Le Goater trace_spapr_irq_alloc(irq); 381960c6823bSCédric Le Goater 382060c6823bSCédric Le Goater return irq; 382160c6823bSCédric Le Goater } 382260c6823bSCédric Le Goater 382360c6823bSCédric Le Goater /* 382460c6823bSCédric Le Goater * Allocate block of consecutive IRQs, and return the number of the first IRQ in 382560c6823bSCédric Le Goater * the block. If align==true, aligns the first IRQ number to num. 382660c6823bSCédric Le Goater */ 382760c6823bSCédric Le Goater int spapr_irq_alloc_block(sPAPRMachineState *spapr, int num, bool lsi, 382860c6823bSCédric Le Goater bool align, Error **errp) 382960c6823bSCédric Le Goater { 383060c6823bSCédric Le Goater ICSState *ics = spapr->ics; 383160c6823bSCédric Le Goater int i, first = -1; 383260c6823bSCédric Le Goater 38331d36c75aSGreg Kurz assert(ics); 383460c6823bSCédric Le Goater 383560c6823bSCédric Le Goater /* 383660c6823bSCédric Le Goater * MSIMesage::data is used for storing VIRQ so 383760c6823bSCédric Le Goater * it has to be aligned to num to support multiple 383860c6823bSCédric Le Goater * MSI vectors. MSI-X is not affected by this. 383960c6823bSCédric Le Goater * The hint is used for the first IRQ, the rest should 384060c6823bSCédric Le Goater * be allocated continuously. 384160c6823bSCédric Le Goater */ 384260c6823bSCédric Le Goater if (align) { 384360c6823bSCédric Le Goater assert((num == 1) || (num == 2) || (num == 4) || 384460c6823bSCédric Le Goater (num == 8) || (num == 16) || (num == 32)); 384560c6823bSCédric Le Goater first = ics_find_free_block(ics, num, num); 384660c6823bSCédric Le Goater } else { 384760c6823bSCédric Le Goater first = ics_find_free_block(ics, num, 1); 384860c6823bSCédric Le Goater } 384960c6823bSCédric Le Goater if (first < 0) { 385060c6823bSCédric Le Goater error_setg(errp, "can't find a free %d-IRQ block", num); 385160c6823bSCédric Le Goater return -1; 385260c6823bSCédric Le Goater } 385360c6823bSCédric Le Goater 385460c6823bSCédric Le Goater first += ics->offset; 38559e7dc5fcSCédric Le Goater for (i = first; i < first + num; ++i) { 38569e7dc5fcSCédric Le Goater spapr_irq_set_lsi(spapr, i, lsi); 38579e7dc5fcSCédric Le Goater } 385860c6823bSCédric Le Goater 385960c6823bSCédric Le Goater trace_spapr_irq_alloc_block(first, num, lsi, align); 386060c6823bSCédric Le Goater 386160c6823bSCédric Le Goater return first; 386260c6823bSCédric Le Goater } 386360c6823bSCédric Le Goater 386460c6823bSCédric Le Goater void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num) 386560c6823bSCédric Le Goater { 386660c6823bSCédric Le Goater ICSState *ics = spapr->ics; 386760c6823bSCédric Le Goater int srcno = irq - ics->offset; 386860c6823bSCédric Le Goater int i; 386960c6823bSCédric Le Goater 387060c6823bSCédric Le Goater if (ics_valid_irq(ics, irq)) { 387160c6823bSCédric Le Goater trace_spapr_irq_free(0, irq, num); 387260c6823bSCédric Le Goater for (i = srcno; i < srcno + num; ++i) { 387360c6823bSCédric Le Goater if (ICS_IRQ_FREE(ics, i)) { 387460c6823bSCédric Le Goater trace_spapr_irq_free_warn(0, i + ics->offset); 387560c6823bSCédric Le Goater } 387660c6823bSCédric Le Goater memset(&ics->irqs[i], 0, sizeof(ICSIRQState)); 387760c6823bSCédric Le Goater } 387860c6823bSCédric Le Goater } 387960c6823bSCédric Le Goater } 388060c6823bSCédric Le Goater 388177183755SCédric Le Goater qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq) 388277183755SCédric Le Goater { 388377183755SCédric Le Goater ICSState *ics = spapr->ics; 388477183755SCédric Le Goater 388577183755SCédric Le Goater if (ics_valid_irq(ics, irq)) { 388677183755SCédric Le Goater return ics->qirqs[irq - ics->offset]; 388777183755SCédric Le Goater } 388877183755SCédric Le Goater 388977183755SCédric Le Goater return NULL; 389077183755SCédric Le Goater } 389177183755SCédric Le Goater 38926449da45SCédric Le Goater static void spapr_pic_print_info(InterruptStatsProvider *obj, 38936449da45SCédric Le Goater Monitor *mon) 38946449da45SCédric Le Goater { 38956449da45SCédric Le Goater sPAPRMachineState *spapr = SPAPR_MACHINE(obj); 38965bc8d26dSCédric Le Goater CPUState *cs; 38976449da45SCédric Le Goater 38985bc8d26dSCédric Le Goater CPU_FOREACH(cs) { 38995bc8d26dSCédric Le Goater PowerPCCPU *cpu = POWERPC_CPU(cs); 39005bc8d26dSCédric Le Goater 39015bc8d26dSCédric Le Goater icp_pic_print_info(ICP(cpu->intc), mon); 39026449da45SCédric Le Goater } 39036449da45SCédric Le Goater 39046449da45SCédric Le Goater ics_pic_print_info(spapr->ics, mon); 39056449da45SCédric Le Goater } 39066449da45SCédric Le Goater 390714bb4486SGreg Kurz int spapr_get_vcpu_id(PowerPCCPU *cpu) 39082e886fb3SSam Bobroff { 3909b1a568c1SGreg Kurz return cpu->vcpu_id; 39102e886fb3SSam Bobroff } 39112e886fb3SSam Bobroff 3912648edb64SGreg Kurz void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp) 3913648edb64SGreg Kurz { 3914648edb64SGreg Kurz sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); 3915648edb64SGreg Kurz int vcpu_id; 3916648edb64SGreg Kurz 39175d0fb150SGreg Kurz vcpu_id = spapr_vcpu_id(spapr, cpu_index); 3918648edb64SGreg Kurz 3919648edb64SGreg Kurz if (kvm_enabled() && !kvm_vcpu_id_is_valid(vcpu_id)) { 3920648edb64SGreg Kurz error_setg(errp, "Can't create CPU with id %d in KVM", vcpu_id); 3921648edb64SGreg Kurz error_append_hint(errp, "Adjust the number of cpus to %d " 3922648edb64SGreg Kurz "or try to raise the number of threads per core\n", 3923648edb64SGreg Kurz vcpu_id * smp_threads / spapr->vsmt); 3924648edb64SGreg Kurz return; 3925648edb64SGreg Kurz } 3926648edb64SGreg Kurz 3927648edb64SGreg Kurz cpu->vcpu_id = vcpu_id; 3928648edb64SGreg Kurz } 3929648edb64SGreg Kurz 39302e886fb3SSam Bobroff PowerPCCPU *spapr_find_cpu(int vcpu_id) 39312e886fb3SSam Bobroff { 39322e886fb3SSam Bobroff CPUState *cs; 39332e886fb3SSam Bobroff 39342e886fb3SSam Bobroff CPU_FOREACH(cs) { 39352e886fb3SSam Bobroff PowerPCCPU *cpu = POWERPC_CPU(cs); 39362e886fb3SSam Bobroff 393714bb4486SGreg Kurz if (spapr_get_vcpu_id(cpu) == vcpu_id) { 39382e886fb3SSam Bobroff return cpu; 39392e886fb3SSam Bobroff } 39402e886fb3SSam Bobroff } 39412e886fb3SSam Bobroff 39422e886fb3SSam Bobroff return NULL; 39432e886fb3SSam Bobroff } 39442e886fb3SSam Bobroff 394529ee3247SAlexey Kardashevskiy static void spapr_machine_class_init(ObjectClass *oc, void *data) 394653018216SPaolo Bonzini { 394729ee3247SAlexey Kardashevskiy MachineClass *mc = MACHINE_CLASS(oc); 3948224245bfSDavid Gibson sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc); 394971461b0fSAlexey Kardashevskiy FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc); 395034316482SAlexey Kardashevskiy NMIClass *nc = NMI_CLASS(oc); 3951c20d332aSBharata B Rao HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); 39521d1be34dSDavid Gibson PPCVirtualHypervisorClass *vhc = PPC_VIRTUAL_HYPERVISOR_CLASS(oc); 39537844e12bSCédric Le Goater XICSFabricClass *xic = XICS_FABRIC_CLASS(oc); 39546449da45SCédric Le Goater InterruptStatsProviderClass *ispc = INTERRUPT_STATS_PROVIDER_CLASS(oc); 395529ee3247SAlexey Kardashevskiy 39560eb9054cSDavid Gibson mc->desc = "pSeries Logical Partition (PAPR compliant)"; 3957fc9f38c3SDavid Gibson 3958fc9f38c3SDavid Gibson /* 3959fc9f38c3SDavid Gibson * We set up the default / latest behaviour here. The class_init 3960fc9f38c3SDavid Gibson * functions for the specific versioned machine types can override 3961fc9f38c3SDavid Gibson * these details for backwards compatibility 3962fc9f38c3SDavid Gibson */ 3963bcb5ce08SDavid Gibson mc->init = spapr_machine_init; 3964bcb5ce08SDavid Gibson mc->reset = spapr_machine_reset; 3965958db90cSMarcel Apfelbaum mc->block_default_type = IF_SCSI; 39666244bb7eSGreg Kurz mc->max_cpus = 1024; 3967958db90cSMarcel Apfelbaum mc->no_parallel = 1; 39685b2128d2SAlexander Graf mc->default_boot_order = ""; 3969a34944feSNikunj A Dadhania mc->default_ram_size = 512 * M_BYTE; 3970958db90cSMarcel Apfelbaum mc->kvm_type = spapr_kvm_type; 39717da79a16SEduardo Habkost machine_class_allow_dynamic_sysbus_dev(mc, TYPE_SPAPR_PCI_HOST_BRIDGE); 3972e4024630SLaurent Vivier mc->pci_allow_0_address = true; 39737ebaf795SBharata B Rao mc->get_hotplug_handler = spapr_get_hotplug_handler; 397494a94e4cSBharata B Rao hc->pre_plug = spapr_machine_device_pre_plug; 3975c20d332aSBharata B Rao hc->plug = spapr_machine_device_plug; 3976ea089eebSIgor Mammedov mc->cpu_index_to_instance_props = spapr_cpu_index_to_props; 397779e07936SIgor Mammedov mc->get_default_cpu_node_id = spapr_get_default_cpu_node_id; 3978535455fdSIgor Mammedov mc->possible_cpu_arch_ids = spapr_possible_cpu_arch_ids; 3979cf632463SBharata B Rao hc->unplug_request = spapr_machine_device_unplug_request; 398000b4fbe2SMarcel Apfelbaum 3981fc9f38c3SDavid Gibson smc->dr_lmb_enabled = true; 39822e9c10ebSIgor Mammedov mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0"); 3983c5514d0eSIgor Mammedov mc->has_hotpluggable_cpus = true; 398452b81ab5SDavid Gibson smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED; 398571461b0fSAlexey Kardashevskiy fwc->get_dev_path = spapr_get_fw_dev_path; 398634316482SAlexey Kardashevskiy nc->nmi_monitor_handler = spapr_nmi; 39876737d9adSDavid Gibson smc->phb_placement = spapr_phb_placement; 39881d1be34dSDavid Gibson vhc->hypercall = emulate_spapr_hypercall; 3989e57ca75cSDavid Gibson vhc->hpt_mask = spapr_hpt_mask; 3990e57ca75cSDavid Gibson vhc->map_hptes = spapr_map_hptes; 3991e57ca75cSDavid Gibson vhc->unmap_hptes = spapr_unmap_hptes; 3992e57ca75cSDavid Gibson vhc->store_hpte = spapr_store_hpte; 39939861bb3eSSuraj Jitindar Singh vhc->get_patbe = spapr_get_patbe; 39941ec26c75SGreg Kurz vhc->encode_hpt_for_kvm_pr = spapr_encode_hpt_for_kvm_pr; 39957844e12bSCédric Le Goater xic->ics_get = spapr_ics_get; 39967844e12bSCédric Le Goater xic->ics_resend = spapr_ics_resend; 3997b2fc59aaSCédric Le Goater xic->icp_get = spapr_icp_get; 39986449da45SCédric Le Goater ispc->print_info = spapr_pic_print_info; 399955641213SLaurent Vivier /* Force NUMA node memory size to be a multiple of 400055641213SLaurent Vivier * SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity 400155641213SLaurent Vivier * in which LMBs are represented and hot-added 400255641213SLaurent Vivier */ 400355641213SLaurent Vivier mc->numa_mem_align_shift = 28; 400433face6bSDavid Gibson 40054e5fe368SSuraj Jitindar Singh smc->default_caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF; 40064e5fe368SSuraj Jitindar Singh smc->default_caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_ON; 40074e5fe368SSuraj Jitindar Singh smc->default_caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_ON; 40088f38eaf8SSuraj Jitindar Singh smc->default_caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN; 400909114fd8SSuraj Jitindar Singh smc->default_caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN; 40104be8d4e7SSuraj Jitindar Singh smc->default_caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN; 401133face6bSDavid Gibson spapr_caps_add_properties(smc, &error_abort); 401253018216SPaolo Bonzini } 401353018216SPaolo Bonzini 401429ee3247SAlexey Kardashevskiy static const TypeInfo spapr_machine_info = { 401529ee3247SAlexey Kardashevskiy .name = TYPE_SPAPR_MACHINE, 401629ee3247SAlexey Kardashevskiy .parent = TYPE_MACHINE, 40174aee7362SDavid Gibson .abstract = true, 40186ca1502eSAlexey Kardashevskiy .instance_size = sizeof(sPAPRMachineState), 4019bcb5ce08SDavid Gibson .instance_init = spapr_instance_init, 402087bbdd9cSDavid Gibson .instance_finalize = spapr_machine_finalizefn, 4021183930c0SDavid Gibson .class_size = sizeof(sPAPRMachineClass), 402229ee3247SAlexey Kardashevskiy .class_init = spapr_machine_class_init, 402371461b0fSAlexey Kardashevskiy .interfaces = (InterfaceInfo[]) { 402471461b0fSAlexey Kardashevskiy { TYPE_FW_PATH_PROVIDER }, 402534316482SAlexey Kardashevskiy { TYPE_NMI }, 4026c20d332aSBharata B Rao { TYPE_HOTPLUG_HANDLER }, 40271d1be34dSDavid Gibson { TYPE_PPC_VIRTUAL_HYPERVISOR }, 40287844e12bSCédric Le Goater { TYPE_XICS_FABRIC }, 40296449da45SCédric Le Goater { TYPE_INTERRUPT_STATS_PROVIDER }, 403071461b0fSAlexey Kardashevskiy { } 403171461b0fSAlexey Kardashevskiy }, 403229ee3247SAlexey Kardashevskiy }; 403329ee3247SAlexey Kardashevskiy 4034fccbc785SDavid Gibson #define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \ 40355013c547SDavid Gibson static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \ 40365013c547SDavid Gibson void *data) \ 40375013c547SDavid Gibson { \ 40385013c547SDavid Gibson MachineClass *mc = MACHINE_CLASS(oc); \ 40395013c547SDavid Gibson spapr_machine_##suffix##_class_options(mc); \ 4040fccbc785SDavid Gibson if (latest) { \ 4041fccbc785SDavid Gibson mc->alias = "pseries"; \ 4042fccbc785SDavid Gibson mc->is_default = 1; \ 4043fccbc785SDavid Gibson } \ 40445013c547SDavid Gibson } \ 40455013c547SDavid Gibson static void spapr_machine_##suffix##_instance_init(Object *obj) \ 40465013c547SDavid Gibson { \ 40475013c547SDavid Gibson MachineState *machine = MACHINE(obj); \ 40485013c547SDavid Gibson spapr_machine_##suffix##_instance_options(machine); \ 40495013c547SDavid Gibson } \ 40505013c547SDavid Gibson static const TypeInfo spapr_machine_##suffix##_info = { \ 40515013c547SDavid Gibson .name = MACHINE_TYPE_NAME("pseries-" verstr), \ 40525013c547SDavid Gibson .parent = TYPE_SPAPR_MACHINE, \ 40535013c547SDavid Gibson .class_init = spapr_machine_##suffix##_class_init, \ 40545013c547SDavid Gibson .instance_init = spapr_machine_##suffix##_instance_init, \ 40555013c547SDavid Gibson }; \ 40565013c547SDavid Gibson static void spapr_machine_register_##suffix(void) \ 40575013c547SDavid Gibson { \ 40585013c547SDavid Gibson type_register(&spapr_machine_##suffix##_info); \ 40595013c547SDavid Gibson } \ 40600e6aac87SEduardo Habkost type_init(spapr_machine_register_##suffix) 40615013c547SDavid Gibson 40621c5f29bbSDavid Gibson /* 40638a4fd427SDavid Gibson * pseries-2.13 4064e2676b16SGreg Kurz */ 40658a4fd427SDavid Gibson static void spapr_machine_2_13_instance_options(MachineState *machine) 4066e2676b16SGreg Kurz { 4067e2676b16SGreg Kurz } 4068e2676b16SGreg Kurz 40698a4fd427SDavid Gibson static void spapr_machine_2_13_class_options(MachineClass *mc) 4070e2676b16SGreg Kurz { 4071e2676b16SGreg Kurz /* Defaults for the latest behaviour inherited from the base class */ 4072e2676b16SGreg Kurz } 4073e2676b16SGreg Kurz 40748a4fd427SDavid Gibson DEFINE_SPAPR_MACHINE(2_13, "2.13", true); 40758a4fd427SDavid Gibson 40768a4fd427SDavid Gibson /* 40778a4fd427SDavid Gibson * pseries-2.12 40788a4fd427SDavid Gibson */ 40798a4fd427SDavid Gibson #define SPAPR_COMPAT_2_12 \ 408067d7d66fSDavid Gibson HW_COMPAT_2_12 \ 408167d7d66fSDavid Gibson { \ 408267d7d66fSDavid Gibson .driver = TYPE_POWERPC_CPU, \ 408367d7d66fSDavid Gibson .property = "pre-2.13-migration", \ 408467d7d66fSDavid Gibson .value = "on", \ 408567d7d66fSDavid Gibson }, 40868a4fd427SDavid Gibson 40878a4fd427SDavid Gibson static void spapr_machine_2_12_instance_options(MachineState *machine) 40888a4fd427SDavid Gibson { 40898a4fd427SDavid Gibson spapr_machine_2_13_instance_options(machine); 40908a4fd427SDavid Gibson } 40918a4fd427SDavid Gibson 40928a4fd427SDavid Gibson static void spapr_machine_2_12_class_options(MachineClass *mc) 40938a4fd427SDavid Gibson { 40948a4fd427SDavid Gibson spapr_machine_2_13_class_options(mc); 40958a4fd427SDavid Gibson SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_12); 40968a4fd427SDavid Gibson } 40978a4fd427SDavid Gibson 40988a4fd427SDavid Gibson DEFINE_SPAPR_MACHINE(2_12, "2.12", false); 40992b615412SDavid Gibson 4100813f3cf6SSuraj Jitindar Singh static void spapr_machine_2_12_sxxm_instance_options(MachineState *machine) 4101813f3cf6SSuraj Jitindar Singh { 4102813f3cf6SSuraj Jitindar Singh spapr_machine_2_12_instance_options(machine); 4103813f3cf6SSuraj Jitindar Singh } 4104813f3cf6SSuraj Jitindar Singh 4105813f3cf6SSuraj Jitindar Singh static void spapr_machine_2_12_sxxm_class_options(MachineClass *mc) 4106813f3cf6SSuraj Jitindar Singh { 4107813f3cf6SSuraj Jitindar Singh sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); 4108813f3cf6SSuraj Jitindar Singh 4109813f3cf6SSuraj Jitindar Singh spapr_machine_2_12_class_options(mc); 4110813f3cf6SSuraj Jitindar Singh smc->default_caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_WORKAROUND; 4111813f3cf6SSuraj Jitindar Singh smc->default_caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_WORKAROUND; 4112813f3cf6SSuraj Jitindar Singh smc->default_caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_FIXED_CCD; 4113813f3cf6SSuraj Jitindar Singh } 4114813f3cf6SSuraj Jitindar Singh 4115813f3cf6SSuraj Jitindar Singh DEFINE_SPAPR_MACHINE(2_12_sxxm, "2.12-sxxm", false); 4116813f3cf6SSuraj Jitindar Singh 41172b615412SDavid Gibson /* 41182b615412SDavid Gibson * pseries-2.11 41192b615412SDavid Gibson */ 41202b615412SDavid Gibson #define SPAPR_COMPAT_2_11 \ 41212b615412SDavid Gibson HW_COMPAT_2_11 41222b615412SDavid Gibson 41232b615412SDavid Gibson static void spapr_machine_2_11_instance_options(MachineState *machine) 41242b615412SDavid Gibson { 41252b615412SDavid Gibson spapr_machine_2_12_instance_options(machine); 41262b615412SDavid Gibson } 41272b615412SDavid Gibson 41282b615412SDavid Gibson static void spapr_machine_2_11_class_options(MachineClass *mc) 41292b615412SDavid Gibson { 4130ee76a09fSDavid Gibson sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); 4131ee76a09fSDavid Gibson 41322b615412SDavid Gibson spapr_machine_2_12_class_options(mc); 41334e5fe368SSuraj Jitindar Singh smc->default_caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_ON; 41342b615412SDavid Gibson SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); 41352b615412SDavid Gibson } 41362b615412SDavid Gibson 41372b615412SDavid Gibson DEFINE_SPAPR_MACHINE(2_11, "2.11", false); 4138e2676b16SGreg Kurz 4139e2676b16SGreg Kurz /* 41403fa14fbeSDavid Gibson * pseries-2.10 4141db800b21SDavid Gibson */ 4142e2676b16SGreg Kurz #define SPAPR_COMPAT_2_10 \ 41432b615412SDavid Gibson HW_COMPAT_2_10 4144e2676b16SGreg Kurz 41453fa14fbeSDavid Gibson static void spapr_machine_2_10_instance_options(MachineState *machine) 4146db800b21SDavid Gibson { 41472b615412SDavid Gibson spapr_machine_2_11_instance_options(machine); 4148db800b21SDavid Gibson } 4149db800b21SDavid Gibson 41503fa14fbeSDavid Gibson static void spapr_machine_2_10_class_options(MachineClass *mc) 4151db800b21SDavid Gibson { 4152e2676b16SGreg Kurz spapr_machine_2_11_class_options(mc); 4153e2676b16SGreg Kurz SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_10); 4154db800b21SDavid Gibson } 4155db800b21SDavid Gibson 4156e2676b16SGreg Kurz DEFINE_SPAPR_MACHINE(2_10, "2.10", false); 41573fa14fbeSDavid Gibson 41583fa14fbeSDavid Gibson /* 41593fa14fbeSDavid Gibson * pseries-2.9 41603fa14fbeSDavid Gibson */ 41613fa14fbeSDavid Gibson #define SPAPR_COMPAT_2_9 \ 4162d5fc133eSDavid Gibson HW_COMPAT_2_9 \ 4163d5fc133eSDavid Gibson { \ 4164d5fc133eSDavid Gibson .driver = TYPE_POWERPC_CPU, \ 4165d5fc133eSDavid Gibson .property = "pre-2.10-migration", \ 4166d5fc133eSDavid Gibson .value = "on", \ 4167d5fc133eSDavid Gibson }, \ 41683fa14fbeSDavid Gibson 41693fa14fbeSDavid Gibson static void spapr_machine_2_9_instance_options(MachineState *machine) 41703fa14fbeSDavid Gibson { 41713fa14fbeSDavid Gibson spapr_machine_2_10_instance_options(machine); 41723fa14fbeSDavid Gibson } 41733fa14fbeSDavid Gibson 41743fa14fbeSDavid Gibson static void spapr_machine_2_9_class_options(MachineClass *mc) 41753fa14fbeSDavid Gibson { 417646f7afa3SGreg Kurz sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); 417746f7afa3SGreg Kurz 41783fa14fbeSDavid Gibson spapr_machine_2_10_class_options(mc); 41793fa14fbeSDavid Gibson SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_9); 41803bfe5716SLaurent Vivier mc->numa_auto_assign_ram = numa_legacy_auto_assign_ram; 418146f7afa3SGreg Kurz smc->pre_2_10_has_unused_icps = true; 418252b81ab5SDavid Gibson smc->resize_hpt_default = SPAPR_RESIZE_HPT_DISABLED; 41833fa14fbeSDavid Gibson } 41843fa14fbeSDavid Gibson 41853fa14fbeSDavid Gibson DEFINE_SPAPR_MACHINE(2_9, "2.9", false); 4186fa325e6cSDavid Gibson 4187fa325e6cSDavid Gibson /* 4188fa325e6cSDavid Gibson * pseries-2.8 4189fa325e6cSDavid Gibson */ 4190fa325e6cSDavid Gibson #define SPAPR_COMPAT_2_8 \ 419182516263SDavid Gibson HW_COMPAT_2_8 \ 419282516263SDavid Gibson { \ 419382516263SDavid Gibson .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \ 419482516263SDavid Gibson .property = "pcie-extended-configuration-space", \ 419582516263SDavid Gibson .value = "off", \ 419682516263SDavid Gibson }, 4197fa325e6cSDavid Gibson 4198fa325e6cSDavid Gibson static void spapr_machine_2_8_instance_options(MachineState *machine) 4199fa325e6cSDavid Gibson { 4200fa325e6cSDavid Gibson spapr_machine_2_9_instance_options(machine); 4201fa325e6cSDavid Gibson } 4202fa325e6cSDavid Gibson 4203fa325e6cSDavid Gibson static void spapr_machine_2_8_class_options(MachineClass *mc) 4204fa325e6cSDavid Gibson { 4205fa325e6cSDavid Gibson spapr_machine_2_9_class_options(mc); 4206fa325e6cSDavid Gibson SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_8); 420755641213SLaurent Vivier mc->numa_mem_align_shift = 23; 4208fa325e6cSDavid Gibson } 4209fa325e6cSDavid Gibson 4210fa325e6cSDavid Gibson DEFINE_SPAPR_MACHINE(2_8, "2.8", false); 4211db800b21SDavid Gibson 4212db800b21SDavid Gibson /* 42131ea1eefcSBharata B Rao * pseries-2.7 42141ea1eefcSBharata B Rao */ 4215db800b21SDavid Gibson #define SPAPR_COMPAT_2_7 \ 4216db800b21SDavid Gibson HW_COMPAT_2_7 \ 4217357d1e3bSDavid Gibson { \ 4218357d1e3bSDavid Gibson .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \ 4219357d1e3bSDavid Gibson .property = "mem_win_size", \ 4220357d1e3bSDavid Gibson .value = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE),\ 4221357d1e3bSDavid Gibson }, \ 4222357d1e3bSDavid Gibson { \ 4223357d1e3bSDavid Gibson .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \ 4224357d1e3bSDavid Gibson .property = "mem64_win_size", \ 4225357d1e3bSDavid Gibson .value = "0", \ 4226146c11f1SDavid Gibson }, \ 4227146c11f1SDavid Gibson { \ 4228146c11f1SDavid Gibson .driver = TYPE_POWERPC_CPU, \ 4229146c11f1SDavid Gibson .property = "pre-2.8-migration", \ 4230146c11f1SDavid Gibson .value = "on", \ 42315c4537bdSDavid Gibson }, \ 42325c4537bdSDavid Gibson { \ 42335c4537bdSDavid Gibson .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \ 42345c4537bdSDavid Gibson .property = "pre-2.8-migration", \ 42355c4537bdSDavid Gibson .value = "on", \ 4236357d1e3bSDavid Gibson }, 4237357d1e3bSDavid Gibson 4238357d1e3bSDavid Gibson static void phb_placement_2_7(sPAPRMachineState *spapr, uint32_t index, 4239357d1e3bSDavid Gibson uint64_t *buid, hwaddr *pio, 4240357d1e3bSDavid Gibson hwaddr *mmio32, hwaddr *mmio64, 4241357d1e3bSDavid Gibson unsigned n_dma, uint32_t *liobns, Error **errp) 4242357d1e3bSDavid Gibson { 4243357d1e3bSDavid Gibson /* Legacy PHB placement for pseries-2.7 and earlier machine types */ 4244357d1e3bSDavid Gibson const uint64_t base_buid = 0x800000020000000ULL; 4245357d1e3bSDavid Gibson const hwaddr phb_spacing = 0x1000000000ULL; /* 64 GiB */ 4246357d1e3bSDavid Gibson const hwaddr mmio_offset = 0xa0000000; /* 2 GiB + 512 MiB */ 4247357d1e3bSDavid Gibson const hwaddr pio_offset = 0x80000000; /* 2 GiB */ 4248357d1e3bSDavid Gibson const uint32_t max_index = 255; 4249357d1e3bSDavid Gibson const hwaddr phb0_alignment = 0x10000000000ULL; /* 1 TiB */ 4250357d1e3bSDavid Gibson 4251357d1e3bSDavid Gibson uint64_t ram_top = MACHINE(spapr)->ram_size; 4252357d1e3bSDavid Gibson hwaddr phb0_base, phb_base; 4253357d1e3bSDavid Gibson int i; 4254357d1e3bSDavid Gibson 4255357d1e3bSDavid Gibson /* Do we have hotpluggable memory? */ 4256357d1e3bSDavid Gibson if (MACHINE(spapr)->maxram_size > ram_top) { 4257357d1e3bSDavid Gibson /* Can't just use maxram_size, because there may be an 4258357d1e3bSDavid Gibson * alignment gap between normal and hotpluggable memory 4259357d1e3bSDavid Gibson * regions */ 4260357d1e3bSDavid Gibson ram_top = spapr->hotplug_memory.base + 4261357d1e3bSDavid Gibson memory_region_size(&spapr->hotplug_memory.mr); 4262357d1e3bSDavid Gibson } 4263357d1e3bSDavid Gibson 4264357d1e3bSDavid Gibson phb0_base = QEMU_ALIGN_UP(ram_top, phb0_alignment); 4265357d1e3bSDavid Gibson 4266357d1e3bSDavid Gibson if (index > max_index) { 4267357d1e3bSDavid Gibson error_setg(errp, "\"index\" for PAPR PHB is too large (max %u)", 4268357d1e3bSDavid Gibson max_index); 4269357d1e3bSDavid Gibson return; 4270357d1e3bSDavid Gibson } 4271357d1e3bSDavid Gibson 4272357d1e3bSDavid Gibson *buid = base_buid + index; 4273357d1e3bSDavid Gibson for (i = 0; i < n_dma; ++i) { 4274357d1e3bSDavid Gibson liobns[i] = SPAPR_PCI_LIOBN(index, i); 4275357d1e3bSDavid Gibson } 4276357d1e3bSDavid Gibson 4277357d1e3bSDavid Gibson phb_base = phb0_base + index * phb_spacing; 4278357d1e3bSDavid Gibson *pio = phb_base + pio_offset; 4279357d1e3bSDavid Gibson *mmio32 = phb_base + mmio_offset; 4280357d1e3bSDavid Gibson /* 4281357d1e3bSDavid Gibson * We don't set the 64-bit MMIO window, relying on the PHB's 4282357d1e3bSDavid Gibson * fallback behaviour of automatically splitting a large "32-bit" 4283357d1e3bSDavid Gibson * window into contiguous 32-bit and 64-bit windows 4284357d1e3bSDavid Gibson */ 4285357d1e3bSDavid Gibson } 4286db800b21SDavid Gibson 42871ea1eefcSBharata B Rao static void spapr_machine_2_7_instance_options(MachineState *machine) 42881ea1eefcSBharata B Rao { 4289f6229214SMichael Roth sPAPRMachineState *spapr = SPAPR_MACHINE(machine); 4290f6229214SMichael Roth 4291672de881SMichael Roth spapr_machine_2_8_instance_options(machine); 4292f6229214SMichael Roth spapr->use_hotplug_event_source = false; 42931ea1eefcSBharata B Rao } 42941ea1eefcSBharata B Rao 42951ea1eefcSBharata B Rao static void spapr_machine_2_7_class_options(MachineClass *mc) 42961ea1eefcSBharata B Rao { 42973daa4a9fSThomas Huth sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); 42983daa4a9fSThomas Huth 4299db800b21SDavid Gibson spapr_machine_2_8_class_options(mc); 43002e9c10ebSIgor Mammedov mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power7_v2.3"); 4301db800b21SDavid Gibson SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_7); 4302357d1e3bSDavid Gibson smc->phb_placement = phb_placement_2_7; 43031ea1eefcSBharata B Rao } 43041ea1eefcSBharata B Rao 4305db800b21SDavid Gibson DEFINE_SPAPR_MACHINE(2_7, "2.7", false); 43061ea1eefcSBharata B Rao 43071ea1eefcSBharata B Rao /* 43084b23699cSDavid Gibson * pseries-2.6 43094b23699cSDavid Gibson */ 43101ea1eefcSBharata B Rao #define SPAPR_COMPAT_2_6 \ 4311ae4de14cSAlexey Kardashevskiy HW_COMPAT_2_6 \ 4312ae4de14cSAlexey Kardashevskiy { \ 4313ae4de14cSAlexey Kardashevskiy .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\ 4314ae4de14cSAlexey Kardashevskiy .property = "ddw",\ 4315ae4de14cSAlexey Kardashevskiy .value = stringify(off),\ 4316ae4de14cSAlexey Kardashevskiy }, 43171ea1eefcSBharata B Rao 43184b23699cSDavid Gibson static void spapr_machine_2_6_instance_options(MachineState *machine) 43194b23699cSDavid Gibson { 4320672de881SMichael Roth spapr_machine_2_7_instance_options(machine); 43214b23699cSDavid Gibson } 43224b23699cSDavid Gibson 43234b23699cSDavid Gibson static void spapr_machine_2_6_class_options(MachineClass *mc) 43244b23699cSDavid Gibson { 43251ea1eefcSBharata B Rao spapr_machine_2_7_class_options(mc); 4326c5514d0eSIgor Mammedov mc->has_hotpluggable_cpus = false; 43271ea1eefcSBharata B Rao SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_6); 43284b23699cSDavid Gibson } 43294b23699cSDavid Gibson 43301ea1eefcSBharata B Rao DEFINE_SPAPR_MACHINE(2_6, "2.6", false); 43314b23699cSDavid Gibson 43324b23699cSDavid Gibson /* 43331c5f29bbSDavid Gibson * pseries-2.5 43341c5f29bbSDavid Gibson */ 43354b23699cSDavid Gibson #define SPAPR_COMPAT_2_5 \ 433657c522f4SThomas Huth HW_COMPAT_2_5 \ 433757c522f4SThomas Huth { \ 433857c522f4SThomas Huth .driver = "spapr-vlan", \ 433957c522f4SThomas Huth .property = "use-rx-buffer-pools", \ 434057c522f4SThomas Huth .value = "off", \ 434157c522f4SThomas Huth }, 43424b23699cSDavid Gibson 43435013c547SDavid Gibson static void spapr_machine_2_5_instance_options(MachineState *machine) 43441c5f29bbSDavid Gibson { 4345672de881SMichael Roth spapr_machine_2_6_instance_options(machine); 43465013c547SDavid Gibson } 43475013c547SDavid Gibson 43485013c547SDavid Gibson static void spapr_machine_2_5_class_options(MachineClass *mc) 43495013c547SDavid Gibson { 435057040d45SThomas Huth sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); 435157040d45SThomas Huth 43524b23699cSDavid Gibson spapr_machine_2_6_class_options(mc); 435357040d45SThomas Huth smc->use_ohci_by_default = true; 43544b23699cSDavid Gibson SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_5); 43551c5f29bbSDavid Gibson } 43561c5f29bbSDavid Gibson 43574b23699cSDavid Gibson DEFINE_SPAPR_MACHINE(2_5, "2.5", false); 43581c5f29bbSDavid Gibson 43591c5f29bbSDavid Gibson /* 43601c5f29bbSDavid Gibson * pseries-2.4 43611c5f29bbSDavid Gibson */ 436280fd50f9SCornelia Huck #define SPAPR_COMPAT_2_4 \ 436380fd50f9SCornelia Huck HW_COMPAT_2_4 436480fd50f9SCornelia Huck 43655013c547SDavid Gibson static void spapr_machine_2_4_instance_options(MachineState *machine) 43661c5f29bbSDavid Gibson { 43675013c547SDavid Gibson spapr_machine_2_5_instance_options(machine); 43685013c547SDavid Gibson } 43691c5f29bbSDavid Gibson 43705013c547SDavid Gibson static void spapr_machine_2_4_class_options(MachineClass *mc) 43715013c547SDavid Gibson { 4372fc9f38c3SDavid Gibson sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); 4373fc9f38c3SDavid Gibson 4374fc9f38c3SDavid Gibson spapr_machine_2_5_class_options(mc); 4375fc9f38c3SDavid Gibson smc->dr_lmb_enabled = false; 4376f949b4e5SDavid Gibson SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_4); 43771c5f29bbSDavid Gibson } 43781c5f29bbSDavid Gibson 4379fccbc785SDavid Gibson DEFINE_SPAPR_MACHINE(2_4, "2.4", false); 43801c5f29bbSDavid Gibson 43811c5f29bbSDavid Gibson /* 43821c5f29bbSDavid Gibson * pseries-2.3 43831c5f29bbSDavid Gibson */ 438438ff32c6SEduardo Habkost #define SPAPR_COMPAT_2_3 \ 43857619c7b0SMichael Roth HW_COMPAT_2_3 \ 43867619c7b0SMichael Roth {\ 43877619c7b0SMichael Roth .driver = "spapr-pci-host-bridge",\ 43887619c7b0SMichael Roth .property = "dynamic-reconfiguration",\ 43897619c7b0SMichael Roth .value = "off",\ 43907619c7b0SMichael Roth }, 439138ff32c6SEduardo Habkost 43925013c547SDavid Gibson static void spapr_machine_2_3_instance_options(MachineState *machine) 43931c5f29bbSDavid Gibson { 43945013c547SDavid Gibson spapr_machine_2_4_instance_options(machine); 43951c5f29bbSDavid Gibson } 43961c5f29bbSDavid Gibson 43975013c547SDavid Gibson static void spapr_machine_2_3_class_options(MachineClass *mc) 43981c5f29bbSDavid Gibson { 4399fc9f38c3SDavid Gibson spapr_machine_2_4_class_options(mc); 4400f949b4e5SDavid Gibson SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_3); 44011c5f29bbSDavid Gibson } 4402fccbc785SDavid Gibson DEFINE_SPAPR_MACHINE(2_3, "2.3", false); 44031c5f29bbSDavid Gibson 44041c5f29bbSDavid Gibson /* 44051c5f29bbSDavid Gibson * pseries-2.2 44061c5f29bbSDavid Gibson */ 44071c5f29bbSDavid Gibson 4408b194df47SAlexey Kardashevskiy #define SPAPR_COMPAT_2_2 \ 44094dfd8eaaSEduardo Habkost HW_COMPAT_2_2 \ 4410b194df47SAlexey Kardashevskiy {\ 4411b194df47SAlexey Kardashevskiy .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\ 4412b194df47SAlexey Kardashevskiy .property = "mem_win_size",\ 4413b194df47SAlexey Kardashevskiy .value = "0x20000000",\ 4414dd754bafSEduardo Habkost }, 4415b194df47SAlexey Kardashevskiy 44165013c547SDavid Gibson static void spapr_machine_2_2_instance_options(MachineState *machine) 4417b0e966d0SJason Wang { 44185013c547SDavid Gibson spapr_machine_2_3_instance_options(machine); 4419cba0e779SGreg Kurz machine->suppress_vmdesc = true; 4420b0e966d0SJason Wang } 4421b0e966d0SJason Wang 44225013c547SDavid Gibson static void spapr_machine_2_2_class_options(MachineClass *mc) 4423b0e966d0SJason Wang { 4424fc9f38c3SDavid Gibson spapr_machine_2_3_class_options(mc); 4425f949b4e5SDavid Gibson SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_2); 44261c5f29bbSDavid Gibson } 4427fccbc785SDavid Gibson DEFINE_SPAPR_MACHINE(2_2, "2.2", false); 44281c5f29bbSDavid Gibson 44291c5f29bbSDavid Gibson /* 44301c5f29bbSDavid Gibson * pseries-2.1 44311c5f29bbSDavid Gibson */ 44321c5f29bbSDavid Gibson #define SPAPR_COMPAT_2_1 \ 44331c5f29bbSDavid Gibson HW_COMPAT_2_1 44341c5f29bbSDavid Gibson 44355013c547SDavid Gibson static void spapr_machine_2_1_instance_options(MachineState *machine) 44361c5f29bbSDavid Gibson { 44375013c547SDavid Gibson spapr_machine_2_2_instance_options(machine); 44381c5f29bbSDavid Gibson } 44391c5f29bbSDavid Gibson 44405013c547SDavid Gibson static void spapr_machine_2_1_class_options(MachineClass *mc) 4441b0e966d0SJason Wang { 4442fc9f38c3SDavid Gibson spapr_machine_2_2_class_options(mc); 4443f949b4e5SDavid Gibson SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_1); 44446026db45SAlexey Kardashevskiy } 4445fccbc785SDavid Gibson DEFINE_SPAPR_MACHINE(2_1, "2.1", false); 44466026db45SAlexey Kardashevskiy 444729ee3247SAlexey Kardashevskiy static void spapr_machine_register_types(void) 444829ee3247SAlexey Kardashevskiy { 444929ee3247SAlexey Kardashevskiy type_register_static(&spapr_machine_info); 445029ee3247SAlexey Kardashevskiy } 445129ee3247SAlexey Kardashevskiy 445229ee3247SAlexey Kardashevskiy type_init(spapr_machine_register_types) 4453