14b387f9eSBALATON Zoltan /*
24b387f9eSBALATON Zoltan * QEMU aCube Sam460ex board emulation
34b387f9eSBALATON Zoltan *
44b387f9eSBALATON Zoltan * Copyright (c) 2012 François Revol
508fd9917SBALATON Zoltan * Copyright (c) 2016-2019 BALATON Zoltan
64b387f9eSBALATON Zoltan *
74b387f9eSBALATON Zoltan * This file is derived from hw/ppc440_bamboo.c,
84b387f9eSBALATON Zoltan * the copyright for that material belongs to the original owners.
94b387f9eSBALATON Zoltan *
104b387f9eSBALATON Zoltan * This work is licensed under the GNU GPL license version 2 or later.
114b387f9eSBALATON Zoltan *
124b387f9eSBALATON Zoltan */
134b387f9eSBALATON Zoltan
144b387f9eSBALATON Zoltan #include "qemu/osdep.h"
15ab3dd749SPhilippe Mathieu-Daudé #include "qemu/units.h"
162c65db5eSPaolo Bonzini #include "qemu/datadir.h"
174b387f9eSBALATON Zoltan #include "qemu/error-report.h"
184b387f9eSBALATON Zoltan #include "qapi/error.h"
194b387f9eSBALATON Zoltan #include "hw/boards.h"
204b387f9eSBALATON Zoltan #include "sysemu/kvm.h"
214b387f9eSBALATON Zoltan #include "kvm_ppc.h"
224b387f9eSBALATON Zoltan #include "sysemu/device_tree.h"
234b387f9eSBALATON Zoltan #include "sysemu/block-backend.h"
24*74781c08SPhilippe Mathieu-Daudé #include "exec/page-protection.h"
254b387f9eSBALATON Zoltan #include "hw/loader.h"
264b387f9eSBALATON Zoltan #include "elf.h"
274b387f9eSBALATON Zoltan #include "exec/memory.h"
2872a56a1fSMichael S. Tsirkin #include "ppc440.h"
294d641f36SPhilippe Mathieu-Daudé #include "hw/pci-host/ppc4xx.h"
304b387f9eSBALATON Zoltan #include "hw/block/flash.h"
314b387f9eSBALATON Zoltan #include "sysemu/sysemu.h"
3271e8a915SMarkus Armbruster #include "sysemu/reset.h"
334b387f9eSBALATON Zoltan #include "hw/sysbus.h"
344b387f9eSBALATON Zoltan #include "hw/char/serial.h"
354b387f9eSBALATON Zoltan #include "hw/i2c/ppc4xx_i2c.h"
3693198b6cSCorey Minyard #include "hw/i2c/smbus_eeprom.h"
37d36b2f4eSBALATON Zoltan #include "hw/ide/pci.h"
384b387f9eSBALATON Zoltan #include "hw/usb/hcd-ehci.h"
39ad633de6SDavid Gibson #include "hw/ppc/fdt.h"
40a27bd6c7SMarkus Armbruster #include "hw/qdev-properties.h"
41706e9442SPeter Maydell #include "hw/intc/ppc-uic.h"
424b387f9eSBALATON Zoltan
4343f7868dSGuenter Roeck #include <libfdt.h>
4443f7868dSGuenter Roeck
454b387f9eSBALATON Zoltan #define BINARY_DEVICE_TREE_FILE "canyonlands.dtb"
464b387f9eSBALATON Zoltan #define UBOOT_FILENAME "u-boot-sam460-20100605.bin"
474b387f9eSBALATON Zoltan /* to extract the official U-Boot bin from the updater: */
484b387f9eSBALATON Zoltan /* dd bs=1 skip=$(($(stat -c '%s' updater/updater-460) - 0x80000)) \
494b387f9eSBALATON Zoltan if=updater/updater-460 of=u-boot-sam460-20100605.bin */
504b387f9eSBALATON Zoltan
51340dc03cSBALATON Zoltan #define PCIE0_DCRN_BASE 0x100
52340dc03cSBALATON Zoltan #define PCIE1_DCRN_BASE 0x120
53340dc03cSBALATON Zoltan
544b387f9eSBALATON Zoltan /* from Sam460 U-Boot include/configs/Sam460ex.h */
554b387f9eSBALATON Zoltan #define FLASH_BASE 0xfff00000
564b387f9eSBALATON Zoltan #define FLASH_BASE_H 0x4
57ab3dd749SPhilippe Mathieu-Daudé #define FLASH_SIZE (1 * MiB)
584b387f9eSBALATON Zoltan #define UBOOT_LOAD_BASE 0xfff80000
594b387f9eSBALATON Zoltan #define UBOOT_SIZE 0x00080000
604b387f9eSBALATON Zoltan #define UBOOT_ENTRY 0xfffffffc
614b387f9eSBALATON Zoltan
624b387f9eSBALATON Zoltan /* from U-Boot */
634b387f9eSBALATON Zoltan #define EPAPR_MAGIC (0x45504150)
644b387f9eSBALATON Zoltan #define KERNEL_ADDR 0x1000000
654b387f9eSBALATON Zoltan #define FDT_ADDR 0x1800000
664b387f9eSBALATON Zoltan #define RAMDISK_ADDR 0x1900000
674b387f9eSBALATON Zoltan
684b387f9eSBALATON Zoltan /* Sam460ex IRQ MAP:
694b387f9eSBALATON Zoltan IRQ0 = ETH_INT
704b387f9eSBALATON Zoltan IRQ1 = FPGA_INT
714b387f9eSBALATON Zoltan IRQ2 = PCI_INT (PCIA, PCIB, PCIC, PCIB)
724b387f9eSBALATON Zoltan IRQ3 = FPGA_INT2
734b387f9eSBALATON Zoltan IRQ11 = RTC_INT
744b387f9eSBALATON Zoltan IRQ12 = SM502_INT
754b387f9eSBALATON Zoltan */
764b387f9eSBALATON Zoltan
77f8815532SBALATON Zoltan #define CPU_FREQ 1150000000
7843f7868dSGuenter Roeck #define PLB_FREQ 230000000
7943f7868dSGuenter Roeck #define OPB_FREQ 115000000
8043f7868dSGuenter Roeck #define EBC_FREQ 115000000
8143f7868dSGuenter Roeck #define UART_FREQ 11059200
824b387f9eSBALATON Zoltan
834b387f9eSBALATON Zoltan struct boot_info {
844b387f9eSBALATON Zoltan uint32_t dt_base;
854b387f9eSBALATON Zoltan uint32_t dt_size;
864b387f9eSBALATON Zoltan uint32_t entry;
874b387f9eSBALATON Zoltan };
884b387f9eSBALATON Zoltan
sam460ex_load_uboot(void)894b387f9eSBALATON Zoltan static int sam460ex_load_uboot(void)
904b387f9eSBALATON Zoltan {
91f30bc995SMarkus Armbruster /*
92f30bc995SMarkus Armbruster * This first creates 1MiB of flash memory mapped at the end of
93f30bc995SMarkus Armbruster * the 32-bit address space (0xFFF00000..0xFFFFFFFF).
94f30bc995SMarkus Armbruster *
95f30bc995SMarkus Armbruster * If_PFLASH unit 0 is defined, the flash memory is initialized
96f30bc995SMarkus Armbruster * from that block backend.
97f30bc995SMarkus Armbruster *
98f30bc995SMarkus Armbruster * Else, it's initialized to zero. And then 512KiB of ROM get
99f30bc995SMarkus Armbruster * mapped on top of its second half (0xFFF80000..0xFFFFFFFF),
100f30bc995SMarkus Armbruster * initialized from u-boot-sam460-20100605.bin.
101f30bc995SMarkus Armbruster *
102f30bc995SMarkus Armbruster * This doesn't smell right.
103f30bc995SMarkus Armbruster *
104f30bc995SMarkus Armbruster * The physical hardware appears to have 512KiB flash memory.
105f30bc995SMarkus Armbruster *
106f30bc995SMarkus Armbruster * TODO Figure out what we really need here, and clean this up.
107f30bc995SMarkus Armbruster */
108f30bc995SMarkus Armbruster
1094b387f9eSBALATON Zoltan DriveInfo *dinfo;
1104b387f9eSBALATON Zoltan
1114b387f9eSBALATON Zoltan dinfo = drive_get(IF_PFLASH, 0, 0);
112f30bc995SMarkus Armbruster if (!pflash_cfi01_register(FLASH_BASE | ((hwaddr)FLASH_BASE_H << 32),
113940d5b13SMarkus Armbruster "sam460ex.flash", FLASH_SIZE,
114f30bc995SMarkus Armbruster dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
115ce14710fSMarkus Armbruster 64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1)) {
116371b74e2SMao Zhongyi error_report("Error registering flash memory");
1174b387f9eSBALATON Zoltan /* XXX: return an error instead? */
1184b387f9eSBALATON Zoltan exit(1);
1194b387f9eSBALATON Zoltan }
1204b387f9eSBALATON Zoltan
121f30bc995SMarkus Armbruster if (!dinfo) {
1224b387f9eSBALATON Zoltan /*error_report("No flash image given with the 'pflash' parameter,"
1234b387f9eSBALATON Zoltan " using default u-boot image");*/
124f30bc995SMarkus Armbruster rom_add_file_fixed(UBOOT_FILENAME,
125f30bc995SMarkus Armbruster UBOOT_LOAD_BASE | ((hwaddr)FLASH_BASE_H << 32),
126f30bc995SMarkus Armbruster -1);
1274b387f9eSBALATON Zoltan }
1284b387f9eSBALATON Zoltan
1294b387f9eSBALATON Zoltan return 0;
1304b387f9eSBALATON Zoltan }
1314b387f9eSBALATON Zoltan
sam460ex_load_device_tree(MachineState * machine,hwaddr addr,hwaddr initrd_base,hwaddr initrd_size)132698af4cbSDaniel Henrique Barboza static int sam460ex_load_device_tree(MachineState *machine,
133698af4cbSDaniel Henrique Barboza hwaddr addr,
1344b387f9eSBALATON Zoltan hwaddr initrd_base,
135698af4cbSDaniel Henrique Barboza hwaddr initrd_size)
1364b387f9eSBALATON Zoltan {
137698af4cbSDaniel Henrique Barboza uint32_t mem_reg_property[] = { 0, 0, cpu_to_be32(machine->ram_size) };
1384b387f9eSBALATON Zoltan char *filename;
1394b387f9eSBALATON Zoltan int fdt_size;
1404b387f9eSBALATON Zoltan void *fdt;
141f8815532SBALATON Zoltan uint32_t tb_freq = CPU_FREQ;
142f8815532SBALATON Zoltan uint32_t clock_freq = CPU_FREQ;
14343f7868dSGuenter Roeck int offset;
1444b387f9eSBALATON Zoltan
1454b387f9eSBALATON Zoltan filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
1464b387f9eSBALATON Zoltan if (!filename) {
14751b0d834SDavid Gibson error_report("Couldn't find dtb file `%s'", BINARY_DEVICE_TREE_FILE);
14851b0d834SDavid Gibson exit(1);
1494b387f9eSBALATON Zoltan }
1504b387f9eSBALATON Zoltan fdt = load_device_tree(filename, &fdt_size);
15151b0d834SDavid Gibson if (!fdt) {
15251b0d834SDavid Gibson error_report("Couldn't load dtb file `%s'", filename);
1533cc702d6SBALATON Zoltan g_free(filename);
15451b0d834SDavid Gibson exit(1);
1554b387f9eSBALATON Zoltan }
1563cc702d6SBALATON Zoltan g_free(filename);
1574b387f9eSBALATON Zoltan
1584b387f9eSBALATON Zoltan /* Manipulate device tree in memory. */
1594b387f9eSBALATON Zoltan
160e753f331SDavid Gibson qemu_fdt_setprop(fdt, "/memory", "reg", mem_reg_property,
1614b387f9eSBALATON Zoltan sizeof(mem_reg_property));
1624b387f9eSBALATON Zoltan
1634b387f9eSBALATON Zoltan /* default FDT doesn't have a /chosen node... */
1644b387f9eSBALATON Zoltan qemu_fdt_add_subnode(fdt, "/chosen");
1654b387f9eSBALATON Zoltan
166e753f331SDavid Gibson qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", initrd_base);
1674b387f9eSBALATON Zoltan
168e753f331SDavid Gibson qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
1694b387f9eSBALATON Zoltan (initrd_base + initrd_size));
1704b387f9eSBALATON Zoltan
171698af4cbSDaniel Henrique Barboza qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
172698af4cbSDaniel Henrique Barboza machine->kernel_cmdline);
1734b387f9eSBALATON Zoltan
1744b387f9eSBALATON Zoltan /* Copy data from the host device tree into the guest. Since the guest can
1754b387f9eSBALATON Zoltan * directly access the timebase without host involvement, we must expose
1764b387f9eSBALATON Zoltan * the correct frequencies. */
1774b387f9eSBALATON Zoltan if (kvm_enabled()) {
1784b387f9eSBALATON Zoltan tb_freq = kvmppc_get_tbfreq();
1794b387f9eSBALATON Zoltan clock_freq = kvmppc_get_clockfreq();
1804b387f9eSBALATON Zoltan }
1814b387f9eSBALATON Zoltan
1824b387f9eSBALATON Zoltan qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "clock-frequency",
1834b387f9eSBALATON Zoltan clock_freq);
1844b387f9eSBALATON Zoltan qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "timebase-frequency",
1854b387f9eSBALATON Zoltan tb_freq);
1864b387f9eSBALATON Zoltan
18743f7868dSGuenter Roeck /* Remove cpm node if it exists (it is not emulated) */
18843f7868dSGuenter Roeck offset = fdt_path_offset(fdt, "/cpm");
18943f7868dSGuenter Roeck if (offset >= 0) {
190ad633de6SDavid Gibson _FDT(fdt_nop_node(fdt, offset));
19143f7868dSGuenter Roeck }
19243f7868dSGuenter Roeck
19343f7868dSGuenter Roeck /* set serial port clocks */
19443f7868dSGuenter Roeck offset = fdt_node_offset_by_compatible(fdt, -1, "ns16550");
19543f7868dSGuenter Roeck while (offset >= 0) {
196ad633de6SDavid Gibson _FDT(fdt_setprop_cell(fdt, offset, "clock-frequency", UART_FREQ));
19743f7868dSGuenter Roeck offset = fdt_node_offset_by_compatible(fdt, offset, "ns16550");
19843f7868dSGuenter Roeck }
19943f7868dSGuenter Roeck
20043f7868dSGuenter Roeck /* some more clocks */
20143f7868dSGuenter Roeck qemu_fdt_setprop_cell(fdt, "/plb", "clock-frequency",
20243f7868dSGuenter Roeck PLB_FREQ);
20343f7868dSGuenter Roeck qemu_fdt_setprop_cell(fdt, "/plb/opb", "clock-frequency",
20443f7868dSGuenter Roeck OPB_FREQ);
20543f7868dSGuenter Roeck qemu_fdt_setprop_cell(fdt, "/plb/opb/ebc", "clock-frequency",
20643f7868dSGuenter Roeck EBC_FREQ);
20743f7868dSGuenter Roeck
2084b387f9eSBALATON Zoltan rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
209698af4cbSDaniel Henrique Barboza
210698af4cbSDaniel Henrique Barboza /* Set machine->fdt for 'dumpdtb' QMP/HMP command */
211698af4cbSDaniel Henrique Barboza machine->fdt = fdt;
2124b387f9eSBALATON Zoltan
21351b0d834SDavid Gibson return fdt_size;
2144b387f9eSBALATON Zoltan }
2154b387f9eSBALATON Zoltan
2164b387f9eSBALATON Zoltan /* Create reset TLB entries for BookE, mapping only the flash memory. */
mmubooke_create_initial_mapping_uboot(CPUPPCState * env)2174b387f9eSBALATON Zoltan static void mmubooke_create_initial_mapping_uboot(CPUPPCState *env)
2184b387f9eSBALATON Zoltan {
2194b387f9eSBALATON Zoltan ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
2204b387f9eSBALATON Zoltan
2214b387f9eSBALATON Zoltan /* on reset the flash is mapped by a shadow TLB,
2224b387f9eSBALATON Zoltan * but since we don't implement them we need to use
2234b387f9eSBALATON Zoltan * the same values U-Boot will use to avoid a fault.
2244b387f9eSBALATON Zoltan */
2254b387f9eSBALATON Zoltan tlb->attr = 0;
2264b387f9eSBALATON Zoltan tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
2274b387f9eSBALATON Zoltan tlb->size = 0x10000000; /* up to 0xffffffff */
2284b387f9eSBALATON Zoltan tlb->EPN = 0xf0000000 & TARGET_PAGE_MASK;
2294b387f9eSBALATON Zoltan tlb->RPN = (0xf0000000 & TARGET_PAGE_MASK) | 0x4;
2304b387f9eSBALATON Zoltan tlb->PID = 0;
2314b387f9eSBALATON Zoltan }
2324b387f9eSBALATON Zoltan
2334b387f9eSBALATON Zoltan /* Create reset TLB entries for BookE, spanning the 32bit addr space. */
mmubooke_create_initial_mapping(CPUPPCState * env,target_ulong va,hwaddr pa)2344b387f9eSBALATON Zoltan static void mmubooke_create_initial_mapping(CPUPPCState *env,
2354b387f9eSBALATON Zoltan target_ulong va,
2364b387f9eSBALATON Zoltan hwaddr pa)
2374b387f9eSBALATON Zoltan {
2384b387f9eSBALATON Zoltan ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
2394b387f9eSBALATON Zoltan
2404b387f9eSBALATON Zoltan tlb->attr = 0;
2414b387f9eSBALATON Zoltan tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
2424b387f9eSBALATON Zoltan tlb->size = 1 << 31; /* up to 0x80000000 */
2434b387f9eSBALATON Zoltan tlb->EPN = va & TARGET_PAGE_MASK;
2444b387f9eSBALATON Zoltan tlb->RPN = pa & TARGET_PAGE_MASK;
2454b387f9eSBALATON Zoltan tlb->PID = 0;
2464b387f9eSBALATON Zoltan }
2474b387f9eSBALATON Zoltan
main_cpu_reset(void * opaque)2484b387f9eSBALATON Zoltan static void main_cpu_reset(void *opaque)
2494b387f9eSBALATON Zoltan {
2504b387f9eSBALATON Zoltan PowerPCCPU *cpu = opaque;
2514b387f9eSBALATON Zoltan CPUPPCState *env = &cpu->env;
2524b387f9eSBALATON Zoltan struct boot_info *bi = env->load_info;
2534b387f9eSBALATON Zoltan
2544b387f9eSBALATON Zoltan cpu_reset(CPU(cpu));
2554b387f9eSBALATON Zoltan
2564b387f9eSBALATON Zoltan /* either we have a kernel to boot or we jump to U-Boot */
2574b387f9eSBALATON Zoltan if (bi->entry != UBOOT_ENTRY) {
258ab3dd749SPhilippe Mathieu-Daudé env->gpr[1] = (16 * MiB) - 8;
2594b387f9eSBALATON Zoltan env->gpr[3] = FDT_ADDR;
2604b387f9eSBALATON Zoltan env->nip = bi->entry;
2614b387f9eSBALATON Zoltan
2624b387f9eSBALATON Zoltan /* Create a mapping for the kernel. */
2634b387f9eSBALATON Zoltan mmubooke_create_initial_mapping(env, 0, 0);
2644b387f9eSBALATON Zoltan env->gpr[6] = tswap32(EPAPR_MAGIC);
265ab3dd749SPhilippe Mathieu-Daudé env->gpr[7] = (16 * MiB) - 8; /* bi->ima_size; */
2664b387f9eSBALATON Zoltan
2674b387f9eSBALATON Zoltan } else {
2684b387f9eSBALATON Zoltan env->nip = UBOOT_ENTRY;
2694b387f9eSBALATON Zoltan mmubooke_create_initial_mapping_uboot(env);
2704b387f9eSBALATON Zoltan }
2714b387f9eSBALATON Zoltan }
2724b387f9eSBALATON Zoltan
sam460ex_init(MachineState * machine)2734b387f9eSBALATON Zoltan static void sam460ex_init(MachineState *machine)
2744b387f9eSBALATON Zoltan {
2754b387f9eSBALATON Zoltan MemoryRegion *l2cache_ram = g_new(MemoryRegion, 1);
276706e9442SPeter Maydell DeviceState *uic[4];
277706e9442SPeter Maydell int i;
2784b387f9eSBALATON Zoltan PCIBus *pci_bus;
2793ab78f3dSPaolo Bonzini USBBus *usb_bus;
2804b387f9eSBALATON Zoltan PowerPCCPU *cpu;
2814b387f9eSBALATON Zoltan CPUPPCState *env;
28208fd9917SBALATON Zoltan I2CBus *i2c;
2834b387f9eSBALATON Zoltan hwaddr entry = UBOOT_ENTRY;
2844b387f9eSBALATON Zoltan target_long initrd_size = 0;
2854b387f9eSBALATON Zoltan DeviceState *dev;
2864b387f9eSBALATON Zoltan SysBusDevice *sbdev;
2874b387f9eSBALATON Zoltan struct boot_info *boot_info;
28808fd9917SBALATON Zoltan uint8_t *spd_data;
28908fd9917SBALATON Zoltan int success;
2904b387f9eSBALATON Zoltan
2914b387f9eSBALATON Zoltan cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
2924b387f9eSBALATON Zoltan env = &cpu->env;
2934b387f9eSBALATON Zoltan if (env->mmu_model != POWERPC_MMU_BOOKE) {
2944b387f9eSBALATON Zoltan error_report("Only MMU model BookE is supported by this machine.");
2954b387f9eSBALATON Zoltan exit(1);
2964b387f9eSBALATON Zoltan }
2974b387f9eSBALATON Zoltan
2984b387f9eSBALATON Zoltan qemu_register_reset(main_cpu_reset, cpu);
2994b387f9eSBALATON Zoltan boot_info = g_malloc0(sizeof(*boot_info));
3004b387f9eSBALATON Zoltan env->load_info = boot_info;
3014b387f9eSBALATON Zoltan
302f8815532SBALATON Zoltan ppc_booke_timers_init(cpu, CPU_FREQ, 0);
3034b387f9eSBALATON Zoltan ppc_dcr_init(env, NULL, NULL);
3044b387f9eSBALATON Zoltan
3054b387f9eSBALATON Zoltan /* PLB arbitrer */
306052c779bSBALATON Zoltan dev = qdev_new(TYPE_PPC4xx_PLB);
307695bce07SCédric Le Goater ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev), cpu, &error_fatal);
308695bce07SCédric Le Goater object_unref(OBJECT(dev));
3094b387f9eSBALATON Zoltan
3104b387f9eSBALATON Zoltan /* interrupt controllers */
311706e9442SPeter Maydell for (i = 0; i < ARRAY_SIZE(uic); i++) {
312706e9442SPeter Maydell /*
313706e9442SPeter Maydell * UICs 1, 2 and 3 are cascaded through UIC 0.
314706e9442SPeter Maydell * input_ints[n] is the interrupt number on UIC 0 which
315706e9442SPeter Maydell * the INT output of UIC n is connected to. The CINT output
316706e9442SPeter Maydell * of UIC n connects to input_ints[n] + 1.
317706e9442SPeter Maydell * The entry in input_ints[] for UIC 0 is ignored, because UIC 0's
318706e9442SPeter Maydell * INT and CINT outputs are connected to the CPU.
319706e9442SPeter Maydell */
320706e9442SPeter Maydell const int input_ints[] = { -1, 30, 10, 16 };
321706e9442SPeter Maydell
322706e9442SPeter Maydell uic[i] = qdev_new(TYPE_PPC_UIC);
323706e9442SPeter Maydell qdev_prop_set_uint32(uic[i], "dcr-base", 0xc0 + i * 0x10);
324a55b2136SBALATON Zoltan ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uic[i]), cpu, &error_fatal);
325a55b2136SBALATON Zoltan object_unref(OBJECT(uic[i]));
326706e9442SPeter Maydell
327a55b2136SBALATON Zoltan sbdev = SYS_BUS_DEVICE(uic[i]);
328706e9442SPeter Maydell if (i == 0) {
329a55b2136SBALATON Zoltan sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_INT,
33047b60fc6SCédric Le Goater qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
331a55b2136SBALATON Zoltan sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_CINT,
33247b60fc6SCédric Le Goater qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT));
333706e9442SPeter Maydell } else {
334a55b2136SBALATON Zoltan sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_INT,
335706e9442SPeter Maydell qdev_get_gpio_in(uic[0], input_ints[i]));
336a55b2136SBALATON Zoltan sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_CINT,
337706e9442SPeter Maydell qdev_get_gpio_in(uic[0], input_ints[i] + 1));
338706e9442SPeter Maydell }
339706e9442SPeter Maydell }
3404b387f9eSBALATON Zoltan
3414b387f9eSBALATON Zoltan /* SDRAM controller */
342ef10aebbSBALATON Zoltan /* The SoC could also handle 4 GiB but firmware does not work with that. */
343ef10aebbSBALATON Zoltan if (machine->ram_size > 2 * GiB) {
344ef10aebbSBALATON Zoltan error_report("Memory over 2 GiB is not supported");
345ef10aebbSBALATON Zoltan exit(1);
346ef10aebbSBALATON Zoltan }
347ef10aebbSBALATON Zoltan /* Firmware needs at least 64 MiB */
348ef10aebbSBALATON Zoltan if (machine->ram_size < 64 * MiB) {
349ef10aebbSBALATON Zoltan error_report("Memory below 64 MiB is not supported");
350ef10aebbSBALATON Zoltan exit(1);
351ef10aebbSBALATON Zoltan }
3525f7effe4SBALATON Zoltan dev = qdev_new(TYPE_PPC4xx_SDRAM_DDR2);
3535f7effe4SBALATON Zoltan object_property_set_link(OBJECT(dev), "dram", OBJECT(machine->ram),
3545f7effe4SBALATON Zoltan &error_abort);
355ef10aebbSBALATON Zoltan /*
356ef10aebbSBALATON Zoltan * Put all RAM on first bank because board has one slot
357ef10aebbSBALATON Zoltan * and firmware only checks that
358ef10aebbSBALATON Zoltan */
3595f7effe4SBALATON Zoltan object_property_set_int(OBJECT(dev), "nbanks", 1, &error_abort);
3605f7effe4SBALATON Zoltan ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev), cpu, &error_fatal);
3615f7effe4SBALATON Zoltan object_unref(OBJECT(dev));
3624b387f9eSBALATON Zoltan /* FIXME: does 460EX have ECC interrupts? */
36303f7041bSBALATON Zoltan /* Enable SDRAM memory regions as we may boot without firmware */
3645f7effe4SBALATON Zoltan ppc4xx_sdram_ddr2_enable(PPC4xx_SDRAM_DDR2(dev));
3654b387f9eSBALATON Zoltan
36608fd9917SBALATON Zoltan /* IIC controllers and devices */
367706e9442SPeter Maydell dev = sysbus_create_simple(TYPE_PPC4xx_I2C, 0x4ef600700,
368706e9442SPeter Maydell qdev_get_gpio_in(uic[0], 2));
36908fd9917SBALATON Zoltan i2c = PPC4xx_I2C(dev)->bus;
37008fd9917SBALATON Zoltan /* SPD EEPROM on RAM module */
371ef10aebbSBALATON Zoltan spd_data = spd_data_generate(machine->ram_size < 128 * MiB ? DDR : DDR2,
372ef10aebbSBALATON Zoltan machine->ram_size);
37308fd9917SBALATON Zoltan spd_data[20] = 4; /* SO-DIMM module */
37408fd9917SBALATON Zoltan smbus_eeprom_init_one(i2c, 0x50, spd_data);
37508fd9917SBALATON Zoltan /* RTC */
3761373b15bSPhilippe Mathieu-Daudé i2c_slave_create_simple(i2c, "m41t80", 0x68);
3774b387f9eSBALATON Zoltan
378706e9442SPeter Maydell dev = sysbus_create_simple(TYPE_PPC4xx_I2C, 0x4ef600800,
379706e9442SPeter Maydell qdev_get_gpio_in(uic[0], 3));
3804b387f9eSBALATON Zoltan
3814b387f9eSBALATON Zoltan /* External bus controller */
382cba58aa7SBALATON Zoltan dev = qdev_new(TYPE_PPC4xx_EBC);
383415a6333SCédric Le Goater ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev), cpu, &error_fatal);
384415a6333SCédric Le Goater object_unref(OBJECT(dev));
3854b387f9eSBALATON Zoltan
3864b387f9eSBALATON Zoltan /* CPR */
3874b387f9eSBALATON Zoltan ppc4xx_cpr_init(env);
3884b387f9eSBALATON Zoltan
3894b387f9eSBALATON Zoltan /* PLB to AHB bridge */
3904b387f9eSBALATON Zoltan ppc4xx_ahb_init(env);
3914b387f9eSBALATON Zoltan
3924b387f9eSBALATON Zoltan /* System DCRs */
3934b387f9eSBALATON Zoltan ppc4xx_sdr_init(env);
3944b387f9eSBALATON Zoltan
3954b387f9eSBALATON Zoltan /* MAL */
396da116a8aSCédric Le Goater dev = qdev_new(TYPE_PPC4xx_MAL);
39707b29eb3SPhilippe Mathieu-Daudé qdev_prop_set_uint8(dev, "txc-num", 4);
39807b29eb3SPhilippe Mathieu-Daudé qdev_prop_set_uint8(dev, "rxc-num", 16);
399da116a8aSCédric Le Goater ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev), cpu, &error_fatal);
400da116a8aSCédric Le Goater object_unref(OBJECT(dev));
401da116a8aSCédric Le Goater sbdev = SYS_BUS_DEVICE(dev);
402da116a8aSCédric Le Goater for (i = 0; i < ARRAY_SIZE(PPC4xx_MAL(dev)->irqs); i++) {
403da116a8aSCédric Le Goater sysbus_connect_irq(sbdev, i, qdev_get_gpio_in(uic[2], 3 + i));
404706e9442SPeter Maydell }
4054b387f9eSBALATON Zoltan
4063c409c19SBALATON Zoltan /* DMA */
4073c409c19SBALATON Zoltan ppc4xx_dma_init(env, 0x200);
4083c409c19SBALATON Zoltan
4094b387f9eSBALATON Zoltan /* 256K of L2 cache as memory */
4104b387f9eSBALATON Zoltan ppc4xx_l2sram_init(env);
4114b387f9eSBALATON Zoltan /* FIXME: remove this after fixing l2sram mapping in ppc440_uc.c? */
412ab3dd749SPhilippe Mathieu-Daudé memory_region_init_ram(l2cache_ram, NULL, "ppc440.l2cache_ram", 256 * KiB,
4134b387f9eSBALATON Zoltan &error_abort);
41441cd3e64SBALATON Zoltan memory_region_add_subregion(get_system_memory(), 0x400000000LL,
41541cd3e64SBALATON Zoltan l2cache_ram);
4164b387f9eSBALATON Zoltan
4174b387f9eSBALATON Zoltan /* USB */
418706e9442SPeter Maydell sysbus_create_simple(TYPE_PPC4xx_EHCI, 0x4bffd0400,
419706e9442SPeter Maydell qdev_get_gpio_in(uic[2], 29));
4203e80f690SMarkus Armbruster dev = qdev_new("sysbus-ohci");
4214b387f9eSBALATON Zoltan qdev_prop_set_string(dev, "masterbus", "usb-bus.0");
4224b387f9eSBALATON Zoltan qdev_prop_set_uint32(dev, "num-ports", 6);
4234b387f9eSBALATON Zoltan sbdev = SYS_BUS_DEVICE(dev);
4243c6ef471SMarkus Armbruster sysbus_realize_and_unref(sbdev, &error_fatal);
4254b387f9eSBALATON Zoltan sysbus_mmio_map(sbdev, 0, 0x4bffd0000);
426706e9442SPeter Maydell sysbus_connect_irq(sbdev, 0, qdev_get_gpio_in(uic[2], 30));
4273ab78f3dSPaolo Bonzini usb_bus = USB_BUS(object_resolve_type_unambiguous(TYPE_USB_BUS,
4283ab78f3dSPaolo Bonzini &error_abort));
4293ab78f3dSPaolo Bonzini usb_create_simple(usb_bus, "usb-kbd");
4303ab78f3dSPaolo Bonzini usb_create_simple(usb_bus, "usb-mouse");
4314b387f9eSBALATON Zoltan
432340dc03cSBALATON Zoltan /* PCIe buses */
433340dc03cSBALATON Zoltan dev = qdev_new(TYPE_PPC460EX_PCIE_HOST);
434340dc03cSBALATON Zoltan qdev_prop_set_int32(dev, "busnum", 0);
435340dc03cSBALATON Zoltan qdev_prop_set_int32(dev, "dcrn-base", PCIE0_DCRN_BASE);
436340dc03cSBALATON Zoltan object_property_set_link(OBJECT(dev), "cpu", OBJECT(cpu), &error_abort);
437340dc03cSBALATON Zoltan sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
438340dc03cSBALATON Zoltan
439340dc03cSBALATON Zoltan dev = qdev_new(TYPE_PPC460EX_PCIE_HOST);
440340dc03cSBALATON Zoltan qdev_prop_set_int32(dev, "busnum", 1);
441340dc03cSBALATON Zoltan qdev_prop_set_int32(dev, "dcrn-base", PCIE1_DCRN_BASE);
442340dc03cSBALATON Zoltan object_property_set_link(OBJECT(dev), "cpu", OBJECT(cpu), &error_abort);
443340dc03cSBALATON Zoltan sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
444340dc03cSBALATON Zoltan
4454b387f9eSBALATON Zoltan /* PCI bus */
4466484ab3dSBALATON Zoltan /* All PCI irqs are connected to the same UIC pin (cf. UBoot source) */
4475efa7545SBALATON Zoltan dev = sysbus_create_simple(TYPE_PPC440_PCIX_HOST, 0xc0ec00000,
448706e9442SPeter Maydell qdev_get_gpio_in(uic[1], 0));
449dd0f356dSBALATON Zoltan sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, 0xc08000000);
450f17969dbSBALATON Zoltan pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci.0"));
451f17969dbSBALATON Zoltan
4524b387f9eSBALATON Zoltan /* PCI devices */
4534b387f9eSBALATON Zoltan pci_create_simple(pci_bus, PCI_DEVFN(6, 0), "sm501");
454d36b2f4eSBALATON Zoltan /*
455d36b2f4eSBALATON Zoltan * SoC has a single SATA port but we don't emulate that
4564b387f9eSBALATON Zoltan * However, firmware and usual clients have driver for SiI311x
457d36b2f4eSBALATON Zoltan * PCI SATA card so add one for convenience by default
458d36b2f4eSBALATON Zoltan */
4594b387f9eSBALATON Zoltan if (defaults_enabled()) {
460d36b2f4eSBALATON Zoltan PCIIDEState *s = PCI_IDE(pci_create_simple(pci_bus, -1, "sii3112"));
461d36b2f4eSBALATON Zoltan DriveInfo *di;
462d36b2f4eSBALATON Zoltan
463d36b2f4eSBALATON Zoltan di = drive_get_by_index(IF_IDE, 0);
464d36b2f4eSBALATON Zoltan if (di) {
465d36b2f4eSBALATON Zoltan ide_bus_create_drive(&s->bus[0], 0, di);
466d36b2f4eSBALATON Zoltan }
467d36b2f4eSBALATON Zoltan /* Use index 2 only if 1 does not exist, this allows -cdrom */
468d36b2f4eSBALATON Zoltan di = drive_get_by_index(IF_IDE, 1) ?: drive_get_by_index(IF_IDE, 2);
469d36b2f4eSBALATON Zoltan if (di) {
470d36b2f4eSBALATON Zoltan ide_bus_create_drive(&s->bus[1], 0, di);
471d36b2f4eSBALATON Zoltan }
4724b387f9eSBALATON Zoltan }
4734b387f9eSBALATON Zoltan
474d36b2f4eSBALATON Zoltan /* SoC has 4 UARTs but board has only one wired and two described in fdt */
4759bca0edbSPeter Maydell if (serial_hd(0) != NULL) {
47641cd3e64SBALATON Zoltan serial_mm_init(get_system_memory(), 0x4ef600300, 0,
477706e9442SPeter Maydell qdev_get_gpio_in(uic[1], 1),
4789bca0edbSPeter Maydell PPC_SERIAL_MM_BAUDBASE, serial_hd(0),
4794b387f9eSBALATON Zoltan DEVICE_BIG_ENDIAN);
4804b387f9eSBALATON Zoltan }
4819bca0edbSPeter Maydell if (serial_hd(1) != NULL) {
48241cd3e64SBALATON Zoltan serial_mm_init(get_system_memory(), 0x4ef600400, 0,
483706e9442SPeter Maydell qdev_get_gpio_in(uic[0], 1),
4849bca0edbSPeter Maydell PPC_SERIAL_MM_BAUDBASE, serial_hd(1),
4854b387f9eSBALATON Zoltan DEVICE_BIG_ENDIAN);
4864b387f9eSBALATON Zoltan }
4874b387f9eSBALATON Zoltan
4884b387f9eSBALATON Zoltan /* Load U-Boot image. */
4894b387f9eSBALATON Zoltan if (!machine->kernel_filename) {
4904b387f9eSBALATON Zoltan success = sam460ex_load_uboot();
4914b387f9eSBALATON Zoltan if (success < 0) {
492371b74e2SMao Zhongyi error_report("could not load firmware");
4934b387f9eSBALATON Zoltan exit(1);
4944b387f9eSBALATON Zoltan }
4954b387f9eSBALATON Zoltan }
4964b387f9eSBALATON Zoltan
4974b387f9eSBALATON Zoltan /* Load kernel. */
4984b387f9eSBALATON Zoltan if (machine->kernel_filename) {
499617160c9SBALATON Zoltan hwaddr loadaddr = LOAD_UIMAGE_LOADADDR_INVALID;
5004b387f9eSBALATON Zoltan success = load_uimage(machine->kernel_filename, &entry, &loadaddr,
5014b387f9eSBALATON Zoltan NULL, NULL, NULL);
5024b387f9eSBALATON Zoltan if (success < 0) {
503617160c9SBALATON Zoltan uint64_t elf_entry;
5044b387f9eSBALATON Zoltan
505617160c9SBALATON Zoltan success = load_elf(machine->kernel_filename, NULL, NULL, NULL,
506617160c9SBALATON Zoltan &elf_entry, NULL, NULL, NULL,
507617160c9SBALATON Zoltan 1, PPC_ELF_MACHINE, 0, 0);
5084b387f9eSBALATON Zoltan entry = elf_entry;
5094b387f9eSBALATON Zoltan }
5104b387f9eSBALATON Zoltan /* XXX try again as binary */
5114b387f9eSBALATON Zoltan if (success < 0) {
512371b74e2SMao Zhongyi error_report("could not load kernel '%s'",
5134b387f9eSBALATON Zoltan machine->kernel_filename);
5144b387f9eSBALATON Zoltan exit(1);
5154b387f9eSBALATON Zoltan }
5164b387f9eSBALATON Zoltan }
5174b387f9eSBALATON Zoltan
5184b387f9eSBALATON Zoltan /* Load initrd. */
5194b387f9eSBALATON Zoltan if (machine->initrd_filename) {
5204b387f9eSBALATON Zoltan initrd_size = load_image_targphys(machine->initrd_filename,
5214b387f9eSBALATON Zoltan RAMDISK_ADDR,
5224b387f9eSBALATON Zoltan machine->ram_size - RAMDISK_ADDR);
5234b387f9eSBALATON Zoltan if (initrd_size < 0) {
524371b74e2SMao Zhongyi error_report("could not load ram disk '%s' at %x",
5254b387f9eSBALATON Zoltan machine->initrd_filename, RAMDISK_ADDR);
5264b387f9eSBALATON Zoltan exit(1);
5274b387f9eSBALATON Zoltan }
5284b387f9eSBALATON Zoltan }
5294b387f9eSBALATON Zoltan
5304b387f9eSBALATON Zoltan /* If we're loading a kernel directly, we must load the device tree too. */
5314b387f9eSBALATON Zoltan if (machine->kernel_filename) {
5324b387f9eSBALATON Zoltan int dt_size;
5334b387f9eSBALATON Zoltan
534698af4cbSDaniel Henrique Barboza dt_size = sam460ex_load_device_tree(machine, FDT_ADDR,
535698af4cbSDaniel Henrique Barboza RAMDISK_ADDR, initrd_size);
5364b387f9eSBALATON Zoltan
5374b387f9eSBALATON Zoltan boot_info->dt_base = FDT_ADDR;
5384b387f9eSBALATON Zoltan boot_info->dt_size = dt_size;
5394b387f9eSBALATON Zoltan }
5404b387f9eSBALATON Zoltan
5414b387f9eSBALATON Zoltan boot_info->entry = entry;
5424b387f9eSBALATON Zoltan }
5434b387f9eSBALATON Zoltan
sam460ex_machine_init(MachineClass * mc)5444b387f9eSBALATON Zoltan static void sam460ex_machine_init(MachineClass *mc)
5454b387f9eSBALATON Zoltan {
5464b387f9eSBALATON Zoltan mc->desc = "aCube Sam460ex";
5474b387f9eSBALATON Zoltan mc->init = sam460ex_init;
548d36b2f4eSBALATON Zoltan mc->block_default_type = IF_IDE;
5494b387f9eSBALATON Zoltan mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("460exb");
550d23b6caaSPhilippe Mathieu-Daudé mc->default_ram_size = 512 * MiB;
551b28f0188SIgor Mammedov mc->default_ram_id = "ppc4xx.sdram";
5524b387f9eSBALATON Zoltan }
5534b387f9eSBALATON Zoltan
5544b387f9eSBALATON Zoltan DEFINE_MACHINE("sam460ex", sam460ex_machine_init)
555