1 /* 2 * QEMU PowerPC 440 Bamboo board emulation 3 * 4 * Copyright 2007 IBM Corporation. 5 * Authors: 6 * Jerone Young <jyoung5@us.ibm.com> 7 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 8 * Hollis Blanchard <hollisb@us.ibm.com> 9 * 10 * This work is licensed under the GNU GPL license version 2 or later. 11 * 12 */ 13 14 #include "qemu/osdep.h" 15 #include "qemu/units.h" 16 #include "qemu/datadir.h" 17 #include "qemu/error-report.h" 18 #include "net/net.h" 19 #include "hw/pci/pci.h" 20 #include "hw/boards.h" 21 #include "sysemu/kvm.h" 22 #include "sysemu/device_tree.h" 23 #include "hw/loader.h" 24 #include "elf.h" 25 #include "hw/char/serial.h" 26 #include "hw/ppc/ppc.h" 27 #include "sysemu/sysemu.h" 28 #include "sysemu/reset.h" 29 #include "hw/sysbus.h" 30 #include "hw/intc/ppc-uic.h" 31 #include "hw/qdev-properties.h" 32 #include "qapi/error.h" 33 34 #include <libfdt.h> 35 36 #define BINARY_DEVICE_TREE_FILE "bamboo.dtb" 37 38 /* from u-boot */ 39 #define KERNEL_ADDR 0x1000000 40 #define FDT_ADDR 0x1800000 41 #define RAMDISK_ADDR 0x1900000 42 43 #define PPC440EP_PCI_CONFIG 0xeec00000 44 #define PPC440EP_PCI_INTACK 0xeed00000 45 #define PPC440EP_PCI_SPECIAL 0xeed00000 46 #define PPC440EP_PCI_REGS 0xef400000 47 #define PPC440EP_PCI_IO 0xe8000000 48 #define PPC440EP_PCI_IOLEN 0x00010000 49 50 static hwaddr entry; 51 52 static int bamboo_load_device_tree(MachineState *machine, 53 hwaddr addr, 54 hwaddr initrd_base, 55 hwaddr initrd_size) 56 { 57 int ret = -1; 58 uint32_t mem_reg_property[] = { 0, 0, cpu_to_be32(machine->ram_size) }; 59 char *filename; 60 int fdt_size; 61 void *fdt; 62 uint32_t tb_freq = 400000000; 63 uint32_t clock_freq = 400000000; 64 65 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE); 66 if (!filename) { 67 return -1; 68 } 69 fdt = load_device_tree(filename, &fdt_size); 70 g_free(filename); 71 if (fdt == NULL) { 72 return -1; 73 } 74 75 /* Manipulate device tree in memory. */ 76 77 ret = qemu_fdt_setprop(fdt, "/memory", "reg", mem_reg_property, 78 sizeof(mem_reg_property)); 79 if (ret < 0) { 80 fprintf(stderr, "couldn't set /memory/reg\n"); 81 } 82 ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", 83 initrd_base); 84 if (ret < 0) { 85 fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n"); 86 } 87 ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", 88 (initrd_base + initrd_size)); 89 if (ret < 0) { 90 fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n"); 91 } 92 ret = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", 93 machine->kernel_cmdline); 94 if (ret < 0) { 95 fprintf(stderr, "couldn't set /chosen/bootargs\n"); 96 } 97 98 qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "clock-frequency", 99 clock_freq); 100 qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "timebase-frequency", 101 tb_freq); 102 103 rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr); 104 105 /* Set ms->fdt for 'dumpdtb' QMP/HMP command */ 106 machine->fdt = fdt; 107 108 return 0; 109 } 110 111 /* Create reset TLB entries for BookE, spanning the 32bit addr space. */ 112 static void mmubooke_create_initial_mapping(CPUPPCState *env, 113 target_ulong va, 114 hwaddr pa) 115 { 116 ppcemb_tlb_t *tlb = &env->tlb.tlbe[0]; 117 118 tlb->attr = 0; 119 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); 120 tlb->size = 1U << 31; /* up to 0x80000000 */ 121 tlb->EPN = va & TARGET_PAGE_MASK; 122 tlb->RPN = pa & TARGET_PAGE_MASK; 123 tlb->PID = 0; 124 125 tlb = &env->tlb.tlbe[1]; 126 tlb->attr = 0; 127 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); 128 tlb->size = 1U << 31; /* up to 0xffffffff */ 129 tlb->EPN = 0x80000000 & TARGET_PAGE_MASK; 130 tlb->RPN = 0x80000000 & TARGET_PAGE_MASK; 131 tlb->PID = 0; 132 } 133 134 static void main_cpu_reset(void *opaque) 135 { 136 PowerPCCPU *cpu = opaque; 137 CPUPPCState *env = &cpu->env; 138 139 cpu_reset(CPU(cpu)); 140 env->gpr[1] = (16 * MiB) - 8; 141 env->gpr[3] = FDT_ADDR; 142 env->nip = entry; 143 144 /* Create a mapping for the kernel. */ 145 mmubooke_create_initial_mapping(env, 0, 0); 146 } 147 148 static void bamboo_init(MachineState *machine) 149 { 150 const char *kernel_filename = machine->kernel_filename; 151 const char *initrd_filename = machine->initrd_filename; 152 MachineClass *mc = MACHINE_GET_CLASS(machine); 153 unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 }; 154 MemoryRegion *address_space_mem = get_system_memory(); 155 MemoryRegion *isa = g_new(MemoryRegion, 1); 156 PCIBus *pcibus; 157 PowerPCCPU *cpu; 158 CPUPPCState *env; 159 target_long initrd_size = 0; 160 DeviceState *dev; 161 DeviceState *uicdev; 162 SysBusDevice *uicsbd; 163 int success; 164 165 if (kvm_enabled()) { 166 error_report("machine %s does not support the KVM accelerator", 167 MACHINE_GET_CLASS(machine)->name); 168 exit(EXIT_FAILURE); 169 } 170 171 cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); 172 env = &cpu->env; 173 174 if (env->mmu_model != POWERPC_MMU_BOOKE) { 175 error_report("MMU model %i not supported by this machine", 176 env->mmu_model); 177 exit(1); 178 } 179 180 qemu_register_reset(main_cpu_reset, cpu); 181 ppc_booke_timers_init(cpu, 400000000, 0); 182 ppc_dcr_init(env, NULL, NULL); 183 184 /* interrupt controller */ 185 uicdev = qdev_new(TYPE_PPC_UIC); 186 ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uicdev), cpu, &error_fatal); 187 object_unref(OBJECT(uicdev)); 188 uicsbd = SYS_BUS_DEVICE(uicdev); 189 sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT, 190 qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT)); 191 sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT, 192 qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT)); 193 194 /* SDRAM controller */ 195 dev = qdev_new(TYPE_PPC4xx_SDRAM_DDR); 196 object_property_set_link(OBJECT(dev), "dram", OBJECT(machine->ram), 197 &error_abort); 198 ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev), cpu, &error_fatal); 199 object_unref(OBJECT(dev)); 200 /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */ 201 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(uicdev, 14)); 202 /* Enable SDRAM memory regions, this should be done by the firmware */ 203 ppc4xx_sdram_ddr_enable(PPC4xx_SDRAM_DDR(dev)); 204 205 /* PCI */ 206 dev = sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST, PPC440EP_PCI_CONFIG, 207 qdev_get_gpio_in(uicdev, pci_irq_nrs[0]), 208 qdev_get_gpio_in(uicdev, pci_irq_nrs[1]), 209 qdev_get_gpio_in(uicdev, pci_irq_nrs[2]), 210 qdev_get_gpio_in(uicdev, pci_irq_nrs[3]), 211 NULL); 212 pcibus = (PCIBus *)qdev_get_child_bus(dev, "pci.0"); 213 if (!pcibus) { 214 error_report("couldn't create PCI controller"); 215 exit(1); 216 } 217 218 memory_region_init_alias(isa, NULL, "isa_mmio", 219 get_system_io(), 0, PPC440EP_PCI_IOLEN); 220 memory_region_add_subregion(get_system_memory(), PPC440EP_PCI_IO, isa); 221 222 if (serial_hd(0) != NULL) { 223 serial_mm_init(address_space_mem, 0xef600300, 0, 224 qdev_get_gpio_in(uicdev, 0), 225 PPC_SERIAL_MM_BAUDBASE, serial_hd(0), 226 DEVICE_BIG_ENDIAN); 227 } 228 if (serial_hd(1) != NULL) { 229 serial_mm_init(address_space_mem, 0xef600400, 0, 230 qdev_get_gpio_in(uicdev, 1), 231 PPC_SERIAL_MM_BAUDBASE, serial_hd(1), 232 DEVICE_BIG_ENDIAN); 233 } 234 235 if (pcibus) { 236 /* 237 * There are no PCI NICs on the Bamboo board, but there are 238 * PCI slots, so we can pick whatever default model we want. 239 */ 240 pci_init_nic_devices(pcibus, mc->default_nic); 241 } 242 243 /* Load kernel. */ 244 if (kernel_filename) { 245 hwaddr loadaddr = LOAD_UIMAGE_LOADADDR_INVALID; 246 success = load_uimage(kernel_filename, &entry, &loadaddr, NULL, 247 NULL, NULL); 248 if (success < 0) { 249 uint64_t elf_entry; 250 success = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, 251 NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); 252 entry = elf_entry; 253 } 254 /* XXX try again as binary */ 255 if (success < 0) { 256 error_report("could not load kernel '%s'", kernel_filename); 257 exit(1); 258 } 259 } 260 261 /* Load initrd. */ 262 if (initrd_filename) { 263 initrd_size = load_image_targphys(initrd_filename, RAMDISK_ADDR, 264 machine->ram_size - RAMDISK_ADDR); 265 266 if (initrd_size < 0) { 267 error_report("could not load ram disk '%s' at %x", 268 initrd_filename, RAMDISK_ADDR); 269 exit(1); 270 } 271 } 272 273 /* If we're loading a kernel directly, we must load the device tree too. */ 274 if (kernel_filename) { 275 if (bamboo_load_device_tree(machine, FDT_ADDR, 276 RAMDISK_ADDR, initrd_size) < 0) { 277 error_report("couldn't load device tree"); 278 exit(1); 279 } 280 } 281 } 282 283 static void bamboo_machine_init(MachineClass *mc) 284 { 285 mc->desc = "bamboo"; 286 mc->init = bamboo_init; 287 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440epb"); 288 mc->default_ram_id = "ppc4xx.sdram"; 289 mc->default_nic = "e1000"; 290 } 291 292 DEFINE_MACHINE("bamboo", bamboo_machine_init) 293