xref: /openbmc/qemu/hw/ppc/ppc440_bamboo.c (revision 44b1ff31)
1 /*
2  * QEMU PowerPC 440 Bamboo board emulation
3  *
4  * Copyright 2007 IBM Corporation.
5  * Authors:
6  *	Jerone Young <jyoung5@us.ibm.com>
7  *	Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
8  *	Hollis Blanchard <hollisb@us.ibm.com>
9  *
10  * This work is licensed under the GNU GPL license version 2 or later.
11  *
12  */
13 
14 #include "qemu/osdep.h"
15 #include "qemu-common.h"
16 #include "net/net.h"
17 #include "hw/hw.h"
18 #include "hw/pci/pci.h"
19 #include "hw/boards.h"
20 #include "sysemu/kvm.h"
21 #include "kvm_ppc.h"
22 #include "sysemu/device_tree.h"
23 #include "hw/loader.h"
24 #include "elf.h"
25 #include "exec/address-spaces.h"
26 #include "hw/char/serial.h"
27 #include "hw/ppc/ppc.h"
28 #include "ppc405.h"
29 #include "sysemu/sysemu.h"
30 #include "hw/sysbus.h"
31 
32 #define BINARY_DEVICE_TREE_FILE "bamboo.dtb"
33 
34 /* from u-boot */
35 #define KERNEL_ADDR  0x1000000
36 #define FDT_ADDR     0x1800000
37 #define RAMDISK_ADDR 0x1900000
38 
39 #define PPC440EP_PCI_CONFIG     0xeec00000
40 #define PPC440EP_PCI_INTACK     0xeed00000
41 #define PPC440EP_PCI_SPECIAL    0xeed00000
42 #define PPC440EP_PCI_REGS       0xef400000
43 #define PPC440EP_PCI_IO         0xe8000000
44 #define PPC440EP_PCI_IOLEN      0x00010000
45 
46 #define PPC440EP_SDRAM_NR_BANKS 4
47 
48 static const unsigned int ppc440ep_sdram_bank_sizes[] = {
49     256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0
50 };
51 
52 static hwaddr entry;
53 
54 static int bamboo_load_device_tree(hwaddr addr,
55                                      uint32_t ramsize,
56                                      hwaddr initrd_base,
57                                      hwaddr initrd_size,
58                                      const char *kernel_cmdline)
59 {
60     int ret = -1;
61     uint32_t mem_reg_property[] = { 0, 0, cpu_to_be32(ramsize) };
62     char *filename;
63     int fdt_size;
64     void *fdt;
65     uint32_t tb_freq = 400000000;
66     uint32_t clock_freq = 400000000;
67 
68     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
69     if (!filename) {
70         goto out;
71     }
72     fdt = load_device_tree(filename, &fdt_size);
73     g_free(filename);
74     if (fdt == NULL) {
75         goto out;
76     }
77 
78     /* Manipulate device tree in memory. */
79 
80     ret = qemu_fdt_setprop(fdt, "/memory", "reg", mem_reg_property,
81                            sizeof(mem_reg_property));
82     if (ret < 0)
83         fprintf(stderr, "couldn't set /memory/reg\n");
84 
85     ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
86                                 initrd_base);
87     if (ret < 0)
88         fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
89 
90     ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
91                                 (initrd_base + initrd_size));
92     if (ret < 0)
93         fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
94 
95     ret = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
96                                   kernel_cmdline);
97     if (ret < 0)
98         fprintf(stderr, "couldn't set /chosen/bootargs\n");
99 
100     /* Copy data from the host device tree into the guest. Since the guest can
101      * directly access the timebase without host involvement, we must expose
102      * the correct frequencies. */
103     if (kvm_enabled()) {
104         tb_freq = kvmppc_get_tbfreq();
105         clock_freq = kvmppc_get_clockfreq();
106     }
107 
108     qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "clock-frequency",
109                           clock_freq);
110     qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "timebase-frequency",
111                           tb_freq);
112 
113     rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
114     g_free(fdt);
115     return 0;
116 
117 out:
118 
119     return ret;
120 }
121 
122 /* Create reset TLB entries for BookE, spanning the 32bit addr space.  */
123 static void mmubooke_create_initial_mapping(CPUPPCState *env,
124                                      target_ulong va,
125                                      hwaddr pa)
126 {
127     ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
128 
129     tlb->attr = 0;
130     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
131     tlb->size = 1U << 31; /* up to 0x80000000  */
132     tlb->EPN = va & TARGET_PAGE_MASK;
133     tlb->RPN = pa & TARGET_PAGE_MASK;
134     tlb->PID = 0;
135 
136     tlb = &env->tlb.tlbe[1];
137     tlb->attr = 0;
138     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
139     tlb->size = 1U << 31; /* up to 0xffffffff  */
140     tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
141     tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
142     tlb->PID = 0;
143 }
144 
145 static void main_cpu_reset(void *opaque)
146 {
147     PowerPCCPU *cpu = opaque;
148     CPUPPCState *env = &cpu->env;
149 
150     cpu_reset(CPU(cpu));
151     env->gpr[1] = (16<<20) - 8;
152     env->gpr[3] = FDT_ADDR;
153     env->nip = entry;
154 
155     /* Create a mapping for the kernel.  */
156     mmubooke_create_initial_mapping(env, 0, 0);
157 }
158 
159 static void bamboo_init(MachineState *machine)
160 {
161     ram_addr_t ram_size = machine->ram_size;
162     const char *kernel_filename = machine->kernel_filename;
163     const char *kernel_cmdline = machine->kernel_cmdline;
164     const char *initrd_filename = machine->initrd_filename;
165     unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 };
166     MemoryRegion *address_space_mem = get_system_memory();
167     MemoryRegion *isa = g_new(MemoryRegion, 1);
168     MemoryRegion *ram_memories
169         = g_malloc(PPC440EP_SDRAM_NR_BANKS * sizeof(*ram_memories));
170     hwaddr ram_bases[PPC440EP_SDRAM_NR_BANKS];
171     hwaddr ram_sizes[PPC440EP_SDRAM_NR_BANKS];
172     qemu_irq *pic;
173     qemu_irq *irqs;
174     PCIBus *pcibus;
175     PowerPCCPU *cpu;
176     CPUPPCState *env;
177     uint64_t elf_entry;
178     uint64_t elf_lowaddr;
179     hwaddr loadaddr = 0;
180     target_long initrd_size = 0;
181     DeviceState *dev;
182     int success;
183     int i;
184 
185     /* Setup CPU. */
186     if (machine->cpu_model == NULL) {
187         machine->cpu_model = "440EP";
188     }
189     cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model));
190     env = &cpu->env;
191 
192     if (env->mmu_model != POWERPC_MMU_BOOKE) {
193         fprintf(stderr, "MMU model %i not supported by this machine.\n",
194             env->mmu_model);
195         exit(1);
196     }
197 
198     qemu_register_reset(main_cpu_reset, cpu);
199     ppc_booke_timers_init(cpu, 400000000, 0);
200     ppc_dcr_init(env, NULL, NULL);
201 
202     /* interrupt controller */
203     irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
204     irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
205     irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
206     pic = ppcuic_init(env, irqs, 0x0C0, 0, 1);
207 
208     /* SDRAM controller */
209     memset(ram_bases, 0, sizeof(ram_bases));
210     memset(ram_sizes, 0, sizeof(ram_sizes));
211     ram_size = ppc4xx_sdram_adjust(ram_size, PPC440EP_SDRAM_NR_BANKS,
212                                    ram_memories,
213                                    ram_bases, ram_sizes,
214                                    ppc440ep_sdram_bank_sizes);
215     /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */
216     ppc4xx_sdram_init(env, pic[14], PPC440EP_SDRAM_NR_BANKS, ram_memories,
217                       ram_bases, ram_sizes, 1);
218 
219     /* PCI */
220     dev = sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST_BRIDGE,
221                                 PPC440EP_PCI_CONFIG,
222                                 pic[pci_irq_nrs[0]], pic[pci_irq_nrs[1]],
223                                 pic[pci_irq_nrs[2]], pic[pci_irq_nrs[3]],
224                                 NULL);
225     pcibus = (PCIBus *)qdev_get_child_bus(dev, "pci.0");
226     if (!pcibus) {
227         fprintf(stderr, "couldn't create PCI controller!\n");
228         exit(1);
229     }
230 
231     memory_region_init_alias(isa, NULL, "isa_mmio",
232                              get_system_io(), 0, PPC440EP_PCI_IOLEN);
233     memory_region_add_subregion(get_system_memory(), PPC440EP_PCI_IO, isa);
234 
235     if (serial_hds[0] != NULL) {
236         serial_mm_init(address_space_mem, 0xef600300, 0, pic[0],
237                        PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
238                        DEVICE_BIG_ENDIAN);
239     }
240     if (serial_hds[1] != NULL) {
241         serial_mm_init(address_space_mem, 0xef600400, 0, pic[1],
242                        PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
243                        DEVICE_BIG_ENDIAN);
244     }
245 
246     if (pcibus) {
247         /* Register network interfaces. */
248         for (i = 0; i < nb_nics; i++) {
249             /* There are no PCI NICs on the Bamboo board, but there are
250              * PCI slots, so we can pick whatever default model we want. */
251             pci_nic_init_nofail(&nd_table[i], pcibus, "e1000", NULL);
252         }
253     }
254 
255     /* Load kernel. */
256     if (kernel_filename) {
257         success = load_uimage(kernel_filename, &entry, &loadaddr, NULL,
258                               NULL, NULL);
259         if (success < 0) {
260             success = load_elf(kernel_filename, NULL, NULL, &elf_entry,
261                                &elf_lowaddr, NULL, 1, PPC_ELF_MACHINE,
262                                0, 0);
263             entry = elf_entry;
264             loadaddr = elf_lowaddr;
265         }
266         /* XXX try again as binary */
267         if (success < 0) {
268             fprintf(stderr, "qemu: could not load kernel '%s'\n",
269                     kernel_filename);
270             exit(1);
271         }
272     }
273 
274     /* Load initrd. */
275     if (initrd_filename) {
276         initrd_size = load_image_targphys(initrd_filename, RAMDISK_ADDR,
277                                           ram_size - RAMDISK_ADDR);
278 
279         if (initrd_size < 0) {
280             fprintf(stderr, "qemu: could not load ram disk '%s' at %x\n",
281                     initrd_filename, RAMDISK_ADDR);
282             exit(1);
283         }
284     }
285 
286     /* If we're loading a kernel directly, we must load the device tree too. */
287     if (kernel_filename) {
288         if (bamboo_load_device_tree(FDT_ADDR, ram_size, RAMDISK_ADDR,
289                                     initrd_size, kernel_cmdline) < 0) {
290             fprintf(stderr, "couldn't load device tree\n");
291             exit(1);
292         }
293     }
294 }
295 
296 static void bamboo_machine_init(MachineClass *mc)
297 {
298     mc->desc = "bamboo";
299     mc->init = bamboo_init;
300 }
301 
302 DEFINE_MACHINE("bamboo", bamboo_machine_init)
303