1 /* 2 * QEMU PowerPC 440 Bamboo board emulation 3 * 4 * Copyright 2007 IBM Corporation. 5 * Authors: 6 * Jerone Young <jyoung5@us.ibm.com> 7 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 8 * Hollis Blanchard <hollisb@us.ibm.com> 9 * 10 * This work is licensed under the GNU GPL license version 2 or later. 11 * 12 */ 13 14 #include "qemu/osdep.h" 15 #include "qemu/units.h" 16 #include "qemu/error-report.h" 17 #include "qemu/datadir.h" 18 #include "qemu/error-report.h" 19 #include "net/net.h" 20 #include "hw/pci/pci.h" 21 #include "hw/boards.h" 22 #include "sysemu/kvm.h" 23 #include "kvm_ppc.h" 24 #include "sysemu/device_tree.h" 25 #include "hw/loader.h" 26 #include "elf.h" 27 #include "hw/char/serial.h" 28 #include "hw/ppc/ppc.h" 29 #include "ppc405.h" 30 #include "sysemu/sysemu.h" 31 #include "sysemu/reset.h" 32 #include "hw/sysbus.h" 33 #include "hw/intc/ppc-uic.h" 34 #include "hw/qdev-properties.h" 35 #include "qapi/error.h" 36 37 #define BINARY_DEVICE_TREE_FILE "bamboo.dtb" 38 39 /* from u-boot */ 40 #define KERNEL_ADDR 0x1000000 41 #define FDT_ADDR 0x1800000 42 #define RAMDISK_ADDR 0x1900000 43 44 #define PPC440EP_PCI_CONFIG 0xeec00000 45 #define PPC440EP_PCI_INTACK 0xeed00000 46 #define PPC440EP_PCI_SPECIAL 0xeed00000 47 #define PPC440EP_PCI_REGS 0xef400000 48 #define PPC440EP_PCI_IO 0xe8000000 49 #define PPC440EP_PCI_IOLEN 0x00010000 50 51 #define PPC440EP_SDRAM_NR_BANKS 4 52 53 static hwaddr entry; 54 55 static int bamboo_load_device_tree(hwaddr addr, 56 uint32_t ramsize, 57 hwaddr initrd_base, 58 hwaddr initrd_size, 59 const char *kernel_cmdline) 60 { 61 int ret = -1; 62 uint32_t mem_reg_property[] = { 0, 0, cpu_to_be32(ramsize) }; 63 char *filename; 64 int fdt_size; 65 void *fdt; 66 uint32_t tb_freq = 400000000; 67 uint32_t clock_freq = 400000000; 68 69 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE); 70 if (!filename) { 71 return -1; 72 } 73 fdt = load_device_tree(filename, &fdt_size); 74 g_free(filename); 75 if (fdt == NULL) { 76 return -1; 77 } 78 79 /* Manipulate device tree in memory. */ 80 81 ret = qemu_fdt_setprop(fdt, "/memory", "reg", mem_reg_property, 82 sizeof(mem_reg_property)); 83 if (ret < 0) { 84 fprintf(stderr, "couldn't set /memory/reg\n"); 85 } 86 ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", 87 initrd_base); 88 if (ret < 0) { 89 fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n"); 90 } 91 ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", 92 (initrd_base + initrd_size)); 93 if (ret < 0) { 94 fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n"); 95 } 96 ret = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", 97 kernel_cmdline); 98 if (ret < 0) { 99 fprintf(stderr, "couldn't set /chosen/bootargs\n"); 100 } 101 102 /* 103 * Copy data from the host device tree into the guest. Since the guest can 104 * directly access the timebase without host involvement, we must expose 105 * the correct frequencies. 106 */ 107 if (kvm_enabled()) { 108 tb_freq = kvmppc_get_tbfreq(); 109 clock_freq = kvmppc_get_clockfreq(); 110 } 111 112 qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "clock-frequency", 113 clock_freq); 114 qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "timebase-frequency", 115 tb_freq); 116 117 rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr); 118 g_free(fdt); 119 return 0; 120 } 121 122 /* Create reset TLB entries for BookE, spanning the 32bit addr space. */ 123 static void mmubooke_create_initial_mapping(CPUPPCState *env, 124 target_ulong va, 125 hwaddr pa) 126 { 127 ppcemb_tlb_t *tlb = &env->tlb.tlbe[0]; 128 129 tlb->attr = 0; 130 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); 131 tlb->size = 1U << 31; /* up to 0x80000000 */ 132 tlb->EPN = va & TARGET_PAGE_MASK; 133 tlb->RPN = pa & TARGET_PAGE_MASK; 134 tlb->PID = 0; 135 136 tlb = &env->tlb.tlbe[1]; 137 tlb->attr = 0; 138 tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); 139 tlb->size = 1U << 31; /* up to 0xffffffff */ 140 tlb->EPN = 0x80000000 & TARGET_PAGE_MASK; 141 tlb->RPN = 0x80000000 & TARGET_PAGE_MASK; 142 tlb->PID = 0; 143 } 144 145 static void main_cpu_reset(void *opaque) 146 { 147 PowerPCCPU *cpu = opaque; 148 CPUPPCState *env = &cpu->env; 149 150 cpu_reset(CPU(cpu)); 151 env->gpr[1] = (16 * MiB) - 8; 152 env->gpr[3] = FDT_ADDR; 153 env->nip = entry; 154 155 /* Create a mapping for the kernel. */ 156 mmubooke_create_initial_mapping(env, 0, 0); 157 } 158 159 static void bamboo_init(MachineState *machine) 160 { 161 const char *kernel_filename = machine->kernel_filename; 162 const char *kernel_cmdline = machine->kernel_cmdline; 163 const char *initrd_filename = machine->initrd_filename; 164 unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 }; 165 MemoryRegion *address_space_mem = get_system_memory(); 166 MemoryRegion *isa = g_new(MemoryRegion, 1); 167 PCIBus *pcibus; 168 PowerPCCPU *cpu; 169 CPUPPCState *env; 170 target_long initrd_size = 0; 171 DeviceState *dev; 172 DeviceState *uicdev; 173 SysBusDevice *uicsbd; 174 int success; 175 int i; 176 177 cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); 178 env = &cpu->env; 179 180 if (env->mmu_model != POWERPC_MMU_BOOKE) { 181 error_report("MMU model %i not supported by this machine", 182 env->mmu_model); 183 exit(1); 184 } 185 186 qemu_register_reset(main_cpu_reset, cpu); 187 ppc_booke_timers_init(cpu, 400000000, 0); 188 ppc_dcr_init(env, NULL, NULL); 189 190 /* interrupt controller */ 191 uicdev = qdev_new(TYPE_PPC_UIC); 192 ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uicdev), cpu, &error_fatal); 193 object_unref(OBJECT(uicdev)); 194 uicsbd = SYS_BUS_DEVICE(uicdev); 195 sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT, 196 qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT)); 197 sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT, 198 qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT)); 199 200 /* SDRAM controller */ 201 /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */ 202 ppc4xx_sdram_init(env, qdev_get_gpio_in(uicdev, 14), 203 PPC440EP_SDRAM_NR_BANKS, machine->ram); 204 /* Enable SDRAM memory regions, this should be done by the firmware */ 205 ppc4xx_sdram_enable(env); 206 207 /* PCI */ 208 dev = sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST_BRIDGE, 209 PPC440EP_PCI_CONFIG, 210 qdev_get_gpio_in(uicdev, pci_irq_nrs[0]), 211 qdev_get_gpio_in(uicdev, pci_irq_nrs[1]), 212 qdev_get_gpio_in(uicdev, pci_irq_nrs[2]), 213 qdev_get_gpio_in(uicdev, pci_irq_nrs[3]), 214 NULL); 215 pcibus = (PCIBus *)qdev_get_child_bus(dev, "pci.0"); 216 if (!pcibus) { 217 error_report("couldn't create PCI controller"); 218 exit(1); 219 } 220 221 memory_region_init_alias(isa, NULL, "isa_mmio", 222 get_system_io(), 0, PPC440EP_PCI_IOLEN); 223 memory_region_add_subregion(get_system_memory(), PPC440EP_PCI_IO, isa); 224 225 if (serial_hd(0) != NULL) { 226 serial_mm_init(address_space_mem, 0xef600300, 0, 227 qdev_get_gpio_in(uicdev, 0), 228 PPC_SERIAL_MM_BAUDBASE, serial_hd(0), 229 DEVICE_BIG_ENDIAN); 230 } 231 if (serial_hd(1) != NULL) { 232 serial_mm_init(address_space_mem, 0xef600400, 0, 233 qdev_get_gpio_in(uicdev, 1), 234 PPC_SERIAL_MM_BAUDBASE, serial_hd(1), 235 DEVICE_BIG_ENDIAN); 236 } 237 238 if (pcibus) { 239 /* Register network interfaces. */ 240 for (i = 0; i < nb_nics; i++) { 241 /* 242 * There are no PCI NICs on the Bamboo board, but there are 243 * PCI slots, so we can pick whatever default model we want. 244 */ 245 pci_nic_init_nofail(&nd_table[i], pcibus, "e1000", NULL); 246 } 247 } 248 249 /* Load kernel. */ 250 if (kernel_filename) { 251 hwaddr loadaddr = LOAD_UIMAGE_LOADADDR_INVALID; 252 success = load_uimage(kernel_filename, &entry, &loadaddr, NULL, 253 NULL, NULL); 254 if (success < 0) { 255 uint64_t elf_entry; 256 success = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, 257 NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); 258 entry = elf_entry; 259 } 260 /* XXX try again as binary */ 261 if (success < 0) { 262 error_report("could not load kernel '%s'", kernel_filename); 263 exit(1); 264 } 265 } 266 267 /* Load initrd. */ 268 if (initrd_filename) { 269 initrd_size = load_image_targphys(initrd_filename, RAMDISK_ADDR, 270 machine->ram_size - RAMDISK_ADDR); 271 272 if (initrd_size < 0) { 273 error_report("could not load ram disk '%s' at %x", 274 initrd_filename, RAMDISK_ADDR); 275 exit(1); 276 } 277 } 278 279 /* If we're loading a kernel directly, we must load the device tree too. */ 280 if (kernel_filename) { 281 if (bamboo_load_device_tree(FDT_ADDR, machine->ram_size, RAMDISK_ADDR, 282 initrd_size, kernel_cmdline) < 0) { 283 error_report("couldn't load device tree"); 284 exit(1); 285 } 286 } 287 } 288 289 static void bamboo_machine_init(MachineClass *mc) 290 { 291 mc->desc = "bamboo"; 292 mc->init = bamboo_init; 293 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440epb"); 294 mc->default_ram_id = "ppc4xx.sdram"; 295 } 296 297 DEFINE_MACHINE("bamboo", bamboo_machine_init) 298