1 2 /* 3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator 4 * 5 * Copyright (c) 2004-2007 Fabrice Bellard 6 * Copyright (c) 2007 Jocelyn Mayer 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 */ 26 #include "hw/hw.h" 27 #include "hw/ppc/ppc.h" 28 #include "mac.h" 29 #include "hw/input/adb.h" 30 #include "hw/timer/m48t59.h" 31 #include "sysemu/sysemu.h" 32 #include "net/net.h" 33 #include "hw/isa/isa.h" 34 #include "hw/pci/pci.h" 35 #include "hw/boards.h" 36 #include "hw/nvram/fw_cfg.h" 37 #include "hw/char/escc.h" 38 #include "hw/ide.h" 39 #include "hw/loader.h" 40 #include "elf.h" 41 #include "sysemu/kvm.h" 42 #include "kvm_ppc.h" 43 #include "sysemu/block-backend.h" 44 #include "exec/address-spaces.h" 45 46 #define MAX_IDE_BUS 2 47 #define CFG_ADDR 0xf0000510 48 #define TBFREQ 16600000UL 49 #define CLOCKFREQ 266000000UL 50 #define BUSFREQ 66000000UL 51 52 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 53 Error **errp) 54 { 55 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 56 } 57 58 static uint64_t translate_kernel_address(void *opaque, uint64_t addr) 59 { 60 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; 61 } 62 63 static hwaddr round_page(hwaddr addr) 64 { 65 return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK; 66 } 67 68 static void ppc_heathrow_reset(void *opaque) 69 { 70 PowerPCCPU *cpu = opaque; 71 72 cpu_reset(CPU(cpu)); 73 } 74 75 static void ppc_heathrow_init(MachineState *machine) 76 { 77 ram_addr_t ram_size = machine->ram_size; 78 const char *kernel_filename = machine->kernel_filename; 79 const char *kernel_cmdline = machine->kernel_cmdline; 80 const char *initrd_filename = machine->initrd_filename; 81 const char *boot_device = machine->boot_order; 82 MemoryRegion *sysmem = get_system_memory(); 83 PowerPCCPU *cpu = NULL; 84 CPUPPCState *env = NULL; 85 char *filename; 86 qemu_irq *pic, **heathrow_irqs; 87 int linux_boot, i; 88 MemoryRegion *ram = g_new(MemoryRegion, 1); 89 MemoryRegion *bios = g_new(MemoryRegion, 1); 90 MemoryRegion *isa = g_new(MemoryRegion, 1); 91 uint32_t kernel_base, initrd_base, cmdline_base = 0; 92 int32_t kernel_size, initrd_size; 93 PCIBus *pci_bus; 94 PCIDevice *macio; 95 MACIOIDEState *macio_ide; 96 DeviceState *dev; 97 BusState *adb_bus; 98 int bios_size; 99 MemoryRegion *pic_mem; 100 MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1); 101 uint16_t ppc_boot_device; 102 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 103 void *fw_cfg; 104 uint64_t tbfreq; 105 106 linux_boot = (kernel_filename != NULL); 107 108 /* init CPUs */ 109 if (machine->cpu_model == NULL) 110 machine->cpu_model = "G3"; 111 for (i = 0; i < smp_cpus; i++) { 112 cpu = cpu_ppc_init(machine->cpu_model); 113 if (cpu == NULL) { 114 fprintf(stderr, "Unable to find PowerPC CPU definition\n"); 115 exit(1); 116 } 117 env = &cpu->env; 118 119 /* Set time-base frequency to 16.6 Mhz */ 120 cpu_ppc_tb_init(env, TBFREQ); 121 qemu_register_reset(ppc_heathrow_reset, cpu); 122 } 123 124 /* allocate RAM */ 125 if (ram_size > (2047 << 20)) { 126 fprintf(stderr, 127 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n", 128 ((unsigned int)ram_size / (1 << 20))); 129 exit(1); 130 } 131 132 memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram", 133 ram_size); 134 memory_region_add_subregion(sysmem, 0, ram); 135 136 /* allocate and load BIOS */ 137 memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, 138 &error_fatal); 139 vmstate_register_ram_global(bios); 140 141 if (bios_name == NULL) 142 bios_name = PROM_FILENAME; 143 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 144 memory_region_set_readonly(bios, true); 145 memory_region_add_subregion(sysmem, PROM_ADDR, bios); 146 147 /* Load OpenBIOS (ELF) */ 148 if (filename) { 149 bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL, 150 1, PPC_ELF_MACHINE, 0); 151 g_free(filename); 152 } else { 153 bios_size = -1; 154 } 155 if (bios_size < 0 || bios_size > BIOS_SIZE) { 156 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name); 157 exit(1); 158 } 159 160 if (linux_boot) { 161 uint64_t lowaddr = 0; 162 int bswap_needed; 163 164 #ifdef BSWAP_NEEDED 165 bswap_needed = 1; 166 #else 167 bswap_needed = 0; 168 #endif 169 kernel_base = KERNEL_LOAD_ADDR; 170 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, 171 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, 0); 172 if (kernel_size < 0) 173 kernel_size = load_aout(kernel_filename, kernel_base, 174 ram_size - kernel_base, bswap_needed, 175 TARGET_PAGE_SIZE); 176 if (kernel_size < 0) 177 kernel_size = load_image_targphys(kernel_filename, 178 kernel_base, 179 ram_size - kernel_base); 180 if (kernel_size < 0) { 181 hw_error("qemu: could not load kernel '%s'\n", 182 kernel_filename); 183 exit(1); 184 } 185 /* load initrd */ 186 if (initrd_filename) { 187 initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP); 188 initrd_size = load_image_targphys(initrd_filename, initrd_base, 189 ram_size - initrd_base); 190 if (initrd_size < 0) { 191 hw_error("qemu: could not load initial ram disk '%s'\n", 192 initrd_filename); 193 exit(1); 194 } 195 cmdline_base = round_page(initrd_base + initrd_size); 196 } else { 197 initrd_base = 0; 198 initrd_size = 0; 199 cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP); 200 } 201 ppc_boot_device = 'm'; 202 } else { 203 kernel_base = 0; 204 kernel_size = 0; 205 initrd_base = 0; 206 initrd_size = 0; 207 ppc_boot_device = '\0'; 208 for (i = 0; boot_device[i] != '\0'; i++) { 209 /* TOFIX: for now, the second IDE channel is not properly 210 * used by OHW. The Mac floppy disk are not emulated. 211 * For now, OHW cannot boot from the network. 212 */ 213 #if 0 214 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') { 215 ppc_boot_device = boot_device[i]; 216 break; 217 } 218 #else 219 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') { 220 ppc_boot_device = boot_device[i]; 221 break; 222 } 223 #endif 224 } 225 if (ppc_boot_device == '\0') { 226 fprintf(stderr, "No valid boot device for G3 Beige machine\n"); 227 exit(1); 228 } 229 } 230 231 /* Register 2 MB of ISA IO space */ 232 memory_region_init_alias(isa, NULL, "isa_mmio", 233 get_system_io(), 0, 0x00200000); 234 memory_region_add_subregion(sysmem, 0xfe000000, isa); 235 236 /* XXX: we register only 1 output pin for heathrow PIC */ 237 heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *)); 238 heathrow_irqs[0] = 239 g_malloc0(smp_cpus * sizeof(qemu_irq) * 1); 240 /* Connect the heathrow PIC outputs to the 6xx bus */ 241 for (i = 0; i < smp_cpus; i++) { 242 switch (PPC_INPUT(env)) { 243 case PPC_FLAGS_INPUT_6xx: 244 heathrow_irqs[i] = heathrow_irqs[0] + (i * 1); 245 heathrow_irqs[i][0] = 246 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; 247 break; 248 default: 249 hw_error("Bus model not supported on OldWorld Mac machine\n"); 250 } 251 } 252 253 /* Timebase Frequency */ 254 if (kvm_enabled()) { 255 tbfreq = kvmppc_get_tbfreq(); 256 } else { 257 tbfreq = TBFREQ; 258 } 259 260 /* init basic PC hardware */ 261 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) { 262 hw_error("Only 6xx bus is supported on heathrow machine\n"); 263 } 264 pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs); 265 pci_bus = pci_grackle_init(0xfec00000, pic, 266 get_system_memory(), 267 get_system_io()); 268 pci_vga_init(pci_bus); 269 270 escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0], 271 serial_hds[1], ESCC_CLOCK, 4); 272 memory_region_init_alias(escc_bar, NULL, "escc-bar", 273 escc_mem, 0, memory_region_size(escc_mem)); 274 275 for(i = 0; i < nb_nics; i++) 276 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); 277 278 279 ide_drive_get(hd, ARRAY_SIZE(hd)); 280 281 macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO); 282 dev = DEVICE(macio); 283 qdev_connect_gpio_out(dev, 0, pic[0x12]); /* CUDA */ 284 qdev_connect_gpio_out(dev, 1, pic[0x0D]); /* IDE-0 */ 285 qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE-0 DMA */ 286 qdev_connect_gpio_out(dev, 3, pic[0x0E]); /* IDE-1 */ 287 qdev_connect_gpio_out(dev, 4, pic[0x03]); /* IDE-1 DMA */ 288 qdev_prop_set_uint64(dev, "frequency", tbfreq); 289 macio_init(macio, pic_mem, escc_bar); 290 291 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), 292 "ide[0]")); 293 macio_ide_init_drives(macio_ide, hd); 294 295 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), 296 "ide[1]")); 297 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); 298 299 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); 300 adb_bus = qdev_get_child_bus(dev, "adb.0"); 301 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); 302 qdev_init_nofail(dev); 303 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); 304 qdev_init_nofail(dev); 305 306 if (usb_enabled()) { 307 pci_create_simple(pci_bus, -1, "pci-ohci"); 308 } 309 310 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) 311 graphic_depth = 15; 312 313 /* No PCI init: the BIOS will do it */ 314 315 fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2); 316 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); 317 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); 318 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW); 319 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); 320 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); 321 if (kernel_cmdline) { 322 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); 323 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline); 324 } else { 325 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); 326 } 327 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); 328 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); 329 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); 330 331 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); 332 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); 333 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); 334 335 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); 336 if (kvm_enabled()) { 337 #ifdef CONFIG_KVM 338 uint8_t *hypercall; 339 340 hypercall = g_malloc(16); 341 kvmppc_get_hypercall(env, hypercall, 16); 342 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); 343 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); 344 #endif 345 } 346 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); 347 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ 348 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); 349 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); 350 351 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 352 } 353 354 static int heathrow_kvm_type(const char *arg) 355 { 356 /* Always force PR KVM */ 357 return 2; 358 } 359 360 static void heathrow_machine_init(MachineClass *mc) 361 { 362 mc->desc = "Heathrow based PowerMAC"; 363 mc->init = ppc_heathrow_init; 364 mc->max_cpus = MAX_CPUS; 365 #ifndef TARGET_PPC64 366 mc->is_default = 1; 367 #endif 368 /* TOFIX "cad" when Mac floppy is implemented */ 369 mc->default_boot_order = "cd"; 370 mc->kvm_type = heathrow_kvm_type; 371 } 372 373 DEFINE_MACHINE("g3beige", heathrow_machine_init) 374