1 2 /* 3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator 4 * 5 * Copyright (c) 2004-2007 Fabrice Bellard 6 * Copyright (c) 2007 Jocelyn Mayer 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 */ 26 #include "qemu/osdep.h" 27 #include "qapi/error.h" 28 #include "hw/hw.h" 29 #include "hw/ppc/ppc.h" 30 #include "mac.h" 31 #include "hw/input/adb.h" 32 #include "hw/timer/m48t59.h" 33 #include "sysemu/sysemu.h" 34 #include "net/net.h" 35 #include "hw/isa/isa.h" 36 #include "hw/pci/pci.h" 37 #include "hw/boards.h" 38 #include "hw/nvram/fw_cfg.h" 39 #include "hw/char/escc.h" 40 #include "hw/ide.h" 41 #include "hw/loader.h" 42 #include "elf.h" 43 #include "qemu/error-report.h" 44 #include "sysemu/kvm.h" 45 #include "kvm_ppc.h" 46 #include "sysemu/block-backend.h" 47 #include "exec/address-spaces.h" 48 #include "qemu/cutils.h" 49 50 #define MAX_IDE_BUS 2 51 #define CFG_ADDR 0xf0000510 52 #define TBFREQ 16600000UL 53 #define CLOCKFREQ 266000000UL 54 #define BUSFREQ 66000000UL 55 56 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 57 Error **errp) 58 { 59 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 60 } 61 62 static uint64_t translate_kernel_address(void *opaque, uint64_t addr) 63 { 64 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; 65 } 66 67 static hwaddr round_page(hwaddr addr) 68 { 69 return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK; 70 } 71 72 static void ppc_heathrow_reset(void *opaque) 73 { 74 PowerPCCPU *cpu = opaque; 75 76 cpu_reset(CPU(cpu)); 77 } 78 79 static void ppc_heathrow_init(MachineState *machine) 80 { 81 ram_addr_t ram_size = machine->ram_size; 82 const char *kernel_filename = machine->kernel_filename; 83 const char *kernel_cmdline = machine->kernel_cmdline; 84 const char *initrd_filename = machine->initrd_filename; 85 const char *boot_device = machine->boot_order; 86 MemoryRegion *sysmem = get_system_memory(); 87 PowerPCCPU *cpu = NULL; 88 CPUPPCState *env = NULL; 89 char *filename; 90 qemu_irq *pic, **heathrow_irqs; 91 int linux_boot, i; 92 MemoryRegion *ram = g_new(MemoryRegion, 1); 93 MemoryRegion *bios = g_new(MemoryRegion, 1); 94 MemoryRegion *isa = g_new(MemoryRegion, 1); 95 uint32_t kernel_base, initrd_base, cmdline_base = 0; 96 int32_t kernel_size, initrd_size; 97 PCIBus *pci_bus; 98 PCIDevice *macio; 99 MACIOIDEState *macio_ide; 100 DeviceState *dev; 101 BusState *adb_bus; 102 int bios_size; 103 MemoryRegion *pic_mem; 104 MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1); 105 uint16_t ppc_boot_device; 106 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 107 void *fw_cfg; 108 uint64_t tbfreq; 109 110 linux_boot = (kernel_filename != NULL); 111 112 /* init CPUs */ 113 if (machine->cpu_model == NULL) 114 machine->cpu_model = "G3"; 115 for (i = 0; i < smp_cpus; i++) { 116 cpu = cpu_ppc_init(machine->cpu_model); 117 if (cpu == NULL) { 118 fprintf(stderr, "Unable to find PowerPC CPU definition\n"); 119 exit(1); 120 } 121 env = &cpu->env; 122 123 /* Set time-base frequency to 16.6 Mhz */ 124 cpu_ppc_tb_init(env, TBFREQ); 125 qemu_register_reset(ppc_heathrow_reset, cpu); 126 } 127 128 /* allocate RAM */ 129 if (ram_size > (2047 << 20)) { 130 fprintf(stderr, 131 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n", 132 ((unsigned int)ram_size / (1 << 20))); 133 exit(1); 134 } 135 136 memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram", 137 ram_size); 138 memory_region_add_subregion(sysmem, 0, ram); 139 140 /* allocate and load BIOS */ 141 memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, 142 &error_fatal); 143 vmstate_register_ram_global(bios); 144 145 if (bios_name == NULL) 146 bios_name = PROM_FILENAME; 147 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 148 memory_region_set_readonly(bios, true); 149 memory_region_add_subregion(sysmem, PROM_ADDR, bios); 150 151 /* Load OpenBIOS (ELF) */ 152 if (filename) { 153 bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL, 154 1, PPC_ELF_MACHINE, 0, 0); 155 g_free(filename); 156 } else { 157 bios_size = -1; 158 } 159 if (bios_size < 0 || bios_size > BIOS_SIZE) { 160 error_report("could not load PowerPC bios '%s'", bios_name); 161 exit(1); 162 } 163 164 if (linux_boot) { 165 uint64_t lowaddr = 0; 166 int bswap_needed; 167 168 #ifdef BSWAP_NEEDED 169 bswap_needed = 1; 170 #else 171 bswap_needed = 0; 172 #endif 173 kernel_base = KERNEL_LOAD_ADDR; 174 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, 175 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, 176 0, 0); 177 if (kernel_size < 0) 178 kernel_size = load_aout(kernel_filename, kernel_base, 179 ram_size - kernel_base, bswap_needed, 180 TARGET_PAGE_SIZE); 181 if (kernel_size < 0) 182 kernel_size = load_image_targphys(kernel_filename, 183 kernel_base, 184 ram_size - kernel_base); 185 if (kernel_size < 0) { 186 error_report("could not load kernel '%s'", kernel_filename); 187 exit(1); 188 } 189 /* load initrd */ 190 if (initrd_filename) { 191 initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP); 192 initrd_size = load_image_targphys(initrd_filename, initrd_base, 193 ram_size - initrd_base); 194 if (initrd_size < 0) { 195 error_report("could not load initial ram disk '%s'", 196 initrd_filename); 197 exit(1); 198 } 199 cmdline_base = round_page(initrd_base + initrd_size); 200 } else { 201 initrd_base = 0; 202 initrd_size = 0; 203 cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP); 204 } 205 ppc_boot_device = 'm'; 206 } else { 207 kernel_base = 0; 208 kernel_size = 0; 209 initrd_base = 0; 210 initrd_size = 0; 211 ppc_boot_device = '\0'; 212 for (i = 0; boot_device[i] != '\0'; i++) { 213 /* TOFIX: for now, the second IDE channel is not properly 214 * used by OHW. The Mac floppy disk are not emulated. 215 * For now, OHW cannot boot from the network. 216 */ 217 #if 0 218 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') { 219 ppc_boot_device = boot_device[i]; 220 break; 221 } 222 #else 223 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') { 224 ppc_boot_device = boot_device[i]; 225 break; 226 } 227 #endif 228 } 229 if (ppc_boot_device == '\0') { 230 fprintf(stderr, "No valid boot device for G3 Beige machine\n"); 231 exit(1); 232 } 233 } 234 235 /* Register 2 MB of ISA IO space */ 236 memory_region_init_alias(isa, NULL, "isa_mmio", 237 get_system_io(), 0, 0x00200000); 238 memory_region_add_subregion(sysmem, 0xfe000000, isa); 239 240 /* XXX: we register only 1 output pin for heathrow PIC */ 241 heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *)); 242 heathrow_irqs[0] = 243 g_malloc0(smp_cpus * sizeof(qemu_irq) * 1); 244 /* Connect the heathrow PIC outputs to the 6xx bus */ 245 for (i = 0; i < smp_cpus; i++) { 246 switch (PPC_INPUT(env)) { 247 case PPC_FLAGS_INPUT_6xx: 248 heathrow_irqs[i] = heathrow_irqs[0] + (i * 1); 249 heathrow_irqs[i][0] = 250 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; 251 break; 252 default: 253 error_report("Bus model not supported on OldWorld Mac machine"); 254 exit(1); 255 } 256 } 257 258 /* Timebase Frequency */ 259 if (kvm_enabled()) { 260 tbfreq = kvmppc_get_tbfreq(); 261 } else { 262 tbfreq = TBFREQ; 263 } 264 265 /* init basic PC hardware */ 266 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) { 267 error_report("Only 6xx bus is supported on heathrow machine"); 268 exit(1); 269 } 270 pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs); 271 pci_bus = pci_grackle_init(0xfec00000, pic, 272 get_system_memory(), 273 get_system_io()); 274 pci_vga_init(pci_bus); 275 276 escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0], 277 serial_hds[1], ESCC_CLOCK, 4); 278 memory_region_init_alias(escc_bar, NULL, "escc-bar", 279 escc_mem, 0, memory_region_size(escc_mem)); 280 281 for(i = 0; i < nb_nics; i++) 282 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); 283 284 285 ide_drive_get(hd, ARRAY_SIZE(hd)); 286 287 macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO); 288 dev = DEVICE(macio); 289 qdev_connect_gpio_out(dev, 0, pic[0x12]); /* CUDA */ 290 qdev_connect_gpio_out(dev, 1, pic[0x0D]); /* IDE-0 */ 291 qdev_connect_gpio_out(dev, 2, pic[0x02]); /* IDE-0 DMA */ 292 qdev_connect_gpio_out(dev, 3, pic[0x0E]); /* IDE-1 */ 293 qdev_connect_gpio_out(dev, 4, pic[0x03]); /* IDE-1 DMA */ 294 qdev_prop_set_uint64(dev, "frequency", tbfreq); 295 macio_init(macio, pic_mem, escc_bar); 296 297 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), 298 "ide[0]")); 299 macio_ide_init_drives(macio_ide, hd); 300 301 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), 302 "ide[1]")); 303 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); 304 305 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); 306 adb_bus = qdev_get_child_bus(dev, "adb.0"); 307 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); 308 qdev_init_nofail(dev); 309 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); 310 qdev_init_nofail(dev); 311 312 if (machine_usb(machine)) { 313 pci_create_simple(pci_bus, -1, "pci-ohci"); 314 } 315 316 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) 317 graphic_depth = 15; 318 319 /* No PCI init: the BIOS will do it */ 320 321 fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2); 322 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); 323 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); 324 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW); 325 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); 326 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); 327 if (kernel_cmdline) { 328 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); 329 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline); 330 } else { 331 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); 332 } 333 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); 334 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); 335 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); 336 337 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); 338 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); 339 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); 340 341 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); 342 if (kvm_enabled()) { 343 #ifdef CONFIG_KVM 344 uint8_t *hypercall; 345 346 hypercall = g_malloc(16); 347 kvmppc_get_hypercall(env, hypercall, 16); 348 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); 349 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); 350 #endif 351 } 352 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); 353 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ 354 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); 355 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); 356 357 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 358 } 359 360 static int heathrow_kvm_type(const char *arg) 361 { 362 /* Always force PR KVM */ 363 return 2; 364 } 365 366 static void heathrow_machine_init(MachineClass *mc) 367 { 368 mc->desc = "Heathrow based PowerMAC"; 369 mc->init = ppc_heathrow_init; 370 mc->max_cpus = MAX_CPUS; 371 #ifndef TARGET_PPC64 372 mc->is_default = 1; 373 #endif 374 /* TOFIX "cad" when Mac floppy is implemented */ 375 mc->default_boot_order = "cd"; 376 mc->kvm_type = heathrow_kvm_type; 377 } 378 379 DEFINE_MACHINE("g3beige", heathrow_machine_init) 380