xref: /openbmc/qemu/hw/ppc/mac_oldworld.c (revision 13b5ae94)
1 
2 /*
3  * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
4  *
5  * Copyright (c) 2004-2007 Fabrice Bellard
6  * Copyright (c) 2007 Jocelyn Mayer
7  *
8  * Permission is hereby granted, free of charge, to any person obtaining a copy
9  * of this software and associated documentation files (the "Software"), to deal
10  * in the Software without restriction, including without limitation the rights
11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12  * copies of the Software, and to permit persons to whom the Software is
13  * furnished to do so, subject to the following conditions:
14  *
15  * The above copyright notice and this permission notice shall be included in
16  * all copies or substantial portions of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24  * THE SOFTWARE.
25  */
26 
27 #include "qemu/osdep.h"
28 #include "qemu/datadir.h"
29 #include "qemu/units.h"
30 #include "qapi/error.h"
31 #include "hw/ppc/ppc.h"
32 #include "hw/qdev-properties.h"
33 #include "hw/boards.h"
34 #include "hw/input/adb.h"
35 #include "sysemu/sysemu.h"
36 #include "net/net.h"
37 #include "hw/isa/isa.h"
38 #include "hw/pci/pci.h"
39 #include "hw/pci/pci_host.h"
40 #include "hw/pci-host/grackle.h"
41 #include "hw/nvram/fw_cfg.h"
42 #include "hw/char/escc.h"
43 #include "hw/misc/macio/macio.h"
44 #include "hw/loader.h"
45 #include "hw/fw-path-provider.h"
46 #include "elf.h"
47 #include "qemu/error-report.h"
48 #include "sysemu/kvm.h"
49 #include "sysemu/reset.h"
50 #include "kvm_ppc.h"
51 
52 #define MAX_IDE_BUS 2
53 #define CFG_ADDR 0xf0000510
54 #define TBFREQ 16600000UL
55 #define CLOCKFREQ 266000000UL
56 #define BUSFREQ 66000000UL
57 
58 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
59 
60 #define PROM_FILENAME "openbios-ppc"
61 #define PROM_BASE 0xffc00000
62 #define PROM_SIZE (4 * MiB)
63 
64 #define KERNEL_LOAD_ADDR 0x01000000
65 #define KERNEL_GAP       0x00100000
66 
67 #define GRACKLE_BASE 0xfec00000
68 
69 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
70                             Error **errp)
71 {
72     fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
73 }
74 
75 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
76 {
77     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
78 }
79 
80 static void ppc_heathrow_reset(void *opaque)
81 {
82     PowerPCCPU *cpu = opaque;
83 
84     cpu_ppc_tb_reset(&cpu->env);
85     cpu_reset(CPU(cpu));
86 }
87 
88 static void ppc_heathrow_init(MachineState *machine)
89 {
90     const char *bios_name = machine->firmware ?: PROM_FILENAME;
91     MachineClass *mc = MACHINE_GET_CLASS(machine);
92     PowerPCCPU *cpu = NULL;
93     CPUPPCState *env = NULL;
94     char *filename;
95     int i, bios_size = -1;
96     MemoryRegion *bios = g_new(MemoryRegion, 1);
97     uint64_t bios_addr;
98     uint32_t kernel_base = 0, initrd_base = 0, cmdline_base = 0;
99     int32_t kernel_size = 0, initrd_size = 0;
100     PCIBus *pci_bus;
101     Object *macio;
102     MACIOIDEState *macio_ide;
103     SysBusDevice *s;
104     DeviceState *dev, *pic_dev, *grackle_dev;
105     BusState *adb_bus;
106     uint16_t ppc_boot_device;
107     DriveInfo *dinfo, *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
108     void *fw_cfg;
109     uint64_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TBFREQ;
110 
111     /* init CPUs */
112     for (i = 0; i < machine->smp.cpus; i++) {
113         cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
114         env = &cpu->env;
115 
116         /* Set time-base frequency to 16.6 Mhz */
117         cpu_ppc_tb_init(env,  TBFREQ);
118         qemu_register_reset(ppc_heathrow_reset, cpu);
119     }
120 
121     /* allocate RAM */
122     if (machine->ram_size > 2047 * MiB) {
123         error_report("Too much memory for this machine: %" PRId64 " MB, "
124                      "maximum 2047 MB", machine->ram_size / MiB);
125         exit(1);
126     }
127 
128     memory_region_add_subregion(get_system_memory(), 0, machine->ram);
129 
130     /* allocate and load firmware ROM */
131     memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", PROM_SIZE,
132                            &error_fatal);
133     memory_region_add_subregion(get_system_memory(), PROM_BASE, bios);
134 
135     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
136     if (filename) {
137         /* Load OpenBIOS (ELF) */
138         bios_size = load_elf(filename, NULL, NULL, NULL, NULL, &bios_addr,
139                              NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
140         /* Unfortunately, load_elf sign-extends reading elf32 */
141         bios_addr = (uint32_t)bios_addr;
142 
143         if (bios_size <= 0) {
144             /* or if could not load ELF try loading a binary ROM image */
145             bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
146             bios_addr = PROM_BASE;
147         }
148         g_free(filename);
149     }
150     if (bios_size < 0 || bios_addr - PROM_BASE + bios_size > PROM_SIZE) {
151         error_report("could not load PowerPC bios '%s'", bios_name);
152         exit(1);
153     }
154 
155     if (machine->kernel_filename) {
156         int bswap_needed = 0;
157 
158 #ifdef BSWAP_NEEDED
159         bswap_needed = 1;
160 #endif
161         kernel_base = KERNEL_LOAD_ADDR;
162         kernel_size = load_elf(machine->kernel_filename, NULL,
163                                translate_kernel_address, NULL, NULL, NULL,
164                                NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
165         if (kernel_size < 0) {
166             kernel_size = load_aout(machine->kernel_filename, kernel_base,
167                                     machine->ram_size - kernel_base,
168                                     bswap_needed, TARGET_PAGE_SIZE);
169         }
170         if (kernel_size < 0) {
171             kernel_size = load_image_targphys(machine->kernel_filename,
172                                               kernel_base,
173                                               machine->ram_size - kernel_base);
174         }
175         if (kernel_size < 0) {
176             error_report("could not load kernel '%s'",
177                          machine->kernel_filename);
178             exit(1);
179         }
180         /* load initrd */
181         if (machine->initrd_filename) {
182             initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size +
183                                             KERNEL_GAP);
184             initrd_size = load_image_targphys(machine->initrd_filename,
185                                               initrd_base,
186                                               machine->ram_size - initrd_base);
187             if (initrd_size < 0) {
188                 error_report("could not load initial ram disk '%s'",
189                              machine->initrd_filename);
190                 exit(1);
191             }
192             cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
193         } else {
194             cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
195         }
196         ppc_boot_device = 'm';
197     } else {
198         ppc_boot_device = '\0';
199         for (i = 0; machine->boot_config.order[i] != '\0'; i++) {
200             /*
201              * TOFIX: for now, the second IDE channel is not properly
202              *        used by OHW. The Mac floppy disk are not emulated.
203              *        For now, OHW cannot boot from the network.
204              */
205 #if 0
206             if (machine->boot_config.order[i] >= 'a' &&
207                 machine->boot_config.order[i] <= 'f') {
208                 ppc_boot_device = machine->boot_config.order[i];
209                 break;
210             }
211 #else
212             if (machine->boot_config.order[i] >= 'c' &&
213                 machine->boot_config.order[i] <= 'd') {
214                 ppc_boot_device = machine->boot_config.order[i];
215                 break;
216             }
217 #endif
218         }
219         if (ppc_boot_device == '\0') {
220             error_report("No valid boot device for G3 Beige machine");
221             exit(1);
222         }
223     }
224 
225     /* Grackle PCI host bridge */
226     grackle_dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE);
227     qdev_prop_set_uint32(grackle_dev, "ofw-addr", 0x80000000);
228     s = SYS_BUS_DEVICE(grackle_dev);
229     sysbus_realize_and_unref(s, &error_fatal);
230 
231     sysbus_mmio_map(s, 0, GRACKLE_BASE);
232     sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
233     /* PCI hole */
234     memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
235                                 sysbus_mmio_get_region(s, 2));
236     /* Register 2 MB of ISA IO space */
237     memory_region_add_subregion(get_system_memory(), 0xfe000000,
238                                 sysbus_mmio_get_region(s, 3));
239 
240     pci_bus = PCI_HOST_BRIDGE(grackle_dev)->bus;
241 
242     /* MacIO */
243     macio = OBJECT(pci_new(PCI_DEVFN(16, 0), TYPE_OLDWORLD_MACIO));
244     qdev_prop_set_uint64(DEVICE(macio), "frequency", tbfreq);
245 
246     dev = DEVICE(object_resolve_path_component(macio, "escc"));
247     qdev_prop_set_chr(dev, "chrA", serial_hd(0));
248     qdev_prop_set_chr(dev, "chrB", serial_hd(1));
249 
250     dinfo = drive_get(IF_MTD, 0, 0);
251     if (dinfo) {
252         dev = DEVICE(object_resolve_path_component(macio, "nvram"));
253         qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo));
254     }
255 
256     pci_realize_and_unref(PCI_DEVICE(macio), pci_bus, &error_fatal);
257 
258     pic_dev = DEVICE(object_resolve_path_component(macio, "pic"));
259     for (i = 0; i < 4; i++) {
260         qdev_connect_gpio_out(grackle_dev, i,
261                               qdev_get_gpio_in(pic_dev, 0x15 + i));
262     }
263 
264     /* Connect the heathrow PIC outputs to the 6xx bus */
265     for (i = 0; i < machine->smp.cpus; i++) {
266         switch (PPC_INPUT(env)) {
267         case PPC_FLAGS_INPUT_6xx:
268             /* XXX: we register only 1 output pin for heathrow PIC */
269             qdev_connect_gpio_out(pic_dev, 0,
270                               qdev_get_gpio_in(DEVICE(cpu), PPC6xx_INPUT_INT));
271             break;
272         default:
273             error_report("Bus model not supported on OldWorld Mac machine");
274             exit(1);
275         }
276     }
277 
278     pci_vga_init(pci_bus);
279 
280     pci_init_nic_devices(pci_bus, mc->default_nic);
281 
282     /* MacIO IDE */
283     ide_drive_get(hd, ARRAY_SIZE(hd));
284     macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[0]"));
285     macio_ide_init_drives(macio_ide, hd);
286 
287     macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[1]"));
288     macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
289 
290     /* MacIO CUDA/ADB */
291     dev = DEVICE(object_resolve_path_component(macio, "cuda"));
292     adb_bus = qdev_get_child_bus(dev, "adb.0");
293     dev = qdev_new(TYPE_ADB_KEYBOARD);
294     qdev_realize_and_unref(dev, adb_bus, &error_fatal);
295     dev = qdev_new(TYPE_ADB_MOUSE);
296     qdev_realize_and_unref(dev, adb_bus, &error_fatal);
297 
298     if (machine_usb(machine)) {
299         pci_create_simple(pci_bus, -1, "pci-ohci");
300     }
301 
302     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
303         graphic_depth = 15;
304     }
305 
306     /* No PCI init: the BIOS will do it */
307 
308     dev = qdev_new(TYPE_FW_CFG_MEM);
309     fw_cfg = FW_CFG(dev);
310     qdev_prop_set_uint32(dev, "data_width", 1);
311     qdev_prop_set_bit(dev, "dma_enabled", false);
312     object_property_add_child(OBJECT(machine), TYPE_FW_CFG, OBJECT(fw_cfg));
313     s = SYS_BUS_DEVICE(dev);
314     sysbus_realize_and_unref(s, &error_fatal);
315     sysbus_mmio_map(s, 0, CFG_ADDR);
316     sysbus_mmio_map(s, 1, CFG_ADDR + 2);
317 
318     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)machine->smp.cpus);
319     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
320     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
321     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
322     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
323     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
324     if (machine->kernel_cmdline) {
325         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
326         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE,
327                          machine->kernel_cmdline);
328     } else {
329         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
330     }
331     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
332     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
333     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
334 
335     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
336     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
337     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
338 
339     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
340     if (kvm_enabled()) {
341         uint8_t *hypercall;
342 
343         hypercall = g_malloc(16);
344         kvmppc_get_hypercall(env, hypercall, 16);
345         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
346         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
347     }
348     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
349     /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
350     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
351     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
352 
353     /* MacOS NDRV VGA driver */
354     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
355     if (filename) {
356         gchar *ndrv_file;
357         gsize ndrv_size;
358 
359         if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
360             fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
361         }
362         g_free(filename);
363     }
364 
365     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
366 }
367 
368 /*
369  * Implementation of an interface to adjust firmware path
370  * for the bootindex property handling.
371  */
372 static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus,
373                                   DeviceState *dev)
374 {
375     PCIDevice *pci;
376     MACIOIDEState *macio_ide;
377 
378     if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) {
379         pci = PCI_DEVICE(dev);
380         return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
381     }
382 
383     if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
384         macio_ide = MACIO_IDE(dev);
385         return g_strdup_printf("ata-3@%x", macio_ide->addr);
386     }
387 
388     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
389         return g_strdup("disk");
390     }
391 
392     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
393         return g_strdup("cdrom");
394     }
395 
396     if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
397         return g_strdup("disk");
398     }
399 
400     return NULL;
401 }
402 
403 static int heathrow_kvm_type(MachineState *machine, const char *arg)
404 {
405     /* Always force PR KVM */
406     return 2;
407 }
408 
409 static void heathrow_class_init(ObjectClass *oc, void *data)
410 {
411     MachineClass *mc = MACHINE_CLASS(oc);
412     FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
413 
414     mc->desc = "Heathrow based PowerMAC";
415     mc->init = ppc_heathrow_init;
416     mc->block_default_type = IF_IDE;
417     /* SMP is not supported currently */
418     mc->max_cpus = 1;
419 #ifndef TARGET_PPC64
420     mc->is_default = true;
421 #endif
422     /* TOFIX "cad" when Mac floppy is implemented */
423     mc->default_boot_order = "cd";
424     mc->kvm_type = heathrow_kvm_type;
425     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
426     mc->default_display = "std";
427     mc->default_nic = "ne2k_pci";
428     mc->ignore_boot_device_suffixes = true;
429     mc->default_ram_id = "ppc_heathrow.ram";
430     fwc->get_dev_path = heathrow_fw_dev_path;
431 }
432 
433 static const TypeInfo ppc_heathrow_machine_info = {
434     .name          = MACHINE_TYPE_NAME("g3beige"),
435     .parent        = TYPE_MACHINE,
436     .class_init    = heathrow_class_init,
437     .interfaces = (InterfaceInfo[]) {
438         { TYPE_FW_PATH_PROVIDER },
439         { }
440     },
441 };
442 
443 static void ppc_heathrow_register_types(void)
444 {
445     type_register_static(&ppc_heathrow_machine_info);
446 }
447 
448 type_init(ppc_heathrow_register_types);
449