1 /* 2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator 3 * 4 * Copyright (c) 2004-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 * 25 * PCI bus layout on a real G5 (U3 based): 26 * 27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b] 28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150] 29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a] 30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) 31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) 32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045] 33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046] 34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047] 35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048] 36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049] 37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20) 38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040] 39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040] 40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43) 41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43) 42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04) 43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043] 44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042] 45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c] 46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240] 47 * 48 */ 49 #include "qemu/osdep.h" 50 #include "qapi/error.h" 51 #include "hw/hw.h" 52 #include "hw/ppc/ppc.h" 53 #include "hw/ppc/mac.h" 54 #include "hw/input/adb.h" 55 #include "hw/ppc/mac_dbdma.h" 56 #include "hw/timer/m48t59.h" 57 #include "hw/pci/pci.h" 58 #include "net/net.h" 59 #include "sysemu/sysemu.h" 60 #include "hw/boards.h" 61 #include "hw/nvram/fw_cfg.h" 62 #include "hw/char/escc.h" 63 #include "hw/misc/macio/macio.h" 64 #include "hw/ppc/openpic.h" 65 #include "hw/ide.h" 66 #include "hw/loader.h" 67 #include "elf.h" 68 #include "qemu/error-report.h" 69 #include "sysemu/kvm.h" 70 #include "kvm_ppc.h" 71 #include "hw/usb.h" 72 #include "exec/address-spaces.h" 73 #include "hw/sysbus.h" 74 #include "qemu/cutils.h" 75 #include "trace.h" 76 77 #define MAX_IDE_BUS 2 78 #define CFG_ADDR 0xf0000510 79 #define TBFREQ (100UL * 1000UL * 1000UL) 80 #define CLOCKFREQ (900UL * 1000UL * 1000UL) 81 #define BUSFREQ (100UL * 1000UL * 1000UL) 82 83 #define NDRV_VGA_FILENAME "qemu_vga.ndrv" 84 85 /* UniN device */ 86 static void unin_write(void *opaque, hwaddr addr, uint64_t value, 87 unsigned size) 88 { 89 trace_mac99_uninorth_write(addr, value); 90 if (addr == 0x0) { 91 *(int*)opaque = value; 92 } 93 } 94 95 static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size) 96 { 97 uint32_t value; 98 99 value = 0; 100 switch (addr) { 101 case 0: 102 value = *(int*)opaque; 103 } 104 105 trace_mac99_uninorth_read(addr, value); 106 107 return value; 108 } 109 110 static const MemoryRegionOps unin_ops = { 111 .read = unin_read, 112 .write = unin_write, 113 .endianness = DEVICE_NATIVE_ENDIAN, 114 }; 115 116 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 117 Error **errp) 118 { 119 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 120 } 121 122 static uint64_t translate_kernel_address(void *opaque, uint64_t addr) 123 { 124 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; 125 } 126 127 static void ppc_core99_reset(void *opaque) 128 { 129 PowerPCCPU *cpu = opaque; 130 131 cpu_reset(CPU(cpu)); 132 /* 970 CPUs want to get their initial IP as part of their boot protocol */ 133 cpu->env.nip = PROM_ADDR + 0x100; 134 } 135 136 /* PowerPC Mac99 hardware initialisation */ 137 static void ppc_core99_init(MachineState *machine) 138 { 139 ram_addr_t ram_size = machine->ram_size; 140 const char *kernel_filename = machine->kernel_filename; 141 const char *kernel_cmdline = machine->kernel_cmdline; 142 const char *initrd_filename = machine->initrd_filename; 143 const char *boot_device = machine->boot_order; 144 PowerPCCPU *cpu = NULL; 145 CPUPPCState *env = NULL; 146 char *filename; 147 qemu_irq *pic, **openpic_irqs; 148 MemoryRegion *isa = g_new(MemoryRegion, 1); 149 MemoryRegion *unin_memory = g_new(MemoryRegion, 1); 150 MemoryRegion *unin2_memory = g_new(MemoryRegion, 1); 151 int linux_boot, i, j, k; 152 MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1); 153 hwaddr kernel_base, initrd_base, cmdline_base = 0; 154 long kernel_size, initrd_size; 155 PCIBus *pci_bus; 156 NewWorldMacIOState *macio; 157 MACIOIDEState *macio_ide; 158 BusState *adb_bus; 159 MacIONVRAMState *nvr; 160 int bios_size, ndrv_size; 161 uint8_t *ndrv_file; 162 int ppc_boot_device; 163 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 164 void *fw_cfg; 165 int machine_arch; 166 SysBusDevice *s; 167 DeviceState *dev, *pic_dev; 168 int *token = g_new(int, 1); 169 hwaddr nvram_addr = 0xFFF04000; 170 uint64_t tbfreq; 171 172 linux_boot = (kernel_filename != NULL); 173 174 /* init CPUs */ 175 for (i = 0; i < smp_cpus; i++) { 176 cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); 177 env = &cpu->env; 178 179 /* Set time-base frequency to 100 Mhz */ 180 cpu_ppc_tb_init(env, TBFREQ); 181 qemu_register_reset(ppc_core99_reset, cpu); 182 } 183 184 /* allocate RAM */ 185 memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size); 186 memory_region_add_subregion(get_system_memory(), 0, ram); 187 188 /* allocate and load BIOS */ 189 memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE, 190 &error_fatal); 191 192 if (bios_name == NULL) 193 bios_name = PROM_FILENAME; 194 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 195 memory_region_set_readonly(bios, true); 196 memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios); 197 198 /* Load OpenBIOS (ELF) */ 199 if (filename) { 200 bios_size = load_elf(filename, NULL, NULL, NULL, 201 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); 202 203 g_free(filename); 204 } else { 205 bios_size = -1; 206 } 207 if (bios_size < 0 || bios_size > BIOS_SIZE) { 208 error_report("could not load PowerPC bios '%s'", bios_name); 209 exit(1); 210 } 211 212 if (linux_boot) { 213 uint64_t lowaddr = 0; 214 int bswap_needed; 215 216 #ifdef BSWAP_NEEDED 217 bswap_needed = 1; 218 #else 219 bswap_needed = 0; 220 #endif 221 kernel_base = KERNEL_LOAD_ADDR; 222 223 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, 224 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, 225 0, 0); 226 if (kernel_size < 0) 227 kernel_size = load_aout(kernel_filename, kernel_base, 228 ram_size - kernel_base, bswap_needed, 229 TARGET_PAGE_SIZE); 230 if (kernel_size < 0) 231 kernel_size = load_image_targphys(kernel_filename, 232 kernel_base, 233 ram_size - kernel_base); 234 if (kernel_size < 0) { 235 error_report("could not load kernel '%s'", kernel_filename); 236 exit(1); 237 } 238 /* load initrd */ 239 if (initrd_filename) { 240 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); 241 initrd_size = load_image_targphys(initrd_filename, initrd_base, 242 ram_size - initrd_base); 243 if (initrd_size < 0) { 244 error_report("could not load initial ram disk '%s'", 245 initrd_filename); 246 exit(1); 247 } 248 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size); 249 } else { 250 initrd_base = 0; 251 initrd_size = 0; 252 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); 253 } 254 ppc_boot_device = 'm'; 255 } else { 256 kernel_base = 0; 257 kernel_size = 0; 258 initrd_base = 0; 259 initrd_size = 0; 260 ppc_boot_device = '\0'; 261 /* We consider that NewWorld PowerMac never have any floppy drive 262 * For now, OHW cannot boot from the network. 263 */ 264 for (i = 0; boot_device[i] != '\0'; i++) { 265 if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { 266 ppc_boot_device = boot_device[i]; 267 break; 268 } 269 } 270 if (ppc_boot_device == '\0') { 271 error_report("No valid boot device for Mac99 machine"); 272 exit(1); 273 } 274 } 275 276 /* Register 8 MB of ISA IO space */ 277 memory_region_init_alias(isa, NULL, "isa_mmio", 278 get_system_io(), 0, 0x00800000); 279 memory_region_add_subregion(get_system_memory(), 0xf2000000, isa); 280 281 /* UniN init: XXX should be a real device */ 282 memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000); 283 memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory); 284 285 memory_region_init_io(unin2_memory, NULL, &unin_ops, token, "unin", 0x1000); 286 memory_region_add_subregion(get_system_memory(), 0xf3000000, unin2_memory); 287 288 openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *)); 289 openpic_irqs[0] = 290 g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); 291 for (i = 0; i < smp_cpus; i++) { 292 /* Mac99 IRQ connection between OpenPIC outputs pins 293 * and PowerPC input pins 294 */ 295 switch (PPC_INPUT(env)) { 296 case PPC_FLAGS_INPUT_6xx: 297 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); 298 openpic_irqs[i][OPENPIC_OUTPUT_INT] = 299 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; 300 openpic_irqs[i][OPENPIC_OUTPUT_CINT] = 301 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; 302 openpic_irqs[i][OPENPIC_OUTPUT_MCK] = 303 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; 304 /* Not connected ? */ 305 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; 306 /* Check this */ 307 openpic_irqs[i][OPENPIC_OUTPUT_RESET] = 308 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; 309 break; 310 #if defined(TARGET_PPC64) 311 case PPC_FLAGS_INPUT_970: 312 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); 313 openpic_irqs[i][OPENPIC_OUTPUT_INT] = 314 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; 315 openpic_irqs[i][OPENPIC_OUTPUT_CINT] = 316 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; 317 openpic_irqs[i][OPENPIC_OUTPUT_MCK] = 318 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; 319 /* Not connected ? */ 320 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; 321 /* Check this */ 322 openpic_irqs[i][OPENPIC_OUTPUT_RESET] = 323 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; 324 break; 325 #endif /* defined(TARGET_PPC64) */ 326 default: 327 error_report("Bus model not supported on mac99 machine"); 328 exit(1); 329 } 330 } 331 332 pic = g_new0(qemu_irq, 64); 333 334 pic_dev = qdev_create(NULL, TYPE_OPENPIC); 335 qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO); 336 qdev_init_nofail(pic_dev); 337 s = SYS_BUS_DEVICE(pic_dev); 338 k = 0; 339 for (i = 0; i < smp_cpus; i++) { 340 for (j = 0; j < OPENPIC_OUTPUT_NB; j++) { 341 sysbus_connect_irq(s, k++, openpic_irqs[i][j]); 342 } 343 } 344 345 for (i = 0; i < 64; i++) { 346 pic[i] = qdev_get_gpio_in(pic_dev, i); 347 } 348 349 if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { 350 /* 970 gets a U3 bus */ 351 pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io()); 352 machine_arch = ARCH_MAC99_U3; 353 } else { 354 pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io()); 355 machine_arch = ARCH_MAC99; 356 } 357 object_property_set_bool(OBJECT(pci_bus), true, "realized", &error_abort); 358 359 machine->usb |= defaults_enabled() && !machine->usb_disabled; 360 361 /* Timebase Frequency */ 362 if (kvm_enabled()) { 363 tbfreq = kvmppc_get_tbfreq(); 364 } else { 365 tbfreq = TBFREQ; 366 } 367 368 /* MacIO */ 369 macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO)); 370 dev = DEVICE(macio); 371 qdev_connect_gpio_out(dev, 0, pic[0x19]); /* CUDA */ 372 qdev_connect_gpio_out(dev, 1, pic[0x24]); /* ESCC-B */ 373 qdev_connect_gpio_out(dev, 2, pic[0x25]); /* ESCC-A */ 374 qdev_connect_gpio_out(dev, 3, pic[0x0d]); /* IDE */ 375 qdev_connect_gpio_out(dev, 4, pic[0x02]); /* IDE DMA */ 376 qdev_connect_gpio_out(dev, 5, pic[0x0e]); /* IDE */ 377 qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE DMA */ 378 qdev_prop_set_uint64(dev, "frequency", tbfreq); 379 object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", 380 &error_abort); 381 qdev_init_nofail(dev); 382 383 /* We only emulate 2 out of 3 IDE controllers for now */ 384 ide_drive_get(hd, ARRAY_SIZE(hd)); 385 386 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), 387 "ide[0]")); 388 macio_ide_init_drives(macio_ide, hd); 389 390 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), 391 "ide[1]")); 392 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); 393 394 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); 395 adb_bus = qdev_get_child_bus(dev, "adb.0"); 396 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); 397 qdev_init_nofail(dev); 398 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); 399 qdev_init_nofail(dev); 400 401 if (machine->usb) { 402 pci_create_simple(pci_bus, -1, "pci-ohci"); 403 404 /* U3 needs to use USB for input because Linux doesn't support via-cuda 405 on PPC64 */ 406 if (machine_arch == ARCH_MAC99_U3) { 407 USBBus *usb_bus = usb_bus_find(-1); 408 409 usb_create_simple(usb_bus, "usb-kbd"); 410 usb_create_simple(usb_bus, "usb-mouse"); 411 } 412 } 413 414 pci_vga_init(pci_bus); 415 416 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) { 417 graphic_depth = 15; 418 } 419 420 for (i = 0; i < nb_nics; i++) { 421 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); 422 } 423 424 /* The NewWorld NVRAM is not located in the MacIO device */ 425 #ifdef CONFIG_KVM 426 if (kvm_enabled() && getpagesize() > 4096) { 427 /* We can't combine read-write and read-only in a single page, so 428 move the NVRAM out of ROM again for KVM */ 429 nvram_addr = 0xFFE00000; 430 } 431 #endif 432 dev = qdev_create(NULL, TYPE_MACIO_NVRAM); 433 qdev_prop_set_uint32(dev, "size", 0x2000); 434 qdev_prop_set_uint32(dev, "it_shift", 1); 435 qdev_init_nofail(dev); 436 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr); 437 nvr = MACIO_NVRAM(dev); 438 pmac_format_nvram_partition(nvr, 0x2000); 439 /* No PCI init: the BIOS will do it */ 440 441 fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2); 442 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); 443 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); 444 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); 445 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch); 446 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); 447 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); 448 if (kernel_cmdline) { 449 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); 450 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline); 451 } else { 452 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); 453 } 454 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); 455 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); 456 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); 457 458 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); 459 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); 460 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); 461 462 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); 463 if (kvm_enabled()) { 464 #ifdef CONFIG_KVM 465 uint8_t *hypercall; 466 467 hypercall = g_malloc(16); 468 kvmppc_get_hypercall(env, hypercall, 16); 469 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); 470 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); 471 #endif 472 } 473 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); 474 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ 475 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); 476 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); 477 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr); 478 479 /* MacOS NDRV VGA driver */ 480 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME); 481 if (filename) { 482 ndrv_size = get_image_size(filename); 483 if (ndrv_size != -1) { 484 ndrv_file = g_malloc(ndrv_size); 485 ndrv_size = load_image(filename, ndrv_file); 486 487 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size); 488 } 489 g_free(filename); 490 } 491 492 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 493 } 494 495 static int core99_kvm_type(const char *arg) 496 { 497 /* Always force PR KVM */ 498 return 2; 499 } 500 501 static void core99_machine_class_init(ObjectClass *oc, void *data) 502 { 503 MachineClass *mc = MACHINE_CLASS(oc); 504 505 mc->desc = "Mac99 based PowerMAC"; 506 mc->init = ppc_core99_init; 507 mc->block_default_type = IF_IDE; 508 mc->max_cpus = MAX_CPUS; 509 mc->default_boot_order = "cd"; 510 mc->kvm_type = core99_kvm_type; 511 #ifdef TARGET_PPC64 512 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1"); 513 #else 514 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9"); 515 #endif 516 } 517 518 static const TypeInfo core99_machine_info = { 519 .name = MACHINE_TYPE_NAME("mac99"), 520 .parent = TYPE_MACHINE, 521 .class_init = core99_machine_class_init, 522 }; 523 524 static void mac_machine_register_types(void) 525 { 526 type_register_static(&core99_machine_info); 527 } 528 529 type_init(mac_machine_register_types) 530