1 /* 2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator 3 * 4 * Copyright (c) 2004-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 * 25 * PCI bus layout on a real G5 (U3 based): 26 * 27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b] 28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150] 29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a] 30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) 31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) 32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045] 33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046] 34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047] 35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048] 36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049] 37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20) 38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040] 39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040] 40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43) 41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43) 42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04) 43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043] 44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042] 45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c] 46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240] 47 * 48 */ 49 #include "qemu/osdep.h" 50 #include "qapi/error.h" 51 #include "hw/hw.h" 52 #include "hw/ppc/ppc.h" 53 #include "hw/ppc/mac.h" 54 #include "hw/input/adb.h" 55 #include "hw/ppc/mac_dbdma.h" 56 #include "hw/timer/m48t59.h" 57 #include "hw/pci/pci.h" 58 #include "net/net.h" 59 #include "sysemu/sysemu.h" 60 #include "hw/boards.h" 61 #include "hw/nvram/fw_cfg.h" 62 #include "hw/char/escc.h" 63 #include "hw/misc/macio/macio.h" 64 #include "hw/ppc/openpic.h" 65 #include "hw/ide.h" 66 #include "hw/loader.h" 67 #include "elf.h" 68 #include "qemu/error-report.h" 69 #include "sysemu/kvm.h" 70 #include "kvm_ppc.h" 71 #include "hw/usb.h" 72 #include "exec/address-spaces.h" 73 #include "hw/sysbus.h" 74 #include "qemu/cutils.h" 75 #include "trace.h" 76 77 #define MAX_IDE_BUS 2 78 #define CFG_ADDR 0xf0000510 79 #define TBFREQ (100UL * 1000UL * 1000UL) 80 #define CLOCKFREQ (900UL * 1000UL * 1000UL) 81 #define BUSFREQ (100UL * 1000UL * 1000UL) 82 83 #define NDRV_VGA_FILENAME "qemu_vga.ndrv" 84 85 86 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 87 Error **errp) 88 { 89 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 90 } 91 92 static uint64_t translate_kernel_address(void *opaque, uint64_t addr) 93 { 94 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; 95 } 96 97 static void ppc_core99_reset(void *opaque) 98 { 99 PowerPCCPU *cpu = opaque; 100 101 cpu_reset(CPU(cpu)); 102 /* 970 CPUs want to get their initial IP as part of their boot protocol */ 103 cpu->env.nip = PROM_ADDR + 0x100; 104 } 105 106 /* PowerPC Mac99 hardware initialisation */ 107 static void ppc_core99_init(MachineState *machine) 108 { 109 ram_addr_t ram_size = machine->ram_size; 110 const char *kernel_filename = machine->kernel_filename; 111 const char *kernel_cmdline = machine->kernel_cmdline; 112 const char *initrd_filename = machine->initrd_filename; 113 const char *boot_device = machine->boot_order; 114 PowerPCCPU *cpu = NULL; 115 CPUPPCState *env = NULL; 116 char *filename; 117 qemu_irq **openpic_irqs; 118 int linux_boot, i, j, k; 119 MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1); 120 hwaddr kernel_base, initrd_base, cmdline_base = 0; 121 long kernel_size, initrd_size; 122 UNINHostState *uninorth_pci; 123 PCIBus *pci_bus; 124 NewWorldMacIOState *macio; 125 MACIOIDEState *macio_ide; 126 BusState *adb_bus; 127 MacIONVRAMState *nvr; 128 int bios_size, ndrv_size; 129 uint8_t *ndrv_file; 130 int ppc_boot_device; 131 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; 132 void *fw_cfg; 133 int machine_arch; 134 SysBusDevice *s; 135 DeviceState *dev, *pic_dev; 136 hwaddr nvram_addr = 0xFFF04000; 137 uint64_t tbfreq; 138 139 linux_boot = (kernel_filename != NULL); 140 141 /* init CPUs */ 142 for (i = 0; i < smp_cpus; i++) { 143 cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); 144 env = &cpu->env; 145 146 /* Set time-base frequency to 100 Mhz */ 147 cpu_ppc_tb_init(env, TBFREQ); 148 qemu_register_reset(ppc_core99_reset, cpu); 149 } 150 151 /* allocate RAM */ 152 memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size); 153 memory_region_add_subregion(get_system_memory(), 0, ram); 154 155 /* allocate and load BIOS */ 156 memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE, 157 &error_fatal); 158 159 if (bios_name == NULL) 160 bios_name = PROM_FILENAME; 161 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); 162 memory_region_set_readonly(bios, true); 163 memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios); 164 165 /* Load OpenBIOS (ELF) */ 166 if (filename) { 167 bios_size = load_elf(filename, NULL, NULL, NULL, 168 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); 169 170 g_free(filename); 171 } else { 172 bios_size = -1; 173 } 174 if (bios_size < 0 || bios_size > BIOS_SIZE) { 175 error_report("could not load PowerPC bios '%s'", bios_name); 176 exit(1); 177 } 178 179 if (linux_boot) { 180 uint64_t lowaddr = 0; 181 int bswap_needed; 182 183 #ifdef BSWAP_NEEDED 184 bswap_needed = 1; 185 #else 186 bswap_needed = 0; 187 #endif 188 kernel_base = KERNEL_LOAD_ADDR; 189 190 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, 191 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, 192 0, 0); 193 if (kernel_size < 0) 194 kernel_size = load_aout(kernel_filename, kernel_base, 195 ram_size - kernel_base, bswap_needed, 196 TARGET_PAGE_SIZE); 197 if (kernel_size < 0) 198 kernel_size = load_image_targphys(kernel_filename, 199 kernel_base, 200 ram_size - kernel_base); 201 if (kernel_size < 0) { 202 error_report("could not load kernel '%s'", kernel_filename); 203 exit(1); 204 } 205 /* load initrd */ 206 if (initrd_filename) { 207 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); 208 initrd_size = load_image_targphys(initrd_filename, initrd_base, 209 ram_size - initrd_base); 210 if (initrd_size < 0) { 211 error_report("could not load initial ram disk '%s'", 212 initrd_filename); 213 exit(1); 214 } 215 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size); 216 } else { 217 initrd_base = 0; 218 initrd_size = 0; 219 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); 220 } 221 ppc_boot_device = 'm'; 222 } else { 223 kernel_base = 0; 224 kernel_size = 0; 225 initrd_base = 0; 226 initrd_size = 0; 227 ppc_boot_device = '\0'; 228 /* We consider that NewWorld PowerMac never have any floppy drive 229 * For now, OHW cannot boot from the network. 230 */ 231 for (i = 0; boot_device[i] != '\0'; i++) { 232 if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { 233 ppc_boot_device = boot_device[i]; 234 break; 235 } 236 } 237 if (ppc_boot_device == '\0') { 238 error_report("No valid boot device for Mac99 machine"); 239 exit(1); 240 } 241 } 242 243 /* UniN init */ 244 dev = qdev_create(NULL, TYPE_UNI_NORTH); 245 qdev_init_nofail(dev); 246 s = SYS_BUS_DEVICE(dev); 247 memory_region_add_subregion(get_system_memory(), 0xf8000000, 248 sysbus_mmio_get_region(s, 0)); 249 250 openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *)); 251 openpic_irqs[0] = 252 g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); 253 for (i = 0; i < smp_cpus; i++) { 254 /* Mac99 IRQ connection between OpenPIC outputs pins 255 * and PowerPC input pins 256 */ 257 switch (PPC_INPUT(env)) { 258 case PPC_FLAGS_INPUT_6xx: 259 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); 260 openpic_irqs[i][OPENPIC_OUTPUT_INT] = 261 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; 262 openpic_irqs[i][OPENPIC_OUTPUT_CINT] = 263 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; 264 openpic_irqs[i][OPENPIC_OUTPUT_MCK] = 265 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; 266 /* Not connected ? */ 267 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; 268 /* Check this */ 269 openpic_irqs[i][OPENPIC_OUTPUT_RESET] = 270 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; 271 break; 272 #if defined(TARGET_PPC64) 273 case PPC_FLAGS_INPUT_970: 274 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); 275 openpic_irqs[i][OPENPIC_OUTPUT_INT] = 276 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; 277 openpic_irqs[i][OPENPIC_OUTPUT_CINT] = 278 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; 279 openpic_irqs[i][OPENPIC_OUTPUT_MCK] = 280 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; 281 /* Not connected ? */ 282 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; 283 /* Check this */ 284 openpic_irqs[i][OPENPIC_OUTPUT_RESET] = 285 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; 286 break; 287 #endif /* defined(TARGET_PPC64) */ 288 default: 289 error_report("Bus model not supported on mac99 machine"); 290 exit(1); 291 } 292 } 293 294 pic_dev = qdev_create(NULL, TYPE_OPENPIC); 295 qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO); 296 qdev_init_nofail(pic_dev); 297 s = SYS_BUS_DEVICE(pic_dev); 298 k = 0; 299 for (i = 0; i < smp_cpus; i++) { 300 for (j = 0; j < OPENPIC_OUTPUT_NB; j++) { 301 sysbus_connect_irq(s, k++, openpic_irqs[i][j]); 302 } 303 } 304 305 if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { 306 /* 970 gets a U3 bus */ 307 /* Uninorth AGP bus */ 308 dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE); 309 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", 310 &error_abort); 311 qdev_init_nofail(dev); 312 uninorth_pci = U3_AGP_HOST_BRIDGE(dev); 313 s = SYS_BUS_DEVICE(dev); 314 /* PCI hole */ 315 memory_region_add_subregion(get_system_memory(), 0x80000000ULL, 316 sysbus_mmio_get_region(s, 2)); 317 /* Register 8 MB of ISA IO space */ 318 memory_region_add_subregion(get_system_memory(), 0xf2000000, 319 sysbus_mmio_get_region(s, 3)); 320 sysbus_mmio_map(s, 0, 0xf0800000); 321 sysbus_mmio_map(s, 1, 0xf0c00000); 322 323 machine_arch = ARCH_MAC99_U3; 324 } else { 325 /* Use values found on a real PowerMac */ 326 /* Uninorth AGP bus */ 327 dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE); 328 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", 329 &error_abort); 330 qdev_init_nofail(dev); 331 s = SYS_BUS_DEVICE(dev); 332 sysbus_mmio_map(s, 0, 0xf0800000); 333 sysbus_mmio_map(s, 1, 0xf0c00000); 334 335 /* Uninorth internal bus */ 336 dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); 337 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", 338 &error_abort); 339 qdev_init_nofail(dev); 340 s = SYS_BUS_DEVICE(dev); 341 sysbus_mmio_map(s, 0, 0xf4800000); 342 sysbus_mmio_map(s, 1, 0xf4c00000); 343 344 /* Uninorth main bus */ 345 dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); 346 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", 347 &error_abort); 348 qdev_init_nofail(dev); 349 uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev); 350 s = SYS_BUS_DEVICE(dev); 351 /* PCI hole */ 352 memory_region_add_subregion(get_system_memory(), 0x80000000ULL, 353 sysbus_mmio_get_region(s, 2)); 354 /* Register 8 MB of ISA IO space */ 355 memory_region_add_subregion(get_system_memory(), 0xf2000000, 356 sysbus_mmio_get_region(s, 3)); 357 sysbus_mmio_map(s, 0, 0xf2800000); 358 sysbus_mmio_map(s, 1, 0xf2c00000); 359 360 machine_arch = ARCH_MAC99; 361 } 362 363 machine->usb |= defaults_enabled() && !machine->usb_disabled; 364 365 /* Timebase Frequency */ 366 if (kvm_enabled()) { 367 tbfreq = kvmppc_get_tbfreq(); 368 } else { 369 tbfreq = TBFREQ; 370 } 371 372 /* init basic PC hardware */ 373 pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus; 374 375 /* MacIO */ 376 macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO)); 377 dev = DEVICE(macio); 378 qdev_prop_set_uint64(dev, "frequency", tbfreq); 379 object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", 380 &error_abort); 381 qdev_init_nofail(dev); 382 383 /* We only emulate 2 out of 3 IDE controllers for now */ 384 ide_drive_get(hd, ARRAY_SIZE(hd)); 385 386 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), 387 "ide[0]")); 388 macio_ide_init_drives(macio_ide, hd); 389 390 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), 391 "ide[1]")); 392 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); 393 394 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); 395 adb_bus = qdev_get_child_bus(dev, "adb.0"); 396 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); 397 qdev_init_nofail(dev); 398 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); 399 qdev_init_nofail(dev); 400 401 if (machine->usb) { 402 pci_create_simple(pci_bus, -1, "pci-ohci"); 403 404 /* U3 needs to use USB for input because Linux doesn't support via-cuda 405 on PPC64 */ 406 if (machine_arch == ARCH_MAC99_U3) { 407 USBBus *usb_bus = usb_bus_find(-1); 408 409 usb_create_simple(usb_bus, "usb-kbd"); 410 usb_create_simple(usb_bus, "usb-mouse"); 411 } 412 } 413 414 pci_vga_init(pci_bus); 415 416 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) { 417 graphic_depth = 15; 418 } 419 420 for (i = 0; i < nb_nics; i++) { 421 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); 422 } 423 424 /* The NewWorld NVRAM is not located in the MacIO device */ 425 #ifdef CONFIG_KVM 426 if (kvm_enabled() && getpagesize() > 4096) { 427 /* We can't combine read-write and read-only in a single page, so 428 move the NVRAM out of ROM again for KVM */ 429 nvram_addr = 0xFFE00000; 430 } 431 #endif 432 dev = qdev_create(NULL, TYPE_MACIO_NVRAM); 433 qdev_prop_set_uint32(dev, "size", 0x2000); 434 qdev_prop_set_uint32(dev, "it_shift", 1); 435 qdev_init_nofail(dev); 436 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr); 437 nvr = MACIO_NVRAM(dev); 438 pmac_format_nvram_partition(nvr, 0x2000); 439 /* No PCI init: the BIOS will do it */ 440 441 fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2); 442 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); 443 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); 444 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); 445 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch); 446 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); 447 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); 448 if (kernel_cmdline) { 449 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); 450 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline); 451 } else { 452 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); 453 } 454 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); 455 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); 456 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); 457 458 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); 459 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); 460 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); 461 462 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); 463 if (kvm_enabled()) { 464 #ifdef CONFIG_KVM 465 uint8_t *hypercall; 466 467 hypercall = g_malloc(16); 468 kvmppc_get_hypercall(env, hypercall, 16); 469 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); 470 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); 471 #endif 472 } 473 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); 474 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ 475 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); 476 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); 477 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr); 478 479 /* MacOS NDRV VGA driver */ 480 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME); 481 if (filename) { 482 ndrv_size = get_image_size(filename); 483 if (ndrv_size != -1) { 484 ndrv_file = g_malloc(ndrv_size); 485 ndrv_size = load_image(filename, ndrv_file); 486 487 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size); 488 } 489 g_free(filename); 490 } 491 492 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 493 } 494 495 static int core99_kvm_type(const char *arg) 496 { 497 /* Always force PR KVM */ 498 return 2; 499 } 500 501 static void core99_machine_class_init(ObjectClass *oc, void *data) 502 { 503 MachineClass *mc = MACHINE_CLASS(oc); 504 505 mc->desc = "Mac99 based PowerMAC"; 506 mc->init = ppc_core99_init; 507 mc->block_default_type = IF_IDE; 508 mc->max_cpus = MAX_CPUS; 509 mc->default_boot_order = "cd"; 510 mc->kvm_type = core99_kvm_type; 511 #ifdef TARGET_PPC64 512 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1"); 513 #else 514 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9"); 515 #endif 516 } 517 518 static const TypeInfo core99_machine_info = { 519 .name = MACHINE_TYPE_NAME("mac99"), 520 .parent = TYPE_MACHINE, 521 .class_init = core99_machine_class_init, 522 }; 523 524 static void mac_machine_register_types(void) 525 { 526 type_register_static(&core99_machine_info); 527 } 528 529 type_init(mac_machine_register_types) 530