xref: /openbmc/qemu/hw/ppc/mac_newworld.c (revision 7acafcfa)
1 /*
2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
3  *
4  * Copyright (c) 2004-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  *
25  * PCI bus layout on a real G5 (U3 based):
26  *
27  * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28  * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29  * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30  * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31  * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32  * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33  * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34  * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35  * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36  * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37  * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38  * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39  * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40  * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41  * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42  * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43  * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44  * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45  * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46  * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
47  */
48 
49 #include "qemu/osdep.h"
50 #include "qemu-common.h"
51 #include "qapi/error.h"
52 #include "hw/ppc/ppc.h"
53 #include "hw/qdev-properties.h"
54 #include "hw/ppc/mac.h"
55 #include "hw/input/adb.h"
56 #include "hw/ppc/mac_dbdma.h"
57 #include "hw/pci/pci.h"
58 #include "net/net.h"
59 #include "sysemu/sysemu.h"
60 #include "hw/boards.h"
61 #include "hw/nvram/fw_cfg.h"
62 #include "hw/char/escc.h"
63 #include "hw/misc/macio/macio.h"
64 #include "hw/ppc/openpic.h"
65 #include "hw/loader.h"
66 #include "hw/fw-path-provider.h"
67 #include "elf.h"
68 #include "qemu/error-report.h"
69 #include "sysemu/kvm.h"
70 #include "sysemu/reset.h"
71 #include "kvm_ppc.h"
72 #include "hw/usb.h"
73 #include "exec/address-spaces.h"
74 #include "hw/sysbus.h"
75 #include "trace.h"
76 
77 #define MAX_IDE_BUS 2
78 #define CFG_ADDR 0xf0000510
79 #define TBFREQ (100UL * 1000UL * 1000UL)
80 #define CLOCKFREQ (900UL * 1000UL * 1000UL)
81 #define BUSFREQ (100UL * 1000UL * 1000UL)
82 
83 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
84 
85 
86 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
87                             Error **errp)
88 {
89     fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
90 }
91 
92 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
93 {
94     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
95 }
96 
97 static void ppc_core99_reset(void *opaque)
98 {
99     PowerPCCPU *cpu = opaque;
100 
101     cpu_reset(CPU(cpu));
102     /* 970 CPUs want to get their initial IP as part of their boot protocol */
103     cpu->env.nip = PROM_ADDR + 0x100;
104 }
105 
106 /* PowerPC Mac99 hardware initialisation */
107 static void ppc_core99_init(MachineState *machine)
108 {
109     ram_addr_t ram_size = machine->ram_size;
110     const char *kernel_filename = machine->kernel_filename;
111     const char *kernel_cmdline = machine->kernel_cmdline;
112     const char *initrd_filename = machine->initrd_filename;
113     const char *boot_device = machine->boot_order;
114     Core99MachineState *core99_machine = CORE99_MACHINE(machine);
115     PowerPCCPU *cpu = NULL;
116     CPUPPCState *env = NULL;
117     char *filename;
118     IrqLines *openpic_irqs;
119     int linux_boot, i, j, k;
120     MemoryRegion *bios = g_new(MemoryRegion, 1);
121     hwaddr kernel_base, initrd_base, cmdline_base = 0;
122     long kernel_size, initrd_size;
123     UNINHostState *uninorth_pci;
124     PCIBus *pci_bus;
125     PCIDevice *macio;
126     bool has_pmu, has_adb;
127     MACIOIDEState *macio_ide;
128     BusState *adb_bus;
129     MacIONVRAMState *nvr;
130     int bios_size;
131     int ppc_boot_device;
132     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
133     void *fw_cfg;
134     int machine_arch;
135     SysBusDevice *s;
136     DeviceState *dev, *pic_dev;
137     hwaddr nvram_addr = 0xFFF04000;
138     uint64_t tbfreq;
139     unsigned int smp_cpus = machine->smp.cpus;
140 
141     linux_boot = (kernel_filename != NULL);
142 
143     /* init CPUs */
144     for (i = 0; i < smp_cpus; i++) {
145         cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
146         env = &cpu->env;
147 
148         /* Set time-base frequency to 100 Mhz */
149         cpu_ppc_tb_init(env, TBFREQ);
150         qemu_register_reset(ppc_core99_reset, cpu);
151     }
152 
153     /* allocate RAM */
154     memory_region_add_subregion(get_system_memory(), 0, machine->ram);
155 
156     /* allocate and load BIOS */
157     memory_region_init_rom(bios, NULL, "ppc_core99.bios", BIOS_SIZE,
158                            &error_fatal);
159 
160     if (bios_name == NULL)
161         bios_name = PROM_FILENAME;
162     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
163     memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
164 
165     /* Load OpenBIOS (ELF) */
166     if (filename) {
167         bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
168                              NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
169 
170         g_free(filename);
171     } else {
172         bios_size = -1;
173     }
174     if (bios_size < 0 || bios_size > BIOS_SIZE) {
175         error_report("could not load PowerPC bios '%s'", bios_name);
176         exit(1);
177     }
178 
179     if (linux_boot) {
180         uint64_t lowaddr = 0;
181         int bswap_needed;
182 
183 #ifdef BSWAP_NEEDED
184         bswap_needed = 1;
185 #else
186         bswap_needed = 0;
187 #endif
188         kernel_base = KERNEL_LOAD_ADDR;
189 
190         kernel_size = load_elf(kernel_filename, NULL,
191                                translate_kernel_address, NULL,
192                                NULL, &lowaddr, NULL, NULL, 1, PPC_ELF_MACHINE,
193                                0, 0);
194         if (kernel_size < 0)
195             kernel_size = load_aout(kernel_filename, kernel_base,
196                                     ram_size - kernel_base, bswap_needed,
197                                     TARGET_PAGE_SIZE);
198         if (kernel_size < 0)
199             kernel_size = load_image_targphys(kernel_filename,
200                                               kernel_base,
201                                               ram_size - kernel_base);
202         if (kernel_size < 0) {
203             error_report("could not load kernel '%s'", kernel_filename);
204             exit(1);
205         }
206         /* load initrd */
207         if (initrd_filename) {
208             initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
209             initrd_size = load_image_targphys(initrd_filename, initrd_base,
210                                               ram_size - initrd_base);
211             if (initrd_size < 0) {
212                 error_report("could not load initial ram disk '%s'",
213                              initrd_filename);
214                 exit(1);
215             }
216             cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
217         } else {
218             initrd_base = 0;
219             initrd_size = 0;
220             cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
221         }
222         ppc_boot_device = 'm';
223     } else {
224         kernel_base = 0;
225         kernel_size = 0;
226         initrd_base = 0;
227         initrd_size = 0;
228         ppc_boot_device = '\0';
229         /* We consider that NewWorld PowerMac never have any floppy drive
230          * For now, OHW cannot boot from the network.
231          */
232         for (i = 0; boot_device[i] != '\0'; i++) {
233             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
234                 ppc_boot_device = boot_device[i];
235                 break;
236             }
237         }
238         if (ppc_boot_device == '\0') {
239             error_report("No valid boot device for Mac99 machine");
240             exit(1);
241         }
242     }
243 
244     /* UniN init */
245     dev = qdev_new(TYPE_UNI_NORTH);
246     s = SYS_BUS_DEVICE(dev);
247     sysbus_realize_and_unref(s, &error_fatal);
248     memory_region_add_subregion(get_system_memory(), 0xf8000000,
249                                 sysbus_mmio_get_region(s, 0));
250 
251     openpic_irqs = g_new0(IrqLines, smp_cpus);
252     for (i = 0; i < smp_cpus; i++) {
253         /* Mac99 IRQ connection between OpenPIC outputs pins
254          * and PowerPC input pins
255          */
256         switch (PPC_INPUT(env)) {
257         case PPC_FLAGS_INPUT_6xx:
258             openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
259                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
260             openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
261                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
262             openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
263                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
264             /* Not connected ? */
265             openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
266             /* Check this */
267             openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
268                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
269             break;
270 #if defined(TARGET_PPC64)
271         case PPC_FLAGS_INPUT_970:
272             openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
273                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
274             openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
275                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
276             openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
277                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
278             /* Not connected ? */
279             openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
280             /* Check this */
281             openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
282                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
283             break;
284 #endif /* defined(TARGET_PPC64) */
285         default:
286             error_report("Bus model not supported on mac99 machine");
287             exit(1);
288         }
289     }
290 
291     pic_dev = qdev_new(TYPE_OPENPIC);
292     qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
293     s = SYS_BUS_DEVICE(pic_dev);
294     sysbus_realize_and_unref(s, &error_fatal);
295     k = 0;
296     for (i = 0; i < smp_cpus; i++) {
297         for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
298             sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
299         }
300     }
301     g_free(openpic_irqs);
302 
303     if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
304         /* 970 gets a U3 bus */
305         /* Uninorth AGP bus */
306         dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE);
307         object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
308                                  &error_abort);
309         sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
310         uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
311         s = SYS_BUS_DEVICE(dev);
312         /* PCI hole */
313         memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
314                                     sysbus_mmio_get_region(s, 2));
315         /* Register 8 MB of ISA IO space */
316         memory_region_add_subregion(get_system_memory(), 0xf2000000,
317                                     sysbus_mmio_get_region(s, 3));
318         sysbus_mmio_map(s, 0, 0xf0800000);
319         sysbus_mmio_map(s, 1, 0xf0c00000);
320 
321         machine_arch = ARCH_MAC99_U3;
322     } else {
323         /* Use values found on a real PowerMac */
324         /* Uninorth AGP bus */
325         dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
326         object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
327                                  &error_abort);
328         s = SYS_BUS_DEVICE(dev);
329         sysbus_realize_and_unref(s, &error_fatal);
330         sysbus_mmio_map(s, 0, 0xf0800000);
331         sysbus_mmio_map(s, 1, 0xf0c00000);
332 
333         /* Uninorth internal bus */
334         dev = qdev_new(TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
335         object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
336                                  &error_abort);
337         s = SYS_BUS_DEVICE(dev);
338         sysbus_realize_and_unref(s, &error_fatal);
339         sysbus_mmio_map(s, 0, 0xf4800000);
340         sysbus_mmio_map(s, 1, 0xf4c00000);
341 
342         /* Uninorth main bus */
343         dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
344         qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
345         object_property_set_link(OBJECT(dev), "pic", OBJECT(pic_dev),
346                                  &error_abort);
347         sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
348         uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
349         s = SYS_BUS_DEVICE(dev);
350         /* PCI hole */
351         memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
352                                     sysbus_mmio_get_region(s, 2));
353         /* Register 8 MB of ISA IO space */
354         memory_region_add_subregion(get_system_memory(), 0xf2000000,
355                                     sysbus_mmio_get_region(s, 3));
356         sysbus_mmio_map(s, 0, 0xf2800000);
357         sysbus_mmio_map(s, 1, 0xf2c00000);
358 
359         machine_arch = ARCH_MAC99;
360     }
361 
362     machine->usb |= defaults_enabled() && !machine->usb_disabled;
363     has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
364     has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
365                core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
366 
367     /* Timebase Frequency */
368     if (kvm_enabled()) {
369         tbfreq = kvmppc_get_tbfreq();
370     } else {
371         tbfreq = TBFREQ;
372     }
373 
374     /* init basic PC hardware */
375     pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
376 
377     /* MacIO */
378     macio = pci_new(-1, TYPE_NEWWORLD_MACIO);
379     dev = DEVICE(macio);
380     qdev_prop_set_uint64(dev, "frequency", tbfreq);
381     qdev_prop_set_bit(dev, "has-pmu", has_pmu);
382     qdev_prop_set_bit(dev, "has-adb", has_adb);
383     object_property_set_link(OBJECT(macio), "pic", OBJECT(pic_dev),
384                              &error_abort);
385     pci_realize_and_unref(macio, pci_bus, &error_fatal);
386 
387     /* We only emulate 2 out of 3 IDE controllers for now */
388     ide_drive_get(hd, ARRAY_SIZE(hd));
389 
390     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
391                                                         "ide[0]"));
392     macio_ide_init_drives(macio_ide, hd);
393 
394     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
395                                                         "ide[1]"));
396     macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
397 
398     if (has_adb) {
399         if (has_pmu) {
400             dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu"));
401         } else {
402             dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
403         }
404 
405         adb_bus = qdev_get_child_bus(dev, "adb.0");
406         dev = qdev_new(TYPE_ADB_KEYBOARD);
407         qdev_realize_and_unref(dev, adb_bus, &error_fatal);
408 
409         dev = qdev_new(TYPE_ADB_MOUSE);
410         qdev_realize_and_unref(dev, adb_bus, &error_fatal);
411     }
412 
413     if (machine->usb) {
414         pci_create_simple(pci_bus, -1, "pci-ohci");
415 
416         /* U3 needs to use USB for input because Linux doesn't support via-cuda
417         on PPC64 */
418         if (!has_adb || machine_arch == ARCH_MAC99_U3) {
419             USBBus *usb_bus = usb_bus_find(-1);
420 
421             usb_create_simple(usb_bus, "usb-kbd");
422             usb_create_simple(usb_bus, "usb-mouse");
423         }
424     }
425 
426     pci_vga_init(pci_bus);
427 
428     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
429         graphic_depth = 15;
430     }
431 
432     for (i = 0; i < nb_nics; i++) {
433         pci_nic_init_nofail(&nd_table[i], pci_bus, "sungem", NULL);
434     }
435 
436     /* The NewWorld NVRAM is not located in the MacIO device */
437     if (kvm_enabled() && qemu_real_host_page_size > 4096) {
438         /* We can't combine read-write and read-only in a single page, so
439            move the NVRAM out of ROM again for KVM */
440         nvram_addr = 0xFFE00000;
441     }
442     dev = qdev_new(TYPE_MACIO_NVRAM);
443     qdev_prop_set_uint32(dev, "size", 0x2000);
444     qdev_prop_set_uint32(dev, "it_shift", 1);
445     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
446     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
447     nvr = MACIO_NVRAM(dev);
448     pmac_format_nvram_partition(nvr, 0x2000);
449     /* No PCI init: the BIOS will do it */
450 
451     dev = qdev_new(TYPE_FW_CFG_MEM);
452     fw_cfg = FW_CFG(dev);
453     qdev_prop_set_uint32(dev, "data_width", 1);
454     qdev_prop_set_bit(dev, "dma_enabled", false);
455     object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
456                               OBJECT(fw_cfg));
457     s = SYS_BUS_DEVICE(dev);
458     sysbus_realize_and_unref(s, &error_fatal);
459     sysbus_mmio_map(s, 0, CFG_ADDR);
460     sysbus_mmio_map(s, 1, CFG_ADDR + 2);
461 
462     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
463     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
464     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
465     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
466     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
467     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
468     if (kernel_cmdline) {
469         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
470         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
471     } else {
472         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
473     }
474     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
475     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
476     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
477 
478     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
479     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
480     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
481 
482     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
483 
484     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
485     if (kvm_enabled()) {
486         uint8_t *hypercall;
487 
488         hypercall = g_malloc(16);
489         kvmppc_get_hypercall(env, hypercall, 16);
490         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
491         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
492     }
493     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
494     /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
495     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
496     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
497     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
498 
499     /* MacOS NDRV VGA driver */
500     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
501     if (filename) {
502         gchar *ndrv_file;
503         gsize ndrv_size;
504 
505         if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
506             fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
507         }
508         g_free(filename);
509     }
510 
511     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
512 }
513 
514 /*
515  * Implementation of an interface to adjust firmware path
516  * for the bootindex property handling.
517  */
518 static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
519                                 DeviceState *dev)
520 {
521     PCIDevice *pci;
522     IDEBus *ide_bus;
523     IDEState *ide_s;
524     MACIOIDEState *macio_ide;
525 
526     if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
527         pci = PCI_DEVICE(dev);
528         return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
529     }
530 
531     if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
532         macio_ide = MACIO_IDE(dev);
533         return g_strdup_printf("ata-3@%x", macio_ide->addr);
534     }
535 
536     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
537         ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
538         ide_s = idebus_active_if(ide_bus);
539 
540         if (ide_s->drive_kind == IDE_CD) {
541             return g_strdup("cdrom");
542         }
543 
544         return g_strdup("disk");
545     }
546 
547     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
548         return g_strdup("disk");
549     }
550 
551     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
552         return g_strdup("cdrom");
553     }
554 
555     if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
556         return g_strdup("disk");
557     }
558 
559     return NULL;
560 }
561 static int core99_kvm_type(MachineState *machine, const char *arg)
562 {
563     /* Always force PR KVM */
564     return 2;
565 }
566 
567 static void core99_machine_class_init(ObjectClass *oc, void *data)
568 {
569     MachineClass *mc = MACHINE_CLASS(oc);
570     FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
571 
572     mc->desc = "Mac99 based PowerMAC";
573     mc->init = ppc_core99_init;
574     mc->block_default_type = IF_IDE;
575     mc->max_cpus = MAX_CPUS;
576     mc->default_boot_order = "cd";
577     mc->default_display = "std";
578     mc->kvm_type = core99_kvm_type;
579 #ifdef TARGET_PPC64
580     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
581 #else
582     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
583 #endif
584     mc->default_ram_id = "ppc_core99.ram";
585     mc->ignore_boot_device_suffixes = true;
586     fwc->get_dev_path = core99_fw_dev_path;
587 }
588 
589 static char *core99_get_via_config(Object *obj, Error **errp)
590 {
591     Core99MachineState *cms = CORE99_MACHINE(obj);
592 
593     switch (cms->via_config) {
594     default:
595     case CORE99_VIA_CONFIG_CUDA:
596         return g_strdup("cuda");
597 
598     case CORE99_VIA_CONFIG_PMU:
599         return g_strdup("pmu");
600 
601     case CORE99_VIA_CONFIG_PMU_ADB:
602         return g_strdup("pmu-adb");
603     }
604 }
605 
606 static void core99_set_via_config(Object *obj, const char *value, Error **errp)
607 {
608     Core99MachineState *cms = CORE99_MACHINE(obj);
609 
610     if (!strcmp(value, "cuda")) {
611         cms->via_config = CORE99_VIA_CONFIG_CUDA;
612     } else if (!strcmp(value, "pmu")) {
613         cms->via_config = CORE99_VIA_CONFIG_PMU;
614     } else if (!strcmp(value, "pmu-adb")) {
615         cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
616     } else {
617         error_setg(errp, "Invalid via value");
618         error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
619     }
620 }
621 
622 static void core99_instance_init(Object *obj)
623 {
624     Core99MachineState *cms = CORE99_MACHINE(obj);
625 
626     /* Default via_config is CORE99_VIA_CONFIG_CUDA */
627     cms->via_config = CORE99_VIA_CONFIG_CUDA;
628     object_property_add_str(obj, "via", core99_get_via_config,
629                             core99_set_via_config);
630     object_property_set_description(obj, "via",
631                                     "Set VIA configuration. "
632                                     "Valid values are cuda, pmu and pmu-adb");
633 
634     return;
635 }
636 
637 static const TypeInfo core99_machine_info = {
638     .name          = MACHINE_TYPE_NAME("mac99"),
639     .parent        = TYPE_MACHINE,
640     .class_init    = core99_machine_class_init,
641     .instance_init = core99_instance_init,
642     .instance_size = sizeof(Core99MachineState),
643     .interfaces = (InterfaceInfo[]) {
644         { TYPE_FW_PATH_PROVIDER },
645         { }
646     },
647 };
648 
649 static void mac_machine_register_types(void)
650 {
651     type_register_static(&core99_machine_info);
652 }
653 
654 type_init(mac_machine_register_types)
655