xref: /openbmc/qemu/hw/ppc/mac_newworld.c (revision 3d9569b8)
1 /*
2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
3  *
4  * Copyright (c) 2004-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  *
25  * PCI bus layout on a real G5 (U3 based):
26  *
27  * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28  * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29  * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30  * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31  * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32  * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33  * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34  * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35  * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36  * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37  * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38  * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39  * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40  * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41  * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42  * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43  * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44  * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45  * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46  * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
47  */
48 
49 #include "qemu/osdep.h"
50 #include "qemu-common.h"
51 #include "qapi/error.h"
52 #include "hw/hw.h"
53 #include "hw/ppc/ppc.h"
54 #include "hw/ppc/mac.h"
55 #include "hw/input/adb.h"
56 #include "hw/ppc/mac_dbdma.h"
57 #include "hw/pci/pci.h"
58 #include "net/net.h"
59 #include "sysemu/sysemu.h"
60 #include "hw/boards.h"
61 #include "hw/nvram/fw_cfg.h"
62 #include "hw/char/escc.h"
63 #include "hw/misc/macio/macio.h"
64 #include "hw/ppc/openpic.h"
65 #include "hw/ide.h"
66 #include "hw/loader.h"
67 #include "hw/fw-path-provider.h"
68 #include "elf.h"
69 #include "qemu/error-report.h"
70 #include "sysemu/kvm.h"
71 #include "kvm_ppc.h"
72 #include "hw/usb.h"
73 #include "exec/address-spaces.h"
74 #include "hw/sysbus.h"
75 #include "trace.h"
76 
77 #define MAX_IDE_BUS 2
78 #define CFG_ADDR 0xf0000510
79 #define TBFREQ (100UL * 1000UL * 1000UL)
80 #define CLOCKFREQ (900UL * 1000UL * 1000UL)
81 #define BUSFREQ (100UL * 1000UL * 1000UL)
82 
83 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
84 
85 
86 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
87                             Error **errp)
88 {
89     fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
90 }
91 
92 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
93 {
94     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
95 }
96 
97 static void ppc_core99_reset(void *opaque)
98 {
99     PowerPCCPU *cpu = opaque;
100 
101     cpu_reset(CPU(cpu));
102     /* 970 CPUs want to get their initial IP as part of their boot protocol */
103     cpu->env.nip = PROM_ADDR + 0x100;
104 }
105 
106 /* PowerPC Mac99 hardware initialisation */
107 static void ppc_core99_init(MachineState *machine)
108 {
109     ram_addr_t ram_size = machine->ram_size;
110     const char *kernel_filename = machine->kernel_filename;
111     const char *kernel_cmdline = machine->kernel_cmdline;
112     const char *initrd_filename = machine->initrd_filename;
113     const char *boot_device = machine->boot_order;
114     Core99MachineState *core99_machine = CORE99_MACHINE(machine);
115     PowerPCCPU *cpu = NULL;
116     CPUPPCState *env = NULL;
117     char *filename;
118     IrqLines *openpic_irqs;
119     int linux_boot, i, j, k;
120     MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
121     hwaddr kernel_base, initrd_base, cmdline_base = 0;
122     long kernel_size, initrd_size;
123     UNINHostState *uninorth_pci;
124     PCIBus *pci_bus;
125     NewWorldMacIOState *macio;
126     bool has_pmu, has_adb;
127     MACIOIDEState *macio_ide;
128     BusState *adb_bus;
129     MacIONVRAMState *nvr;
130     int bios_size;
131     int ppc_boot_device;
132     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
133     void *fw_cfg;
134     int machine_arch;
135     SysBusDevice *s;
136     DeviceState *dev, *pic_dev;
137     hwaddr nvram_addr = 0xFFF04000;
138     uint64_t tbfreq;
139 
140     linux_boot = (kernel_filename != NULL);
141 
142     /* init CPUs */
143     for (i = 0; i < smp_cpus; i++) {
144         cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
145         env = &cpu->env;
146 
147         /* Set time-base frequency to 100 Mhz */
148         cpu_ppc_tb_init(env, TBFREQ);
149         qemu_register_reset(ppc_core99_reset, cpu);
150     }
151 
152     /* allocate RAM */
153     memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size);
154     memory_region_add_subregion(get_system_memory(), 0, ram);
155 
156     /* allocate and load BIOS */
157     memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE,
158                            &error_fatal);
159 
160     if (bios_name == NULL)
161         bios_name = PROM_FILENAME;
162     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
163     memory_region_set_readonly(bios, true);
164     memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
165 
166     /* Load OpenBIOS (ELF) */
167     if (filename) {
168         bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
169                              NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
170 
171         g_free(filename);
172     } else {
173         bios_size = -1;
174     }
175     if (bios_size < 0 || bios_size > BIOS_SIZE) {
176         error_report("could not load PowerPC bios '%s'", bios_name);
177         exit(1);
178     }
179 
180     if (linux_boot) {
181         uint64_t lowaddr = 0;
182         int bswap_needed;
183 
184 #ifdef BSWAP_NEEDED
185         bswap_needed = 1;
186 #else
187         bswap_needed = 0;
188 #endif
189         kernel_base = KERNEL_LOAD_ADDR;
190 
191         kernel_size = load_elf(kernel_filename, NULL,
192                                translate_kernel_address, NULL,
193                                NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
194                                0, 0);
195         if (kernel_size < 0)
196             kernel_size = load_aout(kernel_filename, kernel_base,
197                                     ram_size - kernel_base, bswap_needed,
198                                     TARGET_PAGE_SIZE);
199         if (kernel_size < 0)
200             kernel_size = load_image_targphys(kernel_filename,
201                                               kernel_base,
202                                               ram_size - kernel_base);
203         if (kernel_size < 0) {
204             error_report("could not load kernel '%s'", kernel_filename);
205             exit(1);
206         }
207         /* load initrd */
208         if (initrd_filename) {
209             initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
210             initrd_size = load_image_targphys(initrd_filename, initrd_base,
211                                               ram_size - initrd_base);
212             if (initrd_size < 0) {
213                 error_report("could not load initial ram disk '%s'",
214                              initrd_filename);
215                 exit(1);
216             }
217             cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
218         } else {
219             initrd_base = 0;
220             initrd_size = 0;
221             cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
222         }
223         ppc_boot_device = 'm';
224     } else {
225         kernel_base = 0;
226         kernel_size = 0;
227         initrd_base = 0;
228         initrd_size = 0;
229         ppc_boot_device = '\0';
230         /* We consider that NewWorld PowerMac never have any floppy drive
231          * For now, OHW cannot boot from the network.
232          */
233         for (i = 0; boot_device[i] != '\0'; i++) {
234             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
235                 ppc_boot_device = boot_device[i];
236                 break;
237             }
238         }
239         if (ppc_boot_device == '\0') {
240             error_report("No valid boot device for Mac99 machine");
241             exit(1);
242         }
243     }
244 
245     /* UniN init */
246     dev = qdev_create(NULL, TYPE_UNI_NORTH);
247     qdev_init_nofail(dev);
248     s = SYS_BUS_DEVICE(dev);
249     memory_region_add_subregion(get_system_memory(), 0xf8000000,
250                                 sysbus_mmio_get_region(s, 0));
251 
252     openpic_irqs = g_new0(IrqLines, smp_cpus);
253     for (i = 0; i < smp_cpus; i++) {
254         /* Mac99 IRQ connection between OpenPIC outputs pins
255          * and PowerPC input pins
256          */
257         switch (PPC_INPUT(env)) {
258         case PPC_FLAGS_INPUT_6xx:
259             openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
260                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
261             openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
262                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
263             openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
264                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
265             /* Not connected ? */
266             openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
267             /* Check this */
268             openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
269                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
270             break;
271 #if defined(TARGET_PPC64)
272         case PPC_FLAGS_INPUT_970:
273             openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
274                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
275             openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
276                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
277             openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
278                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
279             /* Not connected ? */
280             openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
281             /* Check this */
282             openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
283                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
284             break;
285 #endif /* defined(TARGET_PPC64) */
286         default:
287             error_report("Bus model not supported on mac99 machine");
288             exit(1);
289         }
290     }
291 
292     pic_dev = qdev_create(NULL, TYPE_OPENPIC);
293     qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
294     qdev_init_nofail(pic_dev);
295     s = SYS_BUS_DEVICE(pic_dev);
296     k = 0;
297     for (i = 0; i < smp_cpus; i++) {
298         for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
299             sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
300         }
301     }
302     g_free(openpic_irqs);
303 
304     if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
305         /* 970 gets a U3 bus */
306         /* Uninorth AGP bus */
307         dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
308         object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
309                                  &error_abort);
310         qdev_init_nofail(dev);
311         uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
312         s = SYS_BUS_DEVICE(dev);
313         /* PCI hole */
314         memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
315                                     sysbus_mmio_get_region(s, 2));
316         /* Register 8 MB of ISA IO space */
317         memory_region_add_subregion(get_system_memory(), 0xf2000000,
318                                     sysbus_mmio_get_region(s, 3));
319         sysbus_mmio_map(s, 0, 0xf0800000);
320         sysbus_mmio_map(s, 1, 0xf0c00000);
321 
322         machine_arch = ARCH_MAC99_U3;
323     } else {
324         /* Use values found on a real PowerMac */
325         /* Uninorth AGP bus */
326         dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
327         object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
328                                  &error_abort);
329         qdev_init_nofail(dev);
330         s = SYS_BUS_DEVICE(dev);
331         sysbus_mmio_map(s, 0, 0xf0800000);
332         sysbus_mmio_map(s, 1, 0xf0c00000);
333 
334         /* Uninorth internal bus */
335         dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
336         object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
337                                  &error_abort);
338         qdev_init_nofail(dev);
339         s = SYS_BUS_DEVICE(dev);
340         sysbus_mmio_map(s, 0, 0xf4800000);
341         sysbus_mmio_map(s, 1, 0xf4c00000);
342 
343         /* Uninorth main bus */
344         dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
345         qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
346         object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
347                                  &error_abort);
348         qdev_init_nofail(dev);
349         uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
350         s = SYS_BUS_DEVICE(dev);
351         /* PCI hole */
352         memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
353                                     sysbus_mmio_get_region(s, 2));
354         /* Register 8 MB of ISA IO space */
355         memory_region_add_subregion(get_system_memory(), 0xf2000000,
356                                     sysbus_mmio_get_region(s, 3));
357         sysbus_mmio_map(s, 0, 0xf2800000);
358         sysbus_mmio_map(s, 1, 0xf2c00000);
359 
360         machine_arch = ARCH_MAC99;
361     }
362 
363     machine->usb |= defaults_enabled() && !machine->usb_disabled;
364     has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
365     has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
366                core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
367 
368     /* Timebase Frequency */
369     if (kvm_enabled()) {
370         tbfreq = kvmppc_get_tbfreq();
371     } else {
372         tbfreq = TBFREQ;
373     }
374 
375     /* init basic PC hardware */
376     pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
377 
378     /* MacIO */
379     macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
380     dev = DEVICE(macio);
381     qdev_prop_set_uint64(dev, "frequency", tbfreq);
382     qdev_prop_set_bit(dev, "has-pmu", has_pmu);
383     qdev_prop_set_bit(dev, "has-adb", has_adb);
384     object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
385                              &error_abort);
386     qdev_init_nofail(dev);
387 
388     /* We only emulate 2 out of 3 IDE controllers for now */
389     ide_drive_get(hd, ARRAY_SIZE(hd));
390 
391     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
392                                                         "ide[0]"));
393     macio_ide_init_drives(macio_ide, hd);
394 
395     macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
396                                                         "ide[1]"));
397     macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
398 
399     if (has_adb) {
400         if (has_pmu) {
401             dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu"));
402         } else {
403             dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
404         }
405 
406         adb_bus = qdev_get_child_bus(dev, "adb.0");
407         dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
408         qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true);
409         qdev_init_nofail(dev);
410 
411         dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
412         qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true);
413         qdev_init_nofail(dev);
414     }
415 
416     if (machine->usb) {
417         pci_create_simple(pci_bus, -1, "pci-ohci");
418 
419         /* U3 needs to use USB for input because Linux doesn't support via-cuda
420         on PPC64 */
421         if (!has_adb || machine_arch == ARCH_MAC99_U3) {
422             USBBus *usb_bus = usb_bus_find(-1);
423 
424             usb_create_simple(usb_bus, "usb-kbd");
425             usb_create_simple(usb_bus, "usb-mouse");
426         }
427     }
428 
429     pci_vga_init(pci_bus);
430 
431     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
432         graphic_depth = 15;
433     }
434 
435     for (i = 0; i < nb_nics; i++) {
436         pci_nic_init_nofail(&nd_table[i], pci_bus, "sungem", NULL);
437     }
438 
439     /* The NewWorld NVRAM is not located in the MacIO device */
440 #ifdef CONFIG_KVM
441     if (kvm_enabled() && getpagesize() > 4096) {
442         /* We can't combine read-write and read-only in a single page, so
443            move the NVRAM out of ROM again for KVM */
444         nvram_addr = 0xFFE00000;
445     }
446 #endif
447     dev = qdev_create(NULL, TYPE_MACIO_NVRAM);
448     qdev_prop_set_uint32(dev, "size", 0x2000);
449     qdev_prop_set_uint32(dev, "it_shift", 1);
450     qdev_init_nofail(dev);
451     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
452     nvr = MACIO_NVRAM(dev);
453     pmac_format_nvram_partition(nvr, 0x2000);
454     /* No PCI init: the BIOS will do it */
455 
456     dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
457     fw_cfg = FW_CFG(dev);
458     qdev_prop_set_uint32(dev, "data_width", 1);
459     qdev_prop_set_bit(dev, "dma_enabled", false);
460     object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
461                               OBJECT(fw_cfg), NULL);
462     qdev_init_nofail(dev);
463     s = SYS_BUS_DEVICE(dev);
464     sysbus_mmio_map(s, 0, CFG_ADDR);
465     sysbus_mmio_map(s, 1, CFG_ADDR + 2);
466 
467     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
468     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
469     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
470     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
471     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
472     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
473     if (kernel_cmdline) {
474         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
475         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
476     } else {
477         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
478     }
479     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
480     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
481     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
482 
483     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
484     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
485     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
486 
487     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
488 
489     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
490     if (kvm_enabled()) {
491 #ifdef CONFIG_KVM
492         uint8_t *hypercall;
493 
494         hypercall = g_malloc(16);
495         kvmppc_get_hypercall(env, hypercall, 16);
496         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
497         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
498 #endif
499     }
500     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
501     /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
502     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
503     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
504     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
505 
506     /* MacOS NDRV VGA driver */
507     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
508     if (filename) {
509         gchar *ndrv_file;
510         gsize ndrv_size;
511 
512         if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
513             fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
514         }
515         g_free(filename);
516     }
517 
518     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
519 }
520 
521 /*
522  * Implementation of an interface to adjust firmware path
523  * for the bootindex property handling.
524  */
525 static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
526                                 DeviceState *dev)
527 {
528     PCIDevice *pci;
529     IDEBus *ide_bus;
530     IDEState *ide_s;
531     MACIOIDEState *macio_ide;
532 
533     if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
534         pci = PCI_DEVICE(dev);
535         return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
536     }
537 
538     if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
539         macio_ide = MACIO_IDE(dev);
540         return g_strdup_printf("ata-3@%x", macio_ide->addr);
541     }
542 
543     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
544         ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
545         ide_s = idebus_active_if(ide_bus);
546 
547         if (ide_s->drive_kind == IDE_CD) {
548             return g_strdup("cdrom");
549         }
550 
551         return g_strdup("disk");
552     }
553 
554     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
555         return g_strdup("disk");
556     }
557 
558     if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
559         return g_strdup("cdrom");
560     }
561 
562     if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
563         return g_strdup("disk");
564     }
565 
566     return NULL;
567 }
568 static int core99_kvm_type(MachineState *machine, const char *arg)
569 {
570     /* Always force PR KVM */
571     return 2;
572 }
573 
574 static void core99_machine_class_init(ObjectClass *oc, void *data)
575 {
576     MachineClass *mc = MACHINE_CLASS(oc);
577     FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
578 
579     mc->desc = "Mac99 based PowerMAC";
580     mc->init = ppc_core99_init;
581     mc->block_default_type = IF_IDE;
582     mc->max_cpus = MAX_CPUS;
583     mc->default_boot_order = "cd";
584     mc->default_display = "std";
585     mc->kvm_type = core99_kvm_type;
586 #ifdef TARGET_PPC64
587     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
588 #else
589     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
590 #endif
591     mc->ignore_boot_device_suffixes = true;
592     fwc->get_dev_path = core99_fw_dev_path;
593 }
594 
595 static char *core99_get_via_config(Object *obj, Error **errp)
596 {
597     Core99MachineState *cms = CORE99_MACHINE(obj);
598 
599     switch (cms->via_config) {
600     default:
601     case CORE99_VIA_CONFIG_CUDA:
602         return g_strdup("cuda");
603 
604     case CORE99_VIA_CONFIG_PMU:
605         return g_strdup("pmu");
606 
607     case CORE99_VIA_CONFIG_PMU_ADB:
608         return g_strdup("pmu-adb");
609     }
610 }
611 
612 static void core99_set_via_config(Object *obj, const char *value, Error **errp)
613 {
614     Core99MachineState *cms = CORE99_MACHINE(obj);
615 
616     if (!strcmp(value, "cuda")) {
617         cms->via_config = CORE99_VIA_CONFIG_CUDA;
618     } else if (!strcmp(value, "pmu")) {
619         cms->via_config = CORE99_VIA_CONFIG_PMU;
620     } else if (!strcmp(value, "pmu-adb")) {
621         cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
622     } else {
623         error_setg(errp, "Invalid via value");
624         error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
625     }
626 }
627 
628 static void core99_instance_init(Object *obj)
629 {
630     Core99MachineState *cms = CORE99_MACHINE(obj);
631 
632     /* Default via_config is CORE99_VIA_CONFIG_CUDA */
633     cms->via_config = CORE99_VIA_CONFIG_CUDA;
634     object_property_add_str(obj, "via", core99_get_via_config,
635                             core99_set_via_config, NULL);
636     object_property_set_description(obj, "via",
637                                     "Set VIA configuration. "
638                                     "Valid values are cuda, pmu and pmu-adb",
639                                     NULL);
640 
641     return;
642 }
643 
644 static const TypeInfo core99_machine_info = {
645     .name          = MACHINE_TYPE_NAME("mac99"),
646     .parent        = TYPE_MACHINE,
647     .class_init    = core99_machine_class_init,
648     .instance_init = core99_instance_init,
649     .instance_size = sizeof(Core99MachineState),
650     .interfaces = (InterfaceInfo[]) {
651         { TYPE_FW_PATH_PROVIDER },
652         { }
653     },
654 };
655 
656 static void mac_machine_register_types(void)
657 {
658     type_register_static(&core99_machine_info);
659 }
660 
661 type_init(mac_machine_register_types)
662