1 /* 2 * Generic device-tree-driven paravirt PPC e500 platform 3 * 4 * Copyright 2012 Freescale Semiconductor, Inc. 5 * 6 * This is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qemu-common.h" 14 #include "e500.h" 15 #include "hw/net/fsl_etsec/etsec.h" 16 #include "hw/boards.h" 17 #include "sysemu/device_tree.h" 18 #include "sysemu/kvm.h" 19 #include "hw/sysbus.h" 20 #include "hw/pci/pci.h" 21 #include "hw/ppc/openpic.h" 22 #include "kvm_ppc.h" 23 24 static void e500plat_fixup_devtree(void *fdt) 25 { 26 const char model[] = "QEMU ppce500"; 27 const char compatible[] = "fsl,qemu-e500"; 28 29 qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model)); 30 qemu_fdt_setprop(fdt, "/", "compatible", compatible, 31 sizeof(compatible)); 32 } 33 34 static void e500plat_init(MachineState *machine) 35 { 36 PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(machine); 37 /* Older KVM versions don't support EPR which breaks guests when we announce 38 MPIC variants that support EPR. Revert to an older one for those */ 39 if (kvm_enabled() && !kvmppc_has_cap_epr()) { 40 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20; 41 } 42 43 ppce500_init(machine); 44 } 45 46 #define TYPE_E500PLAT_MACHINE MACHINE_TYPE_NAME("ppce500") 47 48 static void e500plat_machine_class_init(ObjectClass *oc, void *data) 49 { 50 PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc); 51 MachineClass *mc = MACHINE_CLASS(oc); 52 53 pmc->pci_first_slot = 0x1; 54 pmc->pci_nr_slots = PCI_SLOT_MAX - 1; 55 pmc->fixup_devtree = e500plat_fixup_devtree; 56 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_42; 57 pmc->has_mpc8xxx_gpio = true; 58 pmc->has_platform_bus = true; 59 pmc->platform_bus_base = 0xf00000000ULL; 60 pmc->platform_bus_size = (128ULL * 1024 * 1024); 61 pmc->platform_bus_first_irq = 5; 62 pmc->platform_bus_num_irqs = 10; 63 pmc->ccsrbar_base = 0xFE0000000ULL; 64 pmc->pci_pio_base = 0xFE1000000ULL; 65 pmc->pci_mmio_base = 0xC00000000ULL; 66 pmc->pci_mmio_bus_base = 0xE0000000ULL; 67 pmc->spin_base = 0xFEF000000ULL; 68 69 mc->desc = "generic paravirt e500 platform"; 70 mc->init = e500plat_init; 71 mc->max_cpus = 32; 72 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30"); 73 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ETSEC_COMMON); 74 } 75 76 static const TypeInfo e500plat_info = { 77 .name = TYPE_E500PLAT_MACHINE, 78 .parent = TYPE_PPCE500_MACHINE, 79 .class_init = e500plat_machine_class_init, 80 }; 81 82 static void e500plat_register_types(void) 83 { 84 type_register_static(&e500plat_info); 85 } 86 type_init(e500plat_register_types) 87