1 /* 2 * pcie_host.c 3 * utility functions for pci express host bridge. 4 * 5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp> 6 * VA Linux Systems Japan K.K. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 18 * You should have received a copy of the GNU General Public License along 19 * with this program; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "hw/hw.h" 24 #include "hw/pci/pci.h" 25 #include "hw/pci/pcie_host.h" 26 #include "qemu/module.h" 27 #include "exec/address-spaces.h" 28 29 /* a helper function to get a PCIDevice for a given mmconfig address */ 30 static inline PCIDevice *pcie_dev_find_by_mmcfg_addr(PCIBus *s, 31 uint32_t mmcfg_addr) 32 { 33 return pci_find_device(s, PCIE_MMCFG_BUS(mmcfg_addr), 34 PCIE_MMCFG_DEVFN(mmcfg_addr)); 35 } 36 37 static void pcie_mmcfg_data_write(void *opaque, hwaddr mmcfg_addr, 38 uint64_t val, unsigned len) 39 { 40 PCIExpressHost *e = opaque; 41 PCIBus *s = e->pci.bus; 42 PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr); 43 uint32_t addr; 44 uint32_t limit; 45 46 if (!pci_dev) { 47 return; 48 } 49 addr = PCIE_MMCFG_CONFOFFSET(mmcfg_addr); 50 limit = pci_config_size(pci_dev); 51 pci_host_config_write_common(pci_dev, addr, limit, val, len); 52 } 53 54 static uint64_t pcie_mmcfg_data_read(void *opaque, 55 hwaddr mmcfg_addr, 56 unsigned len) 57 { 58 PCIExpressHost *e = opaque; 59 PCIBus *s = e->pci.bus; 60 PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr); 61 uint32_t addr; 62 uint32_t limit; 63 64 if (!pci_dev) { 65 return ~0x0; 66 } 67 addr = PCIE_MMCFG_CONFOFFSET(mmcfg_addr); 68 limit = pci_config_size(pci_dev); 69 return pci_host_config_read_common(pci_dev, addr, limit, len); 70 } 71 72 static const MemoryRegionOps pcie_mmcfg_ops = { 73 .read = pcie_mmcfg_data_read, 74 .write = pcie_mmcfg_data_write, 75 .endianness = DEVICE_LITTLE_ENDIAN, 76 }; 77 78 static void pcie_host_init(Object *obj) 79 { 80 PCIExpressHost *e = PCIE_HOST_BRIDGE(obj); 81 82 e->base_addr = PCIE_BASE_ADDR_UNMAPPED; 83 memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, "pcie-mmcfg-mmio", 84 PCIE_MMCFG_SIZE_MAX); 85 } 86 87 void pcie_host_mmcfg_unmap(PCIExpressHost *e) 88 { 89 if (e->base_addr != PCIE_BASE_ADDR_UNMAPPED) { 90 memory_region_del_subregion(get_system_memory(), &e->mmio); 91 e->base_addr = PCIE_BASE_ADDR_UNMAPPED; 92 } 93 } 94 95 void pcie_host_mmcfg_init(PCIExpressHost *e, uint32_t size) 96 { 97 assert(!(size & (size - 1))); /* power of 2 */ 98 assert(size >= PCIE_MMCFG_SIZE_MIN); 99 assert(size <= PCIE_MMCFG_SIZE_MAX); 100 e->size = size; 101 memory_region_set_size(&e->mmio, e->size); 102 } 103 104 void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr, 105 uint32_t size) 106 { 107 pcie_host_mmcfg_init(e, size); 108 e->base_addr = addr; 109 memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio); 110 } 111 112 void pcie_host_mmcfg_update(PCIExpressHost *e, 113 int enable, 114 hwaddr addr, 115 uint32_t size) 116 { 117 memory_region_transaction_begin(); 118 pcie_host_mmcfg_unmap(e); 119 if (enable) { 120 pcie_host_mmcfg_map(e, addr, size); 121 } 122 memory_region_transaction_commit(); 123 } 124 125 static const TypeInfo pcie_host_type_info = { 126 .name = TYPE_PCIE_HOST_BRIDGE, 127 .parent = TYPE_PCI_HOST_BRIDGE, 128 .abstract = true, 129 .instance_size = sizeof(PCIExpressHost), 130 .instance_init = pcie_host_init, 131 }; 132 133 static void pcie_host_register_types(void) 134 { 135 type_register_static(&pcie_host_type_info); 136 } 137 138 type_init(pcie_host_register_types) 139