11401897cSPhilippe Mathieu-Daudé /* 21401897cSPhilippe Mathieu-Daudé * QEMU Intel IGD Passthrough Host Bridge Emulation 31401897cSPhilippe Mathieu-Daudé * 41401897cSPhilippe Mathieu-Daudé * Copyright (c) 2006 Fabrice Bellard 51401897cSPhilippe Mathieu-Daudé * 61401897cSPhilippe Mathieu-Daudé * SPDX-License-Identifier: MIT 71401897cSPhilippe Mathieu-Daudé * 81401897cSPhilippe Mathieu-Daudé * Permission is hereby granted, free of charge, to any person obtaining a copy 91401897cSPhilippe Mathieu-Daudé * of this software and associated documentation files (the "Software"), to deal 101401897cSPhilippe Mathieu-Daudé * in the Software without restriction, including without limitation the rights 111401897cSPhilippe Mathieu-Daudé * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 121401897cSPhilippe Mathieu-Daudé * copies of the Software, and to permit persons to whom the Software is 131401897cSPhilippe Mathieu-Daudé * furnished to do so, subject to the following conditions: 141401897cSPhilippe Mathieu-Daudé * 151401897cSPhilippe Mathieu-Daudé * The above copyright notice and this permission notice shall be included in 161401897cSPhilippe Mathieu-Daudé * all copies or substantial portions of the Software. 171401897cSPhilippe Mathieu-Daudé * 181401897cSPhilippe Mathieu-Daudé * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 191401897cSPhilippe Mathieu-Daudé * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 201401897cSPhilippe Mathieu-Daudé * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 211401897cSPhilippe Mathieu-Daudé * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 221401897cSPhilippe Mathieu-Daudé * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 231401897cSPhilippe Mathieu-Daudé * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 241401897cSPhilippe Mathieu-Daudé * THE SOFTWARE. 251401897cSPhilippe Mathieu-Daudé */ 261401897cSPhilippe Mathieu-Daudé 271401897cSPhilippe Mathieu-Daudé #include "qemu/osdep.h" 281401897cSPhilippe Mathieu-Daudé #include "hw/pci/pci.h" 291401897cSPhilippe Mathieu-Daudé #include "hw/pci/pci_host.h" 301401897cSPhilippe Mathieu-Daudé #include "hw/pci-host/i440fx.h" 311401897cSPhilippe Mathieu-Daudé #include "qapi/error.h" 321401897cSPhilippe Mathieu-Daudé 331401897cSPhilippe Mathieu-Daudé typedef struct { 341401897cSPhilippe Mathieu-Daudé uint8_t offset; 351401897cSPhilippe Mathieu-Daudé uint8_t len; 361401897cSPhilippe Mathieu-Daudé } IGDHostInfo; 371401897cSPhilippe Mathieu-Daudé 381401897cSPhilippe Mathieu-Daudé /* Here we just expose minimal host bridge offset subset. */ 391401897cSPhilippe Mathieu-Daudé static const IGDHostInfo igd_host_bridge_infos[] = { 401401897cSPhilippe Mathieu-Daudé {PCI_REVISION_ID, 2}, 411401897cSPhilippe Mathieu-Daudé {PCI_SUBSYSTEM_VENDOR_ID, 2}, 421401897cSPhilippe Mathieu-Daudé {PCI_SUBSYSTEM_ID, 2}, 431401897cSPhilippe Mathieu-Daudé {0x50, 2}, /* SNB: processor graphics control register */ 441401897cSPhilippe Mathieu-Daudé {0x52, 2}, /* processor graphics control register */ 451401897cSPhilippe Mathieu-Daudé {0xa4, 4}, /* SNB: graphics base of stolen memory */ 461401897cSPhilippe Mathieu-Daudé {0xa8, 4}, /* SNB: base of GTT stolen memory */ 471401897cSPhilippe Mathieu-Daudé }; 481401897cSPhilippe Mathieu-Daudé 491401897cSPhilippe Mathieu-Daudé static void host_pci_config_read(int pos, int len, uint32_t *val, Error **errp) 501401897cSPhilippe Mathieu-Daudé { 511401897cSPhilippe Mathieu-Daudé int rc, config_fd; 521401897cSPhilippe Mathieu-Daudé /* Access real host bridge. */ 531401897cSPhilippe Mathieu-Daudé char *path = g_strdup_printf("/sys/bus/pci/devices/%04x:%02x:%02x.%d/%s", 541401897cSPhilippe Mathieu-Daudé 0, 0, 0, 0, "config"); 551401897cSPhilippe Mathieu-Daudé 561401897cSPhilippe Mathieu-Daudé config_fd = open(path, O_RDWR); 571401897cSPhilippe Mathieu-Daudé if (config_fd < 0) { 581401897cSPhilippe Mathieu-Daudé error_setg_errno(errp, errno, "Failed to open: %s", path); 591401897cSPhilippe Mathieu-Daudé goto out; 601401897cSPhilippe Mathieu-Daudé } 611401897cSPhilippe Mathieu-Daudé 621401897cSPhilippe Mathieu-Daudé if (lseek(config_fd, pos, SEEK_SET) != pos) { 631401897cSPhilippe Mathieu-Daudé error_setg_errno(errp, errno, "Failed to seek: %s", path); 641401897cSPhilippe Mathieu-Daudé goto out_close_fd; 651401897cSPhilippe Mathieu-Daudé } 661401897cSPhilippe Mathieu-Daudé 671401897cSPhilippe Mathieu-Daudé do { 681401897cSPhilippe Mathieu-Daudé rc = read(config_fd, (uint8_t *)val, len); 691401897cSPhilippe Mathieu-Daudé } while (rc < 0 && (errno == EINTR || errno == EAGAIN)); 701401897cSPhilippe Mathieu-Daudé if (rc != len) { 711401897cSPhilippe Mathieu-Daudé error_setg_errno(errp, errno, "Failed to read: %s", path); 721401897cSPhilippe Mathieu-Daudé } 731401897cSPhilippe Mathieu-Daudé 741401897cSPhilippe Mathieu-Daudé out_close_fd: 751401897cSPhilippe Mathieu-Daudé close(config_fd); 761401897cSPhilippe Mathieu-Daudé out: 771401897cSPhilippe Mathieu-Daudé g_free(path); 781401897cSPhilippe Mathieu-Daudé } 791401897cSPhilippe Mathieu-Daudé 801401897cSPhilippe Mathieu-Daudé static void igd_pt_i440fx_realize(PCIDevice *pci_dev, Error **errp) 811401897cSPhilippe Mathieu-Daudé { 82*1de7096dSVladimir Sementsov-Ogievskiy ERRP_GUARD(); 831401897cSPhilippe Mathieu-Daudé uint32_t val = 0; 841401897cSPhilippe Mathieu-Daudé size_t i; 851401897cSPhilippe Mathieu-Daudé int pos, len; 861401897cSPhilippe Mathieu-Daudé 871401897cSPhilippe Mathieu-Daudé for (i = 0; i < ARRAY_SIZE(igd_host_bridge_infos); i++) { 881401897cSPhilippe Mathieu-Daudé pos = igd_host_bridge_infos[i].offset; 891401897cSPhilippe Mathieu-Daudé len = igd_host_bridge_infos[i].len; 90*1de7096dSVladimir Sementsov-Ogievskiy host_pci_config_read(pos, len, &val, errp); 91*1de7096dSVladimir Sementsov-Ogievskiy if (*errp) { 921401897cSPhilippe Mathieu-Daudé return; 931401897cSPhilippe Mathieu-Daudé } 941401897cSPhilippe Mathieu-Daudé pci_default_write_config(pci_dev, pos, val, len); 951401897cSPhilippe Mathieu-Daudé } 961401897cSPhilippe Mathieu-Daudé } 971401897cSPhilippe Mathieu-Daudé 981401897cSPhilippe Mathieu-Daudé static void igd_passthrough_i440fx_class_init(ObjectClass *klass, void *data) 991401897cSPhilippe Mathieu-Daudé { 1001401897cSPhilippe Mathieu-Daudé DeviceClass *dc = DEVICE_CLASS(klass); 1011401897cSPhilippe Mathieu-Daudé PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 1021401897cSPhilippe Mathieu-Daudé 1031401897cSPhilippe Mathieu-Daudé k->realize = igd_pt_i440fx_realize; 1041401897cSPhilippe Mathieu-Daudé dc->desc = "IGD Passthrough Host bridge"; 1051401897cSPhilippe Mathieu-Daudé } 1061401897cSPhilippe Mathieu-Daudé 1071401897cSPhilippe Mathieu-Daudé static const TypeInfo igd_passthrough_i440fx_info = { 1081401897cSPhilippe Mathieu-Daudé .name = TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE, 1091401897cSPhilippe Mathieu-Daudé .parent = TYPE_I440FX_PCI_DEVICE, 1101401897cSPhilippe Mathieu-Daudé .instance_size = sizeof(PCII440FXState), 1111401897cSPhilippe Mathieu-Daudé .class_init = igd_passthrough_i440fx_class_init, 1121401897cSPhilippe Mathieu-Daudé }; 1131401897cSPhilippe Mathieu-Daudé 1141401897cSPhilippe Mathieu-Daudé static void igd_pt_i440fx_register_types(void) 1151401897cSPhilippe Mathieu-Daudé { 1161401897cSPhilippe Mathieu-Daudé type_register_static(&igd_passthrough_i440fx_info); 1171401897cSPhilippe Mathieu-Daudé } 1181401897cSPhilippe Mathieu-Daudé 1191401897cSPhilippe Mathieu-Daudé type_init(igd_pt_i440fx_register_types) 120