1*1401897cSPhilippe Mathieu-Daudé /* 2*1401897cSPhilippe Mathieu-Daudé * QEMU Intel IGD Passthrough Host Bridge Emulation 3*1401897cSPhilippe Mathieu-Daudé * 4*1401897cSPhilippe Mathieu-Daudé * Copyright (c) 2006 Fabrice Bellard 5*1401897cSPhilippe Mathieu-Daudé * 6*1401897cSPhilippe Mathieu-Daudé * SPDX-License-Identifier: MIT 7*1401897cSPhilippe Mathieu-Daudé * 8*1401897cSPhilippe Mathieu-Daudé * Permission is hereby granted, free of charge, to any person obtaining a copy 9*1401897cSPhilippe Mathieu-Daudé * of this software and associated documentation files (the "Software"), to deal 10*1401897cSPhilippe Mathieu-Daudé * in the Software without restriction, including without limitation the rights 11*1401897cSPhilippe Mathieu-Daudé * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12*1401897cSPhilippe Mathieu-Daudé * copies of the Software, and to permit persons to whom the Software is 13*1401897cSPhilippe Mathieu-Daudé * furnished to do so, subject to the following conditions: 14*1401897cSPhilippe Mathieu-Daudé * 15*1401897cSPhilippe Mathieu-Daudé * The above copyright notice and this permission notice shall be included in 16*1401897cSPhilippe Mathieu-Daudé * all copies or substantial portions of the Software. 17*1401897cSPhilippe Mathieu-Daudé * 18*1401897cSPhilippe Mathieu-Daudé * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19*1401897cSPhilippe Mathieu-Daudé * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20*1401897cSPhilippe Mathieu-Daudé * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21*1401897cSPhilippe Mathieu-Daudé * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22*1401897cSPhilippe Mathieu-Daudé * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23*1401897cSPhilippe Mathieu-Daudé * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24*1401897cSPhilippe Mathieu-Daudé * THE SOFTWARE. 25*1401897cSPhilippe Mathieu-Daudé */ 26*1401897cSPhilippe Mathieu-Daudé 27*1401897cSPhilippe Mathieu-Daudé #include "qemu/osdep.h" 28*1401897cSPhilippe Mathieu-Daudé #include "hw/pci/pci.h" 29*1401897cSPhilippe Mathieu-Daudé #include "hw/pci/pci_host.h" 30*1401897cSPhilippe Mathieu-Daudé #include "hw/pci-host/i440fx.h" 31*1401897cSPhilippe Mathieu-Daudé #include "qapi/error.h" 32*1401897cSPhilippe Mathieu-Daudé 33*1401897cSPhilippe Mathieu-Daudé typedef struct { 34*1401897cSPhilippe Mathieu-Daudé uint8_t offset; 35*1401897cSPhilippe Mathieu-Daudé uint8_t len; 36*1401897cSPhilippe Mathieu-Daudé } IGDHostInfo; 37*1401897cSPhilippe Mathieu-Daudé 38*1401897cSPhilippe Mathieu-Daudé /* Here we just expose minimal host bridge offset subset. */ 39*1401897cSPhilippe Mathieu-Daudé static const IGDHostInfo igd_host_bridge_infos[] = { 40*1401897cSPhilippe Mathieu-Daudé {PCI_REVISION_ID, 2}, 41*1401897cSPhilippe Mathieu-Daudé {PCI_SUBSYSTEM_VENDOR_ID, 2}, 42*1401897cSPhilippe Mathieu-Daudé {PCI_SUBSYSTEM_ID, 2}, 43*1401897cSPhilippe Mathieu-Daudé {0x50, 2}, /* SNB: processor graphics control register */ 44*1401897cSPhilippe Mathieu-Daudé {0x52, 2}, /* processor graphics control register */ 45*1401897cSPhilippe Mathieu-Daudé {0xa4, 4}, /* SNB: graphics base of stolen memory */ 46*1401897cSPhilippe Mathieu-Daudé {0xa8, 4}, /* SNB: base of GTT stolen memory */ 47*1401897cSPhilippe Mathieu-Daudé }; 48*1401897cSPhilippe Mathieu-Daudé 49*1401897cSPhilippe Mathieu-Daudé static void host_pci_config_read(int pos, int len, uint32_t *val, Error **errp) 50*1401897cSPhilippe Mathieu-Daudé { 51*1401897cSPhilippe Mathieu-Daudé int rc, config_fd; 52*1401897cSPhilippe Mathieu-Daudé /* Access real host bridge. */ 53*1401897cSPhilippe Mathieu-Daudé char *path = g_strdup_printf("/sys/bus/pci/devices/%04x:%02x:%02x.%d/%s", 54*1401897cSPhilippe Mathieu-Daudé 0, 0, 0, 0, "config"); 55*1401897cSPhilippe Mathieu-Daudé 56*1401897cSPhilippe Mathieu-Daudé config_fd = open(path, O_RDWR); 57*1401897cSPhilippe Mathieu-Daudé if (config_fd < 0) { 58*1401897cSPhilippe Mathieu-Daudé error_setg_errno(errp, errno, "Failed to open: %s", path); 59*1401897cSPhilippe Mathieu-Daudé goto out; 60*1401897cSPhilippe Mathieu-Daudé } 61*1401897cSPhilippe Mathieu-Daudé 62*1401897cSPhilippe Mathieu-Daudé if (lseek(config_fd, pos, SEEK_SET) != pos) { 63*1401897cSPhilippe Mathieu-Daudé error_setg_errno(errp, errno, "Failed to seek: %s", path); 64*1401897cSPhilippe Mathieu-Daudé goto out_close_fd; 65*1401897cSPhilippe Mathieu-Daudé } 66*1401897cSPhilippe Mathieu-Daudé 67*1401897cSPhilippe Mathieu-Daudé do { 68*1401897cSPhilippe Mathieu-Daudé rc = read(config_fd, (uint8_t *)val, len); 69*1401897cSPhilippe Mathieu-Daudé } while (rc < 0 && (errno == EINTR || errno == EAGAIN)); 70*1401897cSPhilippe Mathieu-Daudé if (rc != len) { 71*1401897cSPhilippe Mathieu-Daudé error_setg_errno(errp, errno, "Failed to read: %s", path); 72*1401897cSPhilippe Mathieu-Daudé } 73*1401897cSPhilippe Mathieu-Daudé 74*1401897cSPhilippe Mathieu-Daudé out_close_fd: 75*1401897cSPhilippe Mathieu-Daudé close(config_fd); 76*1401897cSPhilippe Mathieu-Daudé out: 77*1401897cSPhilippe Mathieu-Daudé g_free(path); 78*1401897cSPhilippe Mathieu-Daudé } 79*1401897cSPhilippe Mathieu-Daudé 80*1401897cSPhilippe Mathieu-Daudé static void igd_pt_i440fx_realize(PCIDevice *pci_dev, Error **errp) 81*1401897cSPhilippe Mathieu-Daudé { 82*1401897cSPhilippe Mathieu-Daudé uint32_t val = 0; 83*1401897cSPhilippe Mathieu-Daudé size_t i; 84*1401897cSPhilippe Mathieu-Daudé int pos, len; 85*1401897cSPhilippe Mathieu-Daudé Error *local_err = NULL; 86*1401897cSPhilippe Mathieu-Daudé 87*1401897cSPhilippe Mathieu-Daudé for (i = 0; i < ARRAY_SIZE(igd_host_bridge_infos); i++) { 88*1401897cSPhilippe Mathieu-Daudé pos = igd_host_bridge_infos[i].offset; 89*1401897cSPhilippe Mathieu-Daudé len = igd_host_bridge_infos[i].len; 90*1401897cSPhilippe Mathieu-Daudé host_pci_config_read(pos, len, &val, &local_err); 91*1401897cSPhilippe Mathieu-Daudé if (local_err) { 92*1401897cSPhilippe Mathieu-Daudé error_propagate(errp, local_err); 93*1401897cSPhilippe Mathieu-Daudé return; 94*1401897cSPhilippe Mathieu-Daudé } 95*1401897cSPhilippe Mathieu-Daudé pci_default_write_config(pci_dev, pos, val, len); 96*1401897cSPhilippe Mathieu-Daudé } 97*1401897cSPhilippe Mathieu-Daudé } 98*1401897cSPhilippe Mathieu-Daudé 99*1401897cSPhilippe Mathieu-Daudé static void igd_passthrough_i440fx_class_init(ObjectClass *klass, void *data) 100*1401897cSPhilippe Mathieu-Daudé { 101*1401897cSPhilippe Mathieu-Daudé DeviceClass *dc = DEVICE_CLASS(klass); 102*1401897cSPhilippe Mathieu-Daudé PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 103*1401897cSPhilippe Mathieu-Daudé 104*1401897cSPhilippe Mathieu-Daudé k->realize = igd_pt_i440fx_realize; 105*1401897cSPhilippe Mathieu-Daudé dc->desc = "IGD Passthrough Host bridge"; 106*1401897cSPhilippe Mathieu-Daudé } 107*1401897cSPhilippe Mathieu-Daudé 108*1401897cSPhilippe Mathieu-Daudé static const TypeInfo igd_passthrough_i440fx_info = { 109*1401897cSPhilippe Mathieu-Daudé .name = TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE, 110*1401897cSPhilippe Mathieu-Daudé .parent = TYPE_I440FX_PCI_DEVICE, 111*1401897cSPhilippe Mathieu-Daudé .instance_size = sizeof(PCII440FXState), 112*1401897cSPhilippe Mathieu-Daudé .class_init = igd_passthrough_i440fx_class_init, 113*1401897cSPhilippe Mathieu-Daudé }; 114*1401897cSPhilippe Mathieu-Daudé 115*1401897cSPhilippe Mathieu-Daudé static void igd_pt_i440fx_register_types(void) 116*1401897cSPhilippe Mathieu-Daudé { 117*1401897cSPhilippe Mathieu-Daudé type_register_static(&igd_passthrough_i440fx_info); 118*1401897cSPhilippe Mathieu-Daudé } 119*1401897cSPhilippe Mathieu-Daudé 120*1401897cSPhilippe Mathieu-Daudé type_init(igd_pt_i440fx_register_types) 121