xref: /openbmc/qemu/hw/pci-host/grackle.c (revision e0091133)
1 /*
2  * QEMU Grackle PCI host (heathrow OldWorld PowerMac)
3  *
4  * Copyright (c) 2006-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
25 
26 #include "qemu/osdep.h"
27 #include "hw/qdev-properties.h"
28 #include "hw/pci/pci.h"
29 #include "hw/irq.h"
30 #include "qapi/error.h"
31 #include "qemu/module.h"
32 #include "trace.h"
33 #include "qom/object.h"
34 #include "hw/pci-host/grackle.h"
35 
36 /* Don't know if this matches real hardware, but it agrees with OHW.  */
37 static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
38 {
39     return (irq_num + (pci_dev->devfn >> 3)) & 3;
40 }
41 
42 static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
43 {
44     GrackleState *s = opaque;
45 
46     trace_grackle_set_irq(irq_num, level);
47     qemu_set_irq(s->irqs[irq_num], level);
48 }
49 
50 static void grackle_realize(DeviceState *dev, Error **errp)
51 {
52     GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev);
53     PCIHostState *phb = PCI_HOST_BRIDGE(dev);
54 
55     phb->bus = pci_register_root_bus(dev, NULL,
56                                      pci_grackle_set_irq,
57                                      pci_grackle_map_irq,
58                                      s,
59                                      &s->pci_mmio,
60                                      &s->pci_io,
61                                      0, 4, TYPE_PCI_BUS);
62 
63     pci_create_simple(phb->bus, 0, "grackle");
64 }
65 
66 static void grackle_init(Object *obj)
67 {
68     GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(obj);
69     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
70     PCIHostState *phb = PCI_HOST_BRIDGE(obj);
71 
72     memory_region_init(&s->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
73     memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj,
74                           "pci-isa-mmio", 0x00200000);
75 
76     memory_region_init_alias(&s->pci_hole, OBJECT(s), "pci-hole", &s->pci_mmio,
77                              0x80000000ULL, 0x7e000000ULL);
78 
79     memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops,
80                           DEVICE(obj), "pci-conf-idx", 0x1000);
81     memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops,
82                           DEVICE(obj), "pci-data-idx", 0x1000);
83 
84     sysbus_init_mmio(sbd, &phb->conf_mem);
85     sysbus_init_mmio(sbd, &phb->data_mem);
86     sysbus_init_mmio(sbd, &s->pci_hole);
87     sysbus_init_mmio(sbd, &s->pci_io);
88 
89     qdev_init_gpio_out(DEVICE(obj), s->irqs, ARRAY_SIZE(s->irqs));
90 }
91 
92 static void grackle_pci_realize(PCIDevice *d, Error **errp)
93 {
94     d->config[0x09] = 0x01;
95 }
96 
97 static void grackle_pci_class_init(ObjectClass *klass, void *data)
98 {
99     DeviceClass *dc = DEVICE_CLASS(klass);
100     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
101 
102     k->realize   = grackle_pci_realize;
103     k->vendor_id = PCI_VENDOR_ID_MOTOROLA;
104     k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
105     k->revision  = 0x00;
106     k->class_id  = PCI_CLASS_BRIDGE_HOST;
107     /*
108      * PCI-facing part of the host bridge, not usable without the
109      * host-facing part, which can't be device_add'ed, yet.
110      */
111     dc->user_creatable = false;
112 }
113 
114 static const TypeInfo grackle_pci_info = {
115     .name          = "grackle",
116     .parent        = TYPE_PCI_DEVICE,
117     .instance_size = sizeof(PCIDevice),
118     .class_init = grackle_pci_class_init,
119     .interfaces = (InterfaceInfo[]) {
120         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
121         { },
122     },
123 };
124 
125 static char *grackle_ofw_unit_address(const SysBusDevice *dev)
126 {
127     GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev);
128 
129     return g_strdup_printf("%x", s->ofw_addr);
130 }
131 
132 static Property grackle_properties[] = {
133     DEFINE_PROP_UINT32("ofw-addr", GrackleState, ofw_addr, -1),
134     DEFINE_PROP_END_OF_LIST()
135 };
136 
137 static void grackle_class_init(ObjectClass *klass, void *data)
138 {
139     DeviceClass *dc = DEVICE_CLASS(klass);
140     SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
141 
142     dc->realize = grackle_realize;
143     device_class_set_props(dc, grackle_properties);
144     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
145     dc->fw_name = "pci";
146     sbc->explicit_ofw_unit_address = grackle_ofw_unit_address;
147 }
148 
149 static const TypeInfo grackle_host_info = {
150     .name          = TYPE_GRACKLE_PCI_HOST_BRIDGE,
151     .parent        = TYPE_PCI_HOST_BRIDGE,
152     .instance_size = sizeof(GrackleState),
153     .instance_init = grackle_init,
154     .class_init    = grackle_class_init,
155 };
156 
157 static void grackle_register_types(void)
158 {
159     type_register_static(&grackle_pci_info);
160     type_register_static(&grackle_host_info);
161 }
162 
163 type_init(grackle_register_types)
164