1 /* 2 * QEMU Grackle PCI host (heathrow OldWorld PowerMac) 3 * 4 * Copyright (c) 2006-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "hw/pci/pci_host.h" 28 #include "hw/ppc/mac.h" 29 #include "hw/pci/pci.h" 30 #include "hw/intc/heathrow_pic.h" 31 #include "qapi/error.h" 32 #include "trace.h" 33 34 #define GRACKLE_PCI_HOST_BRIDGE(obj) \ 35 OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE) 36 37 typedef struct GrackleState { 38 PCIHostState parent_obj; 39 40 HeathrowState *pic; 41 qemu_irq irqs[4]; 42 MemoryRegion pci_mmio; 43 MemoryRegion pci_hole; 44 MemoryRegion pci_io; 45 } GrackleState; 46 47 /* Don't know if this matches real hardware, but it agrees with OHW. */ 48 static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num) 49 { 50 return (irq_num + (pci_dev->devfn >> 3)) & 3; 51 } 52 53 static void pci_grackle_set_irq(void *opaque, int irq_num, int level) 54 { 55 GrackleState *s = opaque; 56 57 trace_grackle_set_irq(irq_num, level); 58 qemu_set_irq(s->irqs[irq_num], level); 59 } 60 61 static void grackle_init_irqs(GrackleState *s) 62 { 63 int i; 64 65 for (i = 0; i < ARRAY_SIZE(s->irqs); i++) { 66 s->irqs[i] = qdev_get_gpio_in(DEVICE(s->pic), 0x15 + i); 67 } 68 } 69 70 static void grackle_realize(DeviceState *dev, Error **errp) 71 { 72 GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev); 73 PCIHostState *phb = PCI_HOST_BRIDGE(dev); 74 75 phb->bus = pci_register_root_bus(dev, NULL, 76 pci_grackle_set_irq, 77 pci_grackle_map_irq, 78 s, 79 &s->pci_mmio, 80 &s->pci_io, 81 0, 4, TYPE_PCI_BUS); 82 83 pci_create_simple(phb->bus, 0, "grackle"); 84 grackle_init_irqs(s); 85 } 86 87 static void grackle_init(Object *obj) 88 { 89 GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(obj); 90 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 91 PCIHostState *phb = PCI_HOST_BRIDGE(obj); 92 93 memory_region_init(&s->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL); 94 memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj, 95 "pci-isa-mmio", 0x00200000); 96 97 memory_region_init_alias(&s->pci_hole, OBJECT(s), "pci-hole", &s->pci_mmio, 98 0x80000000ULL, 0x7e000000ULL); 99 100 memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, 101 DEVICE(obj), "pci-conf-idx", 0x1000); 102 memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, 103 DEVICE(obj), "pci-data-idx", 0x1000); 104 105 object_property_add_link(obj, "pic", TYPE_HEATHROW, 106 (Object **) &s->pic, 107 qdev_prop_allow_set_link_before_realize, 108 0, NULL); 109 110 sysbus_init_mmio(sbd, &phb->conf_mem); 111 sysbus_init_mmio(sbd, &phb->data_mem); 112 sysbus_init_mmio(sbd, &s->pci_hole); 113 sysbus_init_mmio(sbd, &s->pci_io); 114 } 115 116 static void grackle_pci_realize(PCIDevice *d, Error **errp) 117 { 118 d->config[0x09] = 0x01; 119 } 120 121 static void grackle_pci_class_init(ObjectClass *klass, void *data) 122 { 123 DeviceClass *dc = DEVICE_CLASS(klass); 124 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 125 126 k->realize = grackle_pci_realize; 127 k->vendor_id = PCI_VENDOR_ID_MOTOROLA; 128 k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106; 129 k->revision = 0x00; 130 k->class_id = PCI_CLASS_BRIDGE_HOST; 131 /* 132 * PCI-facing part of the host bridge, not usable without the 133 * host-facing part, which can't be device_add'ed, yet. 134 */ 135 dc->user_creatable = false; 136 } 137 138 static const TypeInfo grackle_pci_info = { 139 .name = "grackle", 140 .parent = TYPE_PCI_DEVICE, 141 .instance_size = sizeof(PCIDevice), 142 .class_init = grackle_pci_class_init, 143 .interfaces = (InterfaceInfo[]) { 144 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 145 { }, 146 }, 147 }; 148 149 static void grackle_class_init(ObjectClass *klass, void *data) 150 { 151 DeviceClass *dc = DEVICE_CLASS(klass); 152 153 dc->realize = grackle_realize; 154 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 155 } 156 157 static const TypeInfo grackle_host_info = { 158 .name = TYPE_GRACKLE_PCI_HOST_BRIDGE, 159 .parent = TYPE_PCI_HOST_BRIDGE, 160 .instance_size = sizeof(GrackleState), 161 .instance_init = grackle_init, 162 .class_init = grackle_class_init, 163 }; 164 165 static void grackle_register_types(void) 166 { 167 type_register_static(&grackle_pci_info); 168 type_register_static(&grackle_host_info); 169 } 170 171 type_init(grackle_register_types) 172