1 /* 2 * Standard PCI Bridge Device 3 * 4 * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com> 5 * 6 * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/ 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License along 19 * with this program; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "qapi/error.h" 24 #include "hw/pci/pci_bridge.h" 25 #include "hw/pci/pci_ids.h" 26 #include "hw/pci/msi.h" 27 #include "hw/pci/shpc.h" 28 #include "hw/pci/slotid_cap.h" 29 #include "exec/memory.h" 30 #include "hw/pci/pci_bus.h" 31 #include "hw/hotplug.h" 32 33 #define TYPE_PCI_BRIDGE_DEV "pci-bridge" 34 #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat" 35 #define PCI_BRIDGE_DEV(obj) \ 36 OBJECT_CHECK(PCIBridgeDev, (obj), TYPE_PCI_BRIDGE_DEV) 37 38 struct PCIBridgeDev { 39 /*< private >*/ 40 PCIBridge parent_obj; 41 /*< public >*/ 42 43 MemoryRegion bar; 44 uint8_t chassis_nr; 45 #define PCI_BRIDGE_DEV_F_MSI_REQ 0 46 #define PCI_BRIDGE_DEV_F_SHPC_REQ 1 47 uint32_t flags; 48 }; 49 typedef struct PCIBridgeDev PCIBridgeDev; 50 51 static int pci_bridge_dev_initfn(PCIDevice *dev) 52 { 53 PCIBridge *br = PCI_BRIDGE(dev); 54 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); 55 int err; 56 57 pci_bridge_initfn(dev, TYPE_PCI_BUS); 58 59 if (bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_SHPC_REQ)) { 60 dev->config[PCI_INTERRUPT_PIN] = 0x1; 61 memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar", 62 shpc_bar_size(dev)); 63 err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0); 64 if (err) { 65 goto shpc_error; 66 } 67 } else { 68 /* MSI is not applicable without SHPC */ 69 bridge_dev->flags &= ~(1 << PCI_BRIDGE_DEV_F_MSI_REQ); 70 } 71 72 err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0); 73 if (err) { 74 goto slotid_error; 75 } 76 77 if ((bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_MSI_REQ)) && 78 msi_nonbroken) { 79 err = msi_init(dev, 0, 1, true, true); 80 if (err < 0) { 81 goto msi_error; 82 } 83 } 84 85 if (shpc_present(dev)) { 86 /* TODO: spec recommends using 64 bit prefetcheable BAR. 87 * Check whether that works well. */ 88 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | 89 PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar); 90 } 91 return 0; 92 93 msi_error: 94 slotid_cap_cleanup(dev); 95 slotid_error: 96 if (shpc_present(dev)) { 97 shpc_cleanup(dev, &bridge_dev->bar); 98 } 99 shpc_error: 100 pci_bridge_exitfn(dev); 101 102 return err; 103 } 104 105 static void pci_bridge_dev_exitfn(PCIDevice *dev) 106 { 107 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); 108 if (msi_present(dev)) { 109 msi_uninit(dev); 110 } 111 slotid_cap_cleanup(dev); 112 if (shpc_present(dev)) { 113 shpc_cleanup(dev, &bridge_dev->bar); 114 } 115 pci_bridge_exitfn(dev); 116 } 117 118 static void pci_bridge_dev_instance_finalize(Object *obj) 119 { 120 /* this function is idempotent and handles (PCIDevice.shpc == NULL) */ 121 shpc_free(PCI_DEVICE(obj)); 122 } 123 124 static void pci_bridge_dev_write_config(PCIDevice *d, 125 uint32_t address, uint32_t val, int len) 126 { 127 pci_bridge_write_config(d, address, val, len); 128 if (msi_present(d)) { 129 msi_write_config(d, address, val, len); 130 } 131 if (shpc_present(d)) { 132 shpc_cap_write_config(d, address, val, len); 133 } 134 } 135 136 static void qdev_pci_bridge_dev_reset(DeviceState *qdev) 137 { 138 PCIDevice *dev = PCI_DEVICE(qdev); 139 140 pci_bridge_reset(qdev); 141 if (shpc_present(dev)) { 142 shpc_reset(dev); 143 } 144 } 145 146 static Property pci_bridge_dev_properties[] = { 147 /* Note: 0 is not a legal chassis number. */ 148 DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr, 149 0), 150 DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, flags, 151 PCI_BRIDGE_DEV_F_MSI_REQ, true), 152 DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, 153 PCI_BRIDGE_DEV_F_SHPC_REQ, true), 154 DEFINE_PROP_END_OF_LIST(), 155 }; 156 157 static bool pci_device_shpc_present(void *opaque, int version_id) 158 { 159 PCIDevice *dev = opaque; 160 161 return shpc_present(dev); 162 } 163 164 static const VMStateDescription pci_bridge_dev_vmstate = { 165 .name = "pci_bridge", 166 .fields = (VMStateField[]) { 167 VMSTATE_PCI_DEVICE(parent_obj, PCIBridge), 168 SHPC_VMSTATE(shpc, PCIDevice, pci_device_shpc_present), 169 VMSTATE_END_OF_LIST() 170 } 171 }; 172 173 static void pci_bridge_dev_hotplug_cb(HotplugHandler *hotplug_dev, 174 DeviceState *dev, Error **errp) 175 { 176 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 177 178 if (!shpc_present(pci_hotplug_dev)) { 179 error_setg(errp, "standard hotplug controller has been disabled for " 180 "this %s", TYPE_PCI_BRIDGE_DEV); 181 return; 182 } 183 shpc_device_hotplug_cb(hotplug_dev, dev, errp); 184 } 185 186 static void pci_bridge_dev_hot_unplug_request_cb(HotplugHandler *hotplug_dev, 187 DeviceState *dev, 188 Error **errp) 189 { 190 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 191 192 if (!shpc_present(pci_hotplug_dev)) { 193 error_setg(errp, "standard hotplug controller has been disabled for " 194 "this %s", TYPE_PCI_BRIDGE_DEV); 195 return; 196 } 197 shpc_device_hot_unplug_request_cb(hotplug_dev, dev, errp); 198 } 199 200 static void pci_bridge_dev_class_init(ObjectClass *klass, void *data) 201 { 202 DeviceClass *dc = DEVICE_CLASS(klass); 203 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 204 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); 205 206 k->init = pci_bridge_dev_initfn; 207 k->exit = pci_bridge_dev_exitfn; 208 k->config_write = pci_bridge_dev_write_config; 209 k->vendor_id = PCI_VENDOR_ID_REDHAT; 210 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE; 211 k->class_id = PCI_CLASS_BRIDGE_PCI; 212 k->is_bridge = 1, 213 dc->desc = "Standard PCI Bridge"; 214 dc->reset = qdev_pci_bridge_dev_reset; 215 dc->props = pci_bridge_dev_properties; 216 dc->vmsd = &pci_bridge_dev_vmstate; 217 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 218 hc->plug = pci_bridge_dev_hotplug_cb; 219 hc->unplug_request = pci_bridge_dev_hot_unplug_request_cb; 220 } 221 222 static const TypeInfo pci_bridge_dev_info = { 223 .name = TYPE_PCI_BRIDGE_DEV, 224 .parent = TYPE_PCI_BRIDGE, 225 .instance_size = sizeof(PCIBridgeDev), 226 .class_init = pci_bridge_dev_class_init, 227 .instance_finalize = pci_bridge_dev_instance_finalize, 228 .interfaces = (InterfaceInfo[]) { 229 { TYPE_HOTPLUG_HANDLER }, 230 { } 231 } 232 }; 233 234 /* 235 * Multiseat bridge. Same as the standard pci bridge, only with a 236 * different pci id, so we can match it easily in the guest for 237 * automagic multiseat configuration. See docs/multiseat.txt for more. 238 */ 239 static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data) 240 { 241 DeviceClass *dc = DEVICE_CLASS(klass); 242 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 243 244 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT; 245 dc->desc = "Standard PCI Bridge (multiseat)"; 246 } 247 248 static const TypeInfo pci_bridge_dev_seat_info = { 249 .name = TYPE_PCI_BRIDGE_SEAT_DEV, 250 .parent = TYPE_PCI_BRIDGE_DEV, 251 .instance_size = sizeof(PCIBridgeDev), 252 .class_init = pci_bridge_dev_seat_class_init, 253 }; 254 255 static void pci_bridge_dev_register(void) 256 { 257 type_register_static(&pci_bridge_dev_info); 258 type_register_static(&pci_bridge_dev_seat_info); 259 } 260 261 type_init(pci_bridge_dev_register); 262