1 /* 2 * Standard PCI Bridge Device 3 * 4 * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com> 5 * 6 * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/ 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License along 19 * with this program; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "qapi/error.h" 24 #include "qemu/module.h" 25 #include "hw/pci/pci_bridge.h" 26 #include "hw/pci/pci_ids.h" 27 #include "hw/pci/msi.h" 28 #include "hw/pci/shpc.h" 29 #include "hw/pci/slotid_cap.h" 30 #include "hw/qdev-properties.h" 31 #include "exec/memory.h" 32 #include "hw/pci/pci_bus.h" 33 #include "hw/hotplug.h" 34 #include "qom/object.h" 35 36 #define TYPE_PCI_BRIDGE_DEV "pci-bridge" 37 #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat" 38 typedef struct PCIBridgeDev PCIBridgeDev; 39 DECLARE_INSTANCE_CHECKER(PCIBridgeDev, PCI_BRIDGE_DEV, 40 TYPE_PCI_BRIDGE_DEV) 41 42 struct PCIBridgeDev { 43 /*< private >*/ 44 PCIBridge parent_obj; 45 /*< public >*/ 46 47 MemoryRegion bar; 48 uint8_t chassis_nr; 49 #define PCI_BRIDGE_DEV_F_SHPC_REQ 0 50 uint32_t flags; 51 52 OnOffAuto msi; 53 54 /* additional resources to reserve */ 55 PCIResReserve res_reserve; 56 }; 57 58 static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp) 59 { 60 PCIBridge *br = PCI_BRIDGE(dev); 61 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); 62 int err; 63 Error *local_err = NULL; 64 65 pci_bridge_initfn(dev, TYPE_PCI_BUS); 66 67 if (bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_SHPC_REQ)) { 68 dev->config[PCI_INTERRUPT_PIN] = 0x1; 69 memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar", 70 shpc_bar_size(dev)); 71 err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0, errp); 72 if (err) { 73 goto shpc_error; 74 } 75 } else { 76 /* MSI is not applicable without SHPC */ 77 bridge_dev->msi = ON_OFF_AUTO_OFF; 78 } 79 80 err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0, errp); 81 if (err) { 82 goto slotid_error; 83 } 84 85 if (bridge_dev->msi != ON_OFF_AUTO_OFF) { 86 /* it means SHPC exists, because MSI is needed by SHPC */ 87 88 err = msi_init(dev, 0, 1, true, true, &local_err); 89 /* Any error other than -ENOTSUP(board's MSI support is broken) 90 * is a programming error */ 91 assert(!err || err == -ENOTSUP); 92 if (err && bridge_dev->msi == ON_OFF_AUTO_ON) { 93 /* Can't satisfy user's explicit msi=on request, fail */ 94 error_append_hint(&local_err, "You have to use msi=auto (default) " 95 "or msi=off with this machine type.\n"); 96 error_propagate(errp, local_err); 97 goto msi_error; 98 } 99 assert(!local_err || bridge_dev->msi == ON_OFF_AUTO_AUTO); 100 /* With msi=auto, we fall back to MSI off silently */ 101 error_free(local_err); 102 } 103 104 err = pci_bridge_qemu_reserve_cap_init(dev, 0, 105 bridge_dev->res_reserve, errp); 106 if (err) { 107 goto cap_error; 108 } 109 110 if (shpc_present(dev)) { 111 /* TODO: spec recommends using 64 bit prefetcheable BAR. 112 * Check whether that works well. */ 113 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | 114 PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar); 115 } 116 return; 117 118 cap_error: 119 msi_uninit(dev); 120 msi_error: 121 slotid_cap_cleanup(dev); 122 slotid_error: 123 if (shpc_present(dev)) { 124 shpc_cleanup(dev, &bridge_dev->bar); 125 } 126 shpc_error: 127 pci_bridge_exitfn(dev); 128 } 129 130 static void pci_bridge_dev_exitfn(PCIDevice *dev) 131 { 132 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); 133 134 pci_del_capability(dev, PCI_CAP_ID_VNDR, sizeof(PCIBridgeQemuCap)); 135 if (msi_present(dev)) { 136 msi_uninit(dev); 137 } 138 slotid_cap_cleanup(dev); 139 if (shpc_present(dev)) { 140 shpc_cleanup(dev, &bridge_dev->bar); 141 } 142 pci_bridge_exitfn(dev); 143 } 144 145 static void pci_bridge_dev_instance_finalize(Object *obj) 146 { 147 /* this function is idempotent and handles (PCIDevice.shpc == NULL) */ 148 shpc_free(PCI_DEVICE(obj)); 149 } 150 151 static void pci_bridge_dev_write_config(PCIDevice *d, 152 uint32_t address, uint32_t val, int len) 153 { 154 pci_bridge_write_config(d, address, val, len); 155 if (msi_present(d)) { 156 msi_write_config(d, address, val, len); 157 } 158 if (shpc_present(d)) { 159 shpc_cap_write_config(d, address, val, len); 160 } 161 } 162 163 static void qdev_pci_bridge_dev_reset(DeviceState *qdev) 164 { 165 PCIDevice *dev = PCI_DEVICE(qdev); 166 167 pci_bridge_reset(qdev); 168 if (shpc_present(dev)) { 169 shpc_reset(dev); 170 } 171 } 172 173 static Property pci_bridge_dev_properties[] = { 174 /* Note: 0 is not a legal chassis number. */ 175 DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr, 176 0), 177 DEFINE_PROP_ON_OFF_AUTO(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, msi, 178 ON_OFF_AUTO_AUTO), 179 DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, 180 PCI_BRIDGE_DEV_F_SHPC_REQ, true), 181 DEFINE_PROP_UINT32("bus-reserve", PCIBridgeDev, 182 res_reserve.bus, -1), 183 DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev, 184 res_reserve.io, -1), 185 DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev, 186 res_reserve.mem_non_pref, -1), 187 DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev, 188 res_reserve.mem_pref_32, -1), 189 DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev, 190 res_reserve.mem_pref_64, -1), 191 192 DEFINE_PROP_END_OF_LIST(), 193 }; 194 195 static bool pci_device_shpc_present(void *opaque, int version_id) 196 { 197 PCIDevice *dev = opaque; 198 199 return shpc_present(dev); 200 } 201 202 static const VMStateDescription pci_bridge_dev_vmstate = { 203 .name = "pci_bridge", 204 .priority = MIG_PRI_PCI_BUS, 205 .fields = (VMStateField[]) { 206 VMSTATE_PCI_DEVICE(parent_obj, PCIBridge), 207 SHPC_VMSTATE(shpc, PCIDevice, pci_device_shpc_present), 208 VMSTATE_END_OF_LIST() 209 } 210 }; 211 212 void pci_bridge_dev_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, 213 Error **errp) 214 { 215 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 216 217 if (!shpc_present(pci_hotplug_dev)) { 218 error_setg(errp, "standard hotplug controller has been disabled for " 219 "this %s", object_get_typename(OBJECT(hotplug_dev))); 220 return; 221 } 222 shpc_device_plug_cb(hotplug_dev, dev, errp); 223 } 224 225 void pci_bridge_dev_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, 226 Error **errp) 227 { 228 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 229 230 g_assert(shpc_present(pci_hotplug_dev)); 231 shpc_device_unplug_cb(hotplug_dev, dev, errp); 232 } 233 234 void pci_bridge_dev_unplug_request_cb(HotplugHandler *hotplug_dev, 235 DeviceState *dev, Error **errp) 236 { 237 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 238 239 if (!shpc_present(pci_hotplug_dev)) { 240 error_setg(errp, "standard hotplug controller has been disabled for " 241 "this %s", object_get_typename(OBJECT(hotplug_dev))); 242 return; 243 } 244 shpc_device_unplug_request_cb(hotplug_dev, dev, errp); 245 } 246 247 static void pci_bridge_dev_class_init(ObjectClass *klass, void *data) 248 { 249 DeviceClass *dc = DEVICE_CLASS(klass); 250 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 251 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); 252 253 k->realize = pci_bridge_dev_realize; 254 k->exit = pci_bridge_dev_exitfn; 255 k->config_write = pci_bridge_dev_write_config; 256 k->vendor_id = PCI_VENDOR_ID_REDHAT; 257 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE; 258 k->class_id = PCI_CLASS_BRIDGE_PCI; 259 k->is_bridge = true; 260 dc->desc = "Standard PCI Bridge"; 261 dc->reset = qdev_pci_bridge_dev_reset; 262 device_class_set_props(dc, pci_bridge_dev_properties); 263 dc->vmsd = &pci_bridge_dev_vmstate; 264 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 265 hc->plug = pci_bridge_dev_plug_cb; 266 hc->unplug = pci_bridge_dev_unplug_cb; 267 hc->unplug_request = pci_bridge_dev_unplug_request_cb; 268 } 269 270 static const TypeInfo pci_bridge_dev_info = { 271 .name = TYPE_PCI_BRIDGE_DEV, 272 .parent = TYPE_PCI_BRIDGE, 273 .instance_size = sizeof(PCIBridgeDev), 274 .class_init = pci_bridge_dev_class_init, 275 .instance_finalize = pci_bridge_dev_instance_finalize, 276 .interfaces = (InterfaceInfo[]) { 277 { TYPE_HOTPLUG_HANDLER }, 278 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 279 { } 280 } 281 }; 282 283 /* 284 * Multiseat bridge. Same as the standard pci bridge, only with a 285 * different pci id, so we can match it easily in the guest for 286 * automagic multiseat configuration. See docs/multiseat.txt for more. 287 */ 288 static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data) 289 { 290 DeviceClass *dc = DEVICE_CLASS(klass); 291 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 292 293 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT; 294 dc->desc = "Standard PCI Bridge (multiseat)"; 295 } 296 297 static const TypeInfo pci_bridge_dev_seat_info = { 298 .name = TYPE_PCI_BRIDGE_SEAT_DEV, 299 .parent = TYPE_PCI_BRIDGE_DEV, 300 .instance_size = sizeof(PCIBridgeDev), 301 .class_init = pci_bridge_dev_seat_class_init, 302 }; 303 304 static void pci_bridge_dev_register(void) 305 { 306 type_register_static(&pci_bridge_dev_info); 307 type_register_static(&pci_bridge_dev_seat_info); 308 } 309 310 type_init(pci_bridge_dev_register); 311