1 /* 2 * Standard PCI Bridge Device 3 * 4 * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com> 5 * 6 * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/ 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License along 19 * with this program; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22 #include "qemu/osdep.h" 23 #include "hw/pci/pci_bridge.h" 24 #include "hw/pci/pci_ids.h" 25 #include "hw/pci/msi.h" 26 #include "hw/pci/shpc.h" 27 #include "hw/pci/slotid_cap.h" 28 #include "exec/memory.h" 29 #include "hw/pci/pci_bus.h" 30 #include "hw/hotplug.h" 31 32 #define TYPE_PCI_BRIDGE_DEV "pci-bridge" 33 #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat" 34 #define PCI_BRIDGE_DEV(obj) \ 35 OBJECT_CHECK(PCIBridgeDev, (obj), TYPE_PCI_BRIDGE_DEV) 36 37 struct PCIBridgeDev { 38 /*< private >*/ 39 PCIBridge parent_obj; 40 /*< public >*/ 41 42 MemoryRegion bar; 43 uint8_t chassis_nr; 44 #define PCI_BRIDGE_DEV_F_MSI_REQ 0 45 #define PCI_BRIDGE_DEV_F_SHPC_REQ 1 46 uint32_t flags; 47 }; 48 typedef struct PCIBridgeDev PCIBridgeDev; 49 50 static int pci_bridge_dev_initfn(PCIDevice *dev) 51 { 52 PCIBridge *br = PCI_BRIDGE(dev); 53 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); 54 int err; 55 56 err = pci_bridge_initfn(dev, TYPE_PCI_BUS); 57 if (err) { 58 goto bridge_error; 59 } 60 if (bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_SHPC_REQ)) { 61 dev->config[PCI_INTERRUPT_PIN] = 0x1; 62 memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar", 63 shpc_bar_size(dev)); 64 err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0); 65 if (err) { 66 goto shpc_error; 67 } 68 } else { 69 /* MSI is not applicable without SHPC */ 70 bridge_dev->flags &= ~(1 << PCI_BRIDGE_DEV_F_MSI_REQ); 71 } 72 err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0); 73 if (err) { 74 goto slotid_error; 75 } 76 if ((bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_MSI_REQ)) && 77 msi_supported) { 78 err = msi_init(dev, 0, 1, true, true); 79 if (err < 0) { 80 goto msi_error; 81 } 82 } 83 if (shpc_present(dev)) { 84 /* TODO: spec recommends using 64 bit prefetcheable BAR. 85 * Check whether that works well. */ 86 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | 87 PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar); 88 } 89 return 0; 90 msi_error: 91 slotid_cap_cleanup(dev); 92 slotid_error: 93 if (shpc_present(dev)) { 94 shpc_cleanup(dev, &bridge_dev->bar); 95 } 96 shpc_error: 97 pci_bridge_exitfn(dev); 98 bridge_error: 99 return err; 100 } 101 102 static void pci_bridge_dev_exitfn(PCIDevice *dev) 103 { 104 PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); 105 if (msi_present(dev)) { 106 msi_uninit(dev); 107 } 108 slotid_cap_cleanup(dev); 109 if (shpc_present(dev)) { 110 shpc_cleanup(dev, &bridge_dev->bar); 111 } 112 pci_bridge_exitfn(dev); 113 } 114 115 static void pci_bridge_dev_instance_finalize(Object *obj) 116 { 117 /* this function is idempotent and handles (PCIDevice.shpc == NULL) */ 118 shpc_free(PCI_DEVICE(obj)); 119 } 120 121 static void pci_bridge_dev_write_config(PCIDevice *d, 122 uint32_t address, uint32_t val, int len) 123 { 124 pci_bridge_write_config(d, address, val, len); 125 if (msi_present(d)) { 126 msi_write_config(d, address, val, len); 127 } 128 if (shpc_present(d)) { 129 shpc_cap_write_config(d, address, val, len); 130 } 131 } 132 133 static void qdev_pci_bridge_dev_reset(DeviceState *qdev) 134 { 135 PCIDevice *dev = PCI_DEVICE(qdev); 136 137 pci_bridge_reset(qdev); 138 if (shpc_present(dev)) { 139 shpc_reset(dev); 140 } 141 } 142 143 static Property pci_bridge_dev_properties[] = { 144 /* Note: 0 is not a legal chassis number. */ 145 DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr, 146 0), 147 DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, flags, 148 PCI_BRIDGE_DEV_F_MSI_REQ, true), 149 DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, 150 PCI_BRIDGE_DEV_F_SHPC_REQ, true), 151 DEFINE_PROP_END_OF_LIST(), 152 }; 153 154 static bool pci_device_shpc_present(void *opaque, int version_id) 155 { 156 PCIDevice *dev = opaque; 157 158 return shpc_present(dev); 159 } 160 161 static const VMStateDescription pci_bridge_dev_vmstate = { 162 .name = "pci_bridge", 163 .fields = (VMStateField[]) { 164 VMSTATE_PCI_DEVICE(parent_obj, PCIBridge), 165 SHPC_VMSTATE(shpc, PCIDevice, pci_device_shpc_present), 166 VMSTATE_END_OF_LIST() 167 } 168 }; 169 170 static void pci_bridge_dev_hotplug_cb(HotplugHandler *hotplug_dev, 171 DeviceState *dev, Error **errp) 172 { 173 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 174 175 if (!shpc_present(pci_hotplug_dev)) { 176 error_setg(errp, "standard hotplug controller has been disabled for " 177 "this %s", TYPE_PCI_BRIDGE_DEV); 178 return; 179 } 180 shpc_device_hotplug_cb(hotplug_dev, dev, errp); 181 } 182 183 static void pci_bridge_dev_hot_unplug_request_cb(HotplugHandler *hotplug_dev, 184 DeviceState *dev, 185 Error **errp) 186 { 187 PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev); 188 189 if (!shpc_present(pci_hotplug_dev)) { 190 error_setg(errp, "standard hotplug controller has been disabled for " 191 "this %s", TYPE_PCI_BRIDGE_DEV); 192 return; 193 } 194 shpc_device_hot_unplug_request_cb(hotplug_dev, dev, errp); 195 } 196 197 static void pci_bridge_dev_class_init(ObjectClass *klass, void *data) 198 { 199 DeviceClass *dc = DEVICE_CLASS(klass); 200 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 201 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); 202 203 k->init = pci_bridge_dev_initfn; 204 k->exit = pci_bridge_dev_exitfn; 205 k->config_write = pci_bridge_dev_write_config; 206 k->vendor_id = PCI_VENDOR_ID_REDHAT; 207 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE; 208 k->class_id = PCI_CLASS_BRIDGE_PCI; 209 k->is_bridge = 1, 210 dc->desc = "Standard PCI Bridge"; 211 dc->reset = qdev_pci_bridge_dev_reset; 212 dc->props = pci_bridge_dev_properties; 213 dc->vmsd = &pci_bridge_dev_vmstate; 214 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); 215 hc->plug = pci_bridge_dev_hotplug_cb; 216 hc->unplug_request = pci_bridge_dev_hot_unplug_request_cb; 217 } 218 219 static const TypeInfo pci_bridge_dev_info = { 220 .name = TYPE_PCI_BRIDGE_DEV, 221 .parent = TYPE_PCI_BRIDGE, 222 .instance_size = sizeof(PCIBridgeDev), 223 .class_init = pci_bridge_dev_class_init, 224 .instance_finalize = pci_bridge_dev_instance_finalize, 225 .interfaces = (InterfaceInfo[]) { 226 { TYPE_HOTPLUG_HANDLER }, 227 { } 228 } 229 }; 230 231 /* 232 * Multiseat bridge. Same as the standard pci bridge, only with a 233 * different pci id, so we can match it easily in the guest for 234 * automagic multiseat configuration. See docs/multiseat.txt for more. 235 */ 236 static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data) 237 { 238 DeviceClass *dc = DEVICE_CLASS(klass); 239 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); 240 241 k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT; 242 dc->desc = "Standard PCI Bridge (multiseat)"; 243 } 244 245 static const TypeInfo pci_bridge_dev_seat_info = { 246 .name = TYPE_PCI_BRIDGE_SEAT_DEV, 247 .parent = TYPE_PCI_BRIDGE_DEV, 248 .instance_size = sizeof(PCIBridgeDev), 249 .class_init = pci_bridge_dev_seat_class_init, 250 }; 251 252 static void pci_bridge_dev_register(void) 253 { 254 type_register_static(&pci_bridge_dev_info); 255 type_register_static(&pci_bridge_dev_seat_info); 256 } 257 258 type_init(pci_bridge_dev_register); 259