1ea7e9b57SMarc-André Lureaupci_ss = ss.source_set() 2ea7e9b57SMarc-André Lureaupci_ss.add(files('pci_bridge_dev.c')) 3ea7e9b57SMarc-André Lureaupci_ss.add(when: 'CONFIG_I82801B11', if_true: files('i82801b11.c')) 4ea7e9b57SMarc-André Lureaupci_ss.add(when: 'CONFIG_IOH3420', if_true: files('ioh3420.c')) 5*6a36a4ceSSebastian Ottpci_ss.add(when: 'CONFIG_PCIE_PORT', if_true: files('pcie_root_port.c', 'gen_pcie_root_port.c')) 6*6a36a4ceSSebastian Ottpci_ss.add(when: 'CONFIG_PCIE_PCI_BRIDGE', if_true: files('pcie_pci_bridge.c')) 77bd1900bSJonathan Cameronpci_ss.add(when: 'CONFIG_PXB', if_true: files('pci_expander_bridge.c'), 87bd1900bSJonathan Cameron if_false: files('pci_expander_bridge_stubs.c')) 9ea7e9b57SMarc-André Lureaupci_ss.add(when: 'CONFIG_XIO3130', if_true: files('xio3130_upstream.c', 'xio3130_downstream.c')) 1018cef1c6SJonathan Cameronpci_ss.add(when: 'CONFIG_CXL', if_true: files('cxl_root_port.c', 'cxl_upstream.c', 'cxl_downstream.c')) 11ea7e9b57SMarc-André Lureau 12ea7e9b57SMarc-André Lureau# Sun4u 13ea7e9b57SMarc-André Lureaupci_ss.add(when: 'CONFIG_SIMBA', if_true: files('simba.c')) 14ea7e9b57SMarc-André Lureau 15ea7e9b57SMarc-André Lureausoftmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss) 167bd1900bSJonathan Cameron 177bd1900bSJonathan Cameronsoftmmu_ss.add(when: 'CONFIG_ALL', if_true: files('pci_expander_bridge_stubs.c')) 18