1*68fbcc34STong Ho /* 2*68fbcc34STong Ho * QEMU model of the EFUSE eFuse 3*68fbcc34STong Ho * 4*68fbcc34STong Ho * Copyright (c) 2015 Xilinx Inc. 5*68fbcc34STong Ho * 6*68fbcc34STong Ho * Written by Edgar E. Iglesias <edgari@xilinx.com> 7*68fbcc34STong Ho * 8*68fbcc34STong Ho * Permission is hereby granted, free of charge, to any person obtaining a copy 9*68fbcc34STong Ho * of this software and associated documentation files (the "Software"), to deal 10*68fbcc34STong Ho * in the Software without restriction, including without limitation the rights 11*68fbcc34STong Ho * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12*68fbcc34STong Ho * copies of the Software, and to permit persons to whom the Software is 13*68fbcc34STong Ho * furnished to do so, subject to the following conditions: 14*68fbcc34STong Ho * 15*68fbcc34STong Ho * The above copyright notice and this permission notice shall be included in 16*68fbcc34STong Ho * all copies or substantial portions of the Software. 17*68fbcc34STong Ho * 18*68fbcc34STong Ho * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19*68fbcc34STong Ho * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20*68fbcc34STong Ho * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21*68fbcc34STong Ho * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22*68fbcc34STong Ho * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23*68fbcc34STong Ho * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24*68fbcc34STong Ho * THE SOFTWARE. 25*68fbcc34STong Ho */ 26*68fbcc34STong Ho 27*68fbcc34STong Ho #include "qemu/osdep.h" 28*68fbcc34STong Ho #include "hw/nvram/xlnx-efuse.h" 29*68fbcc34STong Ho 30*68fbcc34STong Ho #include "qemu/error-report.h" 31*68fbcc34STong Ho #include "qemu/log.h" 32*68fbcc34STong Ho #include "qapi/error.h" 33*68fbcc34STong Ho #include "sysemu/blockdev.h" 34*68fbcc34STong Ho #include "hw/qdev-properties.h" 35*68fbcc34STong Ho #include "hw/qdev-properties-system.h" 36*68fbcc34STong Ho 37*68fbcc34STong Ho #define TBIT0_OFFSET 28 38*68fbcc34STong Ho #define TBIT1_OFFSET 29 39*68fbcc34STong Ho #define TBIT2_OFFSET 30 40*68fbcc34STong Ho #define TBIT3_OFFSET 31 41*68fbcc34STong Ho #define TBITS_PATTERN (0x0AU << TBIT0_OFFSET) 42*68fbcc34STong Ho #define TBITS_MASK (0x0FU << TBIT0_OFFSET) 43*68fbcc34STong Ho 44*68fbcc34STong Ho bool xlnx_efuse_get_bit(XlnxEFuse *s, unsigned int bit) 45*68fbcc34STong Ho { 46*68fbcc34STong Ho bool b = s->fuse32[bit / 32] & (1 << (bit % 32)); 47*68fbcc34STong Ho return b; 48*68fbcc34STong Ho } 49*68fbcc34STong Ho 50*68fbcc34STong Ho static int efuse_bytes(XlnxEFuse *s) 51*68fbcc34STong Ho { 52*68fbcc34STong Ho return ROUND_UP((s->efuse_nr * s->efuse_size) / 8, 4); 53*68fbcc34STong Ho } 54*68fbcc34STong Ho 55*68fbcc34STong Ho static int efuse_bdrv_read(XlnxEFuse *s, Error **errp) 56*68fbcc34STong Ho { 57*68fbcc34STong Ho uint32_t *ram = s->fuse32; 58*68fbcc34STong Ho int nr = efuse_bytes(s); 59*68fbcc34STong Ho 60*68fbcc34STong Ho if (!s->blk) { 61*68fbcc34STong Ho return 0; 62*68fbcc34STong Ho } 63*68fbcc34STong Ho 64*68fbcc34STong Ho s->blk_ro = !blk_supports_write_perm(s->blk); 65*68fbcc34STong Ho if (!s->blk_ro) { 66*68fbcc34STong Ho int rc; 67*68fbcc34STong Ho 68*68fbcc34STong Ho rc = blk_set_perm(s->blk, 69*68fbcc34STong Ho (BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE), 70*68fbcc34STong Ho BLK_PERM_ALL, NULL); 71*68fbcc34STong Ho if (rc) { 72*68fbcc34STong Ho s->blk_ro = true; 73*68fbcc34STong Ho } 74*68fbcc34STong Ho } 75*68fbcc34STong Ho if (s->blk_ro) { 76*68fbcc34STong Ho warn_report("%s: Skip saving updates to read-only eFUSE backstore.", 77*68fbcc34STong Ho blk_name(s->blk)); 78*68fbcc34STong Ho } 79*68fbcc34STong Ho 80*68fbcc34STong Ho if (blk_pread(s->blk, 0, ram, nr) < 0) { 81*68fbcc34STong Ho error_setg(errp, "%s: Failed to read %u bytes from eFUSE backstore.", 82*68fbcc34STong Ho blk_name(s->blk), nr); 83*68fbcc34STong Ho return -1; 84*68fbcc34STong Ho } 85*68fbcc34STong Ho 86*68fbcc34STong Ho /* Convert from little-endian backstore for each 32-bit row */ 87*68fbcc34STong Ho nr /= 4; 88*68fbcc34STong Ho while (nr--) { 89*68fbcc34STong Ho ram[nr] = le32_to_cpu(ram[nr]); 90*68fbcc34STong Ho } 91*68fbcc34STong Ho 92*68fbcc34STong Ho return 0; 93*68fbcc34STong Ho } 94*68fbcc34STong Ho 95*68fbcc34STong Ho static void efuse_bdrv_sync(XlnxEFuse *s, unsigned int bit) 96*68fbcc34STong Ho { 97*68fbcc34STong Ho unsigned int row_offset; 98*68fbcc34STong Ho uint32_t le32; 99*68fbcc34STong Ho 100*68fbcc34STong Ho if (!s->blk || s->blk_ro) { 101*68fbcc34STong Ho return; /* Silent on read-only backend to avoid message flood */ 102*68fbcc34STong Ho } 103*68fbcc34STong Ho 104*68fbcc34STong Ho /* Backstore is always in little-endian */ 105*68fbcc34STong Ho le32 = cpu_to_le32(xlnx_efuse_get_row(s, bit)); 106*68fbcc34STong Ho 107*68fbcc34STong Ho row_offset = (bit / 32) * 4; 108*68fbcc34STong Ho if (blk_pwrite(s->blk, row_offset, &le32, 4, 0) < 0) { 109*68fbcc34STong Ho error_report("%s: Failed to write offset %u of eFUSE backstore.", 110*68fbcc34STong Ho blk_name(s->blk), row_offset); 111*68fbcc34STong Ho } 112*68fbcc34STong Ho } 113*68fbcc34STong Ho 114*68fbcc34STong Ho static int efuse_ro_bits_cmp(const void *a, const void *b) 115*68fbcc34STong Ho { 116*68fbcc34STong Ho uint32_t i = *(const uint32_t *)a; 117*68fbcc34STong Ho uint32_t j = *(const uint32_t *)b; 118*68fbcc34STong Ho 119*68fbcc34STong Ho return (i > j) - (i < j); 120*68fbcc34STong Ho } 121*68fbcc34STong Ho 122*68fbcc34STong Ho static void efuse_ro_bits_sort(XlnxEFuse *s) 123*68fbcc34STong Ho { 124*68fbcc34STong Ho uint32_t *ary = s->ro_bits; 125*68fbcc34STong Ho const uint32_t cnt = s->ro_bits_cnt; 126*68fbcc34STong Ho 127*68fbcc34STong Ho if (ary && cnt > 1) { 128*68fbcc34STong Ho qsort(ary, cnt, sizeof(ary[0]), efuse_ro_bits_cmp); 129*68fbcc34STong Ho } 130*68fbcc34STong Ho } 131*68fbcc34STong Ho 132*68fbcc34STong Ho static bool efuse_ro_bits_find(XlnxEFuse *s, uint32_t k) 133*68fbcc34STong Ho { 134*68fbcc34STong Ho const uint32_t *ary = s->ro_bits; 135*68fbcc34STong Ho const uint32_t cnt = s->ro_bits_cnt; 136*68fbcc34STong Ho 137*68fbcc34STong Ho if (!ary || !cnt) { 138*68fbcc34STong Ho return false; 139*68fbcc34STong Ho } 140*68fbcc34STong Ho 141*68fbcc34STong Ho return bsearch(&k, ary, cnt, sizeof(ary[0]), efuse_ro_bits_cmp) != NULL; 142*68fbcc34STong Ho } 143*68fbcc34STong Ho 144*68fbcc34STong Ho bool xlnx_efuse_set_bit(XlnxEFuse *s, unsigned int bit) 145*68fbcc34STong Ho { 146*68fbcc34STong Ho if (efuse_ro_bits_find(s, bit)) { 147*68fbcc34STong Ho qemu_log_mask(LOG_GUEST_ERROR, "%s: WARN: " 148*68fbcc34STong Ho "Ignored setting of readonly efuse bit<%u,%u>!\n", 149*68fbcc34STong Ho object_get_canonical_path(OBJECT(s)), 150*68fbcc34STong Ho (bit / 32), (bit % 32)); 151*68fbcc34STong Ho return false; 152*68fbcc34STong Ho } 153*68fbcc34STong Ho 154*68fbcc34STong Ho s->fuse32[bit / 32] |= 1 << (bit % 32); 155*68fbcc34STong Ho efuse_bdrv_sync(s, bit); 156*68fbcc34STong Ho return true; 157*68fbcc34STong Ho } 158*68fbcc34STong Ho 159*68fbcc34STong Ho bool xlnx_efuse_k256_check(XlnxEFuse *s, uint32_t crc, unsigned start) 160*68fbcc34STong Ho { 161*68fbcc34STong Ho uint32_t calc; 162*68fbcc34STong Ho 163*68fbcc34STong Ho /* A key always occupies multiple of whole rows */ 164*68fbcc34STong Ho assert((start % 32) == 0); 165*68fbcc34STong Ho 166*68fbcc34STong Ho calc = xlnx_efuse_calc_crc(&s->fuse32[start / 32], (256 / 32), 0); 167*68fbcc34STong Ho return calc == crc; 168*68fbcc34STong Ho } 169*68fbcc34STong Ho 170*68fbcc34STong Ho uint32_t xlnx_efuse_tbits_check(XlnxEFuse *s) 171*68fbcc34STong Ho { 172*68fbcc34STong Ho int nr; 173*68fbcc34STong Ho uint32_t check = 0; 174*68fbcc34STong Ho 175*68fbcc34STong Ho for (nr = s->efuse_nr; nr-- > 0; ) { 176*68fbcc34STong Ho int efuse_start_row_num = (s->efuse_size * nr) / 32; 177*68fbcc34STong Ho uint32_t data = s->fuse32[efuse_start_row_num]; 178*68fbcc34STong Ho 179*68fbcc34STong Ho /* 180*68fbcc34STong Ho * If the option is on, auto-init blank T-bits. 181*68fbcc34STong Ho * (non-blank will still be reported as '0' in the check, e.g., 182*68fbcc34STong Ho * for error-injection tests) 183*68fbcc34STong Ho */ 184*68fbcc34STong Ho if ((data & TBITS_MASK) == 0 && s->init_tbits) { 185*68fbcc34STong Ho data |= TBITS_PATTERN; 186*68fbcc34STong Ho 187*68fbcc34STong Ho s->fuse32[efuse_start_row_num] = data; 188*68fbcc34STong Ho efuse_bdrv_sync(s, (efuse_start_row_num * 32 + TBIT0_OFFSET)); 189*68fbcc34STong Ho } 190*68fbcc34STong Ho 191*68fbcc34STong Ho check = (check << 1) | ((data & TBITS_MASK) == TBITS_PATTERN); 192*68fbcc34STong Ho } 193*68fbcc34STong Ho 194*68fbcc34STong Ho return check; 195*68fbcc34STong Ho } 196*68fbcc34STong Ho 197*68fbcc34STong Ho static void efuse_realize(DeviceState *dev, Error **errp) 198*68fbcc34STong Ho { 199*68fbcc34STong Ho XlnxEFuse *s = XLNX_EFUSE(dev); 200*68fbcc34STong Ho 201*68fbcc34STong Ho /* Sort readonly-list for bsearch lookup */ 202*68fbcc34STong Ho efuse_ro_bits_sort(s); 203*68fbcc34STong Ho 204*68fbcc34STong Ho if ((s->efuse_size % 32) != 0) { 205*68fbcc34STong Ho error_setg(errp, 206*68fbcc34STong Ho "%s.efuse-size: %u: property value not multiple of 32.", 207*68fbcc34STong Ho object_get_canonical_path(OBJECT(dev)), s->efuse_size); 208*68fbcc34STong Ho return; 209*68fbcc34STong Ho } 210*68fbcc34STong Ho 211*68fbcc34STong Ho s->fuse32 = g_malloc0(efuse_bytes(s)); 212*68fbcc34STong Ho if (efuse_bdrv_read(s, errp)) { 213*68fbcc34STong Ho g_free(s->fuse32); 214*68fbcc34STong Ho } 215*68fbcc34STong Ho } 216*68fbcc34STong Ho 217*68fbcc34STong Ho static void efuse_prop_set_drive(Object *obj, Visitor *v, const char *name, 218*68fbcc34STong Ho void *opaque, Error **errp) 219*68fbcc34STong Ho { 220*68fbcc34STong Ho DeviceState *dev = DEVICE(obj); 221*68fbcc34STong Ho 222*68fbcc34STong Ho qdev_prop_drive.set(obj, v, name, opaque, errp); 223*68fbcc34STong Ho 224*68fbcc34STong Ho /* Fill initial data if backend is attached after realized */ 225*68fbcc34STong Ho if (dev->realized) { 226*68fbcc34STong Ho efuse_bdrv_read(XLNX_EFUSE(obj), errp); 227*68fbcc34STong Ho } 228*68fbcc34STong Ho } 229*68fbcc34STong Ho 230*68fbcc34STong Ho static void efuse_prop_get_drive(Object *obj, Visitor *v, const char *name, 231*68fbcc34STong Ho void *opaque, Error **errp) 232*68fbcc34STong Ho { 233*68fbcc34STong Ho qdev_prop_drive.get(obj, v, name, opaque, errp); 234*68fbcc34STong Ho } 235*68fbcc34STong Ho 236*68fbcc34STong Ho static void efuse_prop_release_drive(Object *obj, const char *name, 237*68fbcc34STong Ho void *opaque) 238*68fbcc34STong Ho { 239*68fbcc34STong Ho qdev_prop_drive.release(obj, name, opaque); 240*68fbcc34STong Ho } 241*68fbcc34STong Ho 242*68fbcc34STong Ho static const PropertyInfo efuse_prop_drive = { 243*68fbcc34STong Ho .name = "str", 244*68fbcc34STong Ho .description = "Node name or ID of a block device to use as eFUSE backend", 245*68fbcc34STong Ho .realized_set_allowed = true, 246*68fbcc34STong Ho .get = efuse_prop_get_drive, 247*68fbcc34STong Ho .set = efuse_prop_set_drive, 248*68fbcc34STong Ho .release = efuse_prop_release_drive, 249*68fbcc34STong Ho }; 250*68fbcc34STong Ho 251*68fbcc34STong Ho static Property efuse_properties[] = { 252*68fbcc34STong Ho DEFINE_PROP("drive", XlnxEFuse, blk, efuse_prop_drive, BlockBackend *), 253*68fbcc34STong Ho DEFINE_PROP_UINT8("efuse-nr", XlnxEFuse, efuse_nr, 3), 254*68fbcc34STong Ho DEFINE_PROP_UINT32("efuse-size", XlnxEFuse, efuse_size, 64 * 32), 255*68fbcc34STong Ho DEFINE_PROP_BOOL("init-factory-tbits", XlnxEFuse, init_tbits, true), 256*68fbcc34STong Ho DEFINE_PROP_ARRAY("read-only", XlnxEFuse, ro_bits_cnt, ro_bits, 257*68fbcc34STong Ho qdev_prop_uint32, uint32_t), 258*68fbcc34STong Ho DEFINE_PROP_END_OF_LIST(), 259*68fbcc34STong Ho }; 260*68fbcc34STong Ho 261*68fbcc34STong Ho static void efuse_class_init(ObjectClass *klass, void *data) 262*68fbcc34STong Ho { 263*68fbcc34STong Ho DeviceClass *dc = DEVICE_CLASS(klass); 264*68fbcc34STong Ho 265*68fbcc34STong Ho dc->realize = efuse_realize; 266*68fbcc34STong Ho device_class_set_props(dc, efuse_properties); 267*68fbcc34STong Ho } 268*68fbcc34STong Ho 269*68fbcc34STong Ho static const TypeInfo efuse_info = { 270*68fbcc34STong Ho .name = TYPE_XLNX_EFUSE, 271*68fbcc34STong Ho .parent = TYPE_DEVICE, 272*68fbcc34STong Ho .instance_size = sizeof(XlnxEFuse), 273*68fbcc34STong Ho .class_init = efuse_class_init, 274*68fbcc34STong Ho }; 275*68fbcc34STong Ho 276*68fbcc34STong Ho static void efuse_register_types(void) 277*68fbcc34STong Ho { 278*68fbcc34STong Ho type_register_static(&efuse_info); 279*68fbcc34STong Ho } 280*68fbcc34STong Ho type_init(efuse_register_types) 281