1 /* 2 * PowerMac NVRAM emulation 3 * 4 * Copyright (c) 2005-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "hw/nvram/chrp_nvram.h" 28 #include "hw/ppc/mac.h" 29 #include "hw/qdev-properties.h" 30 #include "migration/vmstate.h" 31 #include "qemu/cutils.h" 32 #include "qemu/module.h" 33 #include <zlib.h> 34 35 /* debug NVR */ 36 //#define DEBUG_NVR 37 38 #ifdef DEBUG_NVR 39 #define NVR_DPRINTF(fmt, ...) \ 40 do { printf("NVR: " fmt , ## __VA_ARGS__); } while (0) 41 #else 42 #define NVR_DPRINTF(fmt, ...) 43 #endif 44 45 #define DEF_SYSTEM_SIZE 0xc10 46 47 /* macio style NVRAM device */ 48 static void macio_nvram_writeb(void *opaque, hwaddr addr, 49 uint64_t value, unsigned size) 50 { 51 MacIONVRAMState *s = opaque; 52 53 addr = (addr >> s->it_shift) & (s->size - 1); 54 s->data[addr] = value; 55 NVR_DPRINTF("writeb addr %04" HWADDR_PRIx " val %" PRIx64 "\n", 56 addr, value); 57 } 58 59 static uint64_t macio_nvram_readb(void *opaque, hwaddr addr, 60 unsigned size) 61 { 62 MacIONVRAMState *s = opaque; 63 uint32_t value; 64 65 addr = (addr >> s->it_shift) & (s->size - 1); 66 value = s->data[addr]; 67 NVR_DPRINTF("readb addr %04" HWADDR_PRIx " val %" PRIx32 "\n", 68 addr, value); 69 70 return value; 71 } 72 73 static const MemoryRegionOps macio_nvram_ops = { 74 .read = macio_nvram_readb, 75 .write = macio_nvram_writeb, 76 .valid.min_access_size = 1, 77 .valid.max_access_size = 4, 78 .impl.min_access_size = 1, 79 .impl.max_access_size = 1, 80 .endianness = DEVICE_BIG_ENDIAN, 81 }; 82 83 static const VMStateDescription vmstate_macio_nvram = { 84 .name = "macio_nvram", 85 .version_id = 1, 86 .minimum_version_id = 1, 87 .fields = (VMStateField[]) { 88 VMSTATE_VBUFFER_UINT32(data, MacIONVRAMState, 0, NULL, size), 89 VMSTATE_END_OF_LIST() 90 } 91 }; 92 93 94 static void macio_nvram_reset(DeviceState *dev) 95 { 96 } 97 98 static void macio_nvram_realizefn(DeviceState *dev, Error **errp) 99 { 100 SysBusDevice *d = SYS_BUS_DEVICE(dev); 101 MacIONVRAMState *s = MACIO_NVRAM(dev); 102 103 s->data = g_malloc0(s->size); 104 105 memory_region_init_io(&s->mem, OBJECT(s), &macio_nvram_ops, s, 106 "macio-nvram", s->size << s->it_shift); 107 sysbus_init_mmio(d, &s->mem); 108 } 109 110 static void macio_nvram_unrealizefn(DeviceState *dev, Error **errp) 111 { 112 MacIONVRAMState *s = MACIO_NVRAM(dev); 113 114 g_free(s->data); 115 } 116 117 static Property macio_nvram_properties[] = { 118 DEFINE_PROP_UINT32("size", MacIONVRAMState, size, 0), 119 DEFINE_PROP_UINT32("it_shift", MacIONVRAMState, it_shift, 0), 120 DEFINE_PROP_END_OF_LIST() 121 }; 122 123 static void macio_nvram_class_init(ObjectClass *oc, void *data) 124 { 125 DeviceClass *dc = DEVICE_CLASS(oc); 126 127 dc->realize = macio_nvram_realizefn; 128 dc->unrealize = macio_nvram_unrealizefn; 129 dc->reset = macio_nvram_reset; 130 dc->vmsd = &vmstate_macio_nvram; 131 dc->props = macio_nvram_properties; 132 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 133 } 134 135 static const TypeInfo macio_nvram_type_info = { 136 .name = TYPE_MACIO_NVRAM, 137 .parent = TYPE_SYS_BUS_DEVICE, 138 .instance_size = sizeof(MacIONVRAMState), 139 .class_init = macio_nvram_class_init, 140 }; 141 142 static void macio_nvram_register_types(void) 143 { 144 type_register_static(&macio_nvram_type_info); 145 } 146 147 /* Set up a system OpenBIOS NVRAM partition */ 148 static void pmac_format_nvram_partition_of(MacIONVRAMState *nvr, int off, 149 int len) 150 { 151 int sysp_end; 152 153 /* OpenBIOS nvram variables partition */ 154 sysp_end = chrp_nvram_create_system_partition(&nvr->data[off], 155 DEF_SYSTEM_SIZE) + off; 156 157 /* Free space partition */ 158 chrp_nvram_create_free_partition(&nvr->data[sysp_end], len - sysp_end); 159 } 160 161 #define OSX_NVRAM_SIGNATURE (0x5A) 162 163 /* Set up a Mac OS X NVRAM partition */ 164 static void pmac_format_nvram_partition_osx(MacIONVRAMState *nvr, int off, 165 int len) 166 { 167 uint32_t start = off; 168 ChrpNvramPartHdr *part_header; 169 unsigned char *data = &nvr->data[start]; 170 171 /* empty partition */ 172 part_header = (ChrpNvramPartHdr *)data; 173 part_header->signature = OSX_NVRAM_SIGNATURE; 174 pstrcpy(part_header->name, sizeof(part_header->name), "wwwwwwwwwwww"); 175 176 chrp_nvram_finish_partition(part_header, len); 177 178 /* Generation */ 179 stl_be_p(&data[20], 2); 180 181 /* Adler32 checksum */ 182 stl_be_p(&data[16], adler32(0, &data[20], len - 20)); 183 } 184 185 /* Set up NVRAM with OF and OSX partitions */ 186 void pmac_format_nvram_partition(MacIONVRAMState *nvr, int len) 187 { 188 /* 189 * Mac OS X expects side "B" of the flash at the second half of NVRAM, 190 * so we use half of the chip for OF and the other half for a free OSX 191 * partition. 192 */ 193 pmac_format_nvram_partition_of(nvr, 0, len / 2); 194 pmac_format_nvram_partition_osx(nvr, len / 2, len / 2); 195 } 196 type_init(macio_nvram_register_types) 197