1 /* 2 * PowerMac NVRAM emulation 3 * 4 * Copyright (c) 2005-2007 Fabrice Bellard 5 * Copyright (c) 2007 Jocelyn Mayer 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "hw/hw.h" 28 #include "hw/nvram/chrp_nvram.h" 29 #include "hw/ppc/mac.h" 30 #include "qemu/cutils.h" 31 #include "qemu/module.h" 32 #include <zlib.h> 33 34 /* debug NVR */ 35 //#define DEBUG_NVR 36 37 #ifdef DEBUG_NVR 38 #define NVR_DPRINTF(fmt, ...) \ 39 do { printf("NVR: " fmt , ## __VA_ARGS__); } while (0) 40 #else 41 #define NVR_DPRINTF(fmt, ...) 42 #endif 43 44 #define DEF_SYSTEM_SIZE 0xc10 45 46 /* macio style NVRAM device */ 47 static void macio_nvram_writeb(void *opaque, hwaddr addr, 48 uint64_t value, unsigned size) 49 { 50 MacIONVRAMState *s = opaque; 51 52 addr = (addr >> s->it_shift) & (s->size - 1); 53 s->data[addr] = value; 54 NVR_DPRINTF("writeb addr %04" HWADDR_PRIx " val %" PRIx64 "\n", 55 addr, value); 56 } 57 58 static uint64_t macio_nvram_readb(void *opaque, hwaddr addr, 59 unsigned size) 60 { 61 MacIONVRAMState *s = opaque; 62 uint32_t value; 63 64 addr = (addr >> s->it_shift) & (s->size - 1); 65 value = s->data[addr]; 66 NVR_DPRINTF("readb addr %04" HWADDR_PRIx " val %" PRIx32 "\n", 67 addr, value); 68 69 return value; 70 } 71 72 static const MemoryRegionOps macio_nvram_ops = { 73 .read = macio_nvram_readb, 74 .write = macio_nvram_writeb, 75 .valid.min_access_size = 1, 76 .valid.max_access_size = 4, 77 .impl.min_access_size = 1, 78 .impl.max_access_size = 1, 79 .endianness = DEVICE_BIG_ENDIAN, 80 }; 81 82 static const VMStateDescription vmstate_macio_nvram = { 83 .name = "macio_nvram", 84 .version_id = 1, 85 .minimum_version_id = 1, 86 .fields = (VMStateField[]) { 87 VMSTATE_VBUFFER_UINT32(data, MacIONVRAMState, 0, NULL, size), 88 VMSTATE_END_OF_LIST() 89 } 90 }; 91 92 93 static void macio_nvram_reset(DeviceState *dev) 94 { 95 } 96 97 static void macio_nvram_realizefn(DeviceState *dev, Error **errp) 98 { 99 SysBusDevice *d = SYS_BUS_DEVICE(dev); 100 MacIONVRAMState *s = MACIO_NVRAM(dev); 101 102 s->data = g_malloc0(s->size); 103 104 memory_region_init_io(&s->mem, OBJECT(s), &macio_nvram_ops, s, 105 "macio-nvram", s->size << s->it_shift); 106 sysbus_init_mmio(d, &s->mem); 107 } 108 109 static void macio_nvram_unrealizefn(DeviceState *dev, Error **errp) 110 { 111 MacIONVRAMState *s = MACIO_NVRAM(dev); 112 113 g_free(s->data); 114 } 115 116 static Property macio_nvram_properties[] = { 117 DEFINE_PROP_UINT32("size", MacIONVRAMState, size, 0), 118 DEFINE_PROP_UINT32("it_shift", MacIONVRAMState, it_shift, 0), 119 DEFINE_PROP_END_OF_LIST() 120 }; 121 122 static void macio_nvram_class_init(ObjectClass *oc, void *data) 123 { 124 DeviceClass *dc = DEVICE_CLASS(oc); 125 126 dc->realize = macio_nvram_realizefn; 127 dc->unrealize = macio_nvram_unrealizefn; 128 dc->reset = macio_nvram_reset; 129 dc->vmsd = &vmstate_macio_nvram; 130 dc->props = macio_nvram_properties; 131 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 132 } 133 134 static const TypeInfo macio_nvram_type_info = { 135 .name = TYPE_MACIO_NVRAM, 136 .parent = TYPE_SYS_BUS_DEVICE, 137 .instance_size = sizeof(MacIONVRAMState), 138 .class_init = macio_nvram_class_init, 139 }; 140 141 static void macio_nvram_register_types(void) 142 { 143 type_register_static(&macio_nvram_type_info); 144 } 145 146 /* Set up a system OpenBIOS NVRAM partition */ 147 static void pmac_format_nvram_partition_of(MacIONVRAMState *nvr, int off, 148 int len) 149 { 150 int sysp_end; 151 152 /* OpenBIOS nvram variables partition */ 153 sysp_end = chrp_nvram_create_system_partition(&nvr->data[off], 154 DEF_SYSTEM_SIZE) + off; 155 156 /* Free space partition */ 157 chrp_nvram_create_free_partition(&nvr->data[sysp_end], len - sysp_end); 158 } 159 160 #define OSX_NVRAM_SIGNATURE (0x5A) 161 162 /* Set up a Mac OS X NVRAM partition */ 163 static void pmac_format_nvram_partition_osx(MacIONVRAMState *nvr, int off, 164 int len) 165 { 166 uint32_t start = off; 167 ChrpNvramPartHdr *part_header; 168 unsigned char *data = &nvr->data[start]; 169 170 /* empty partition */ 171 part_header = (ChrpNvramPartHdr *)data; 172 part_header->signature = OSX_NVRAM_SIGNATURE; 173 pstrcpy(part_header->name, sizeof(part_header->name), "wwwwwwwwwwww"); 174 175 chrp_nvram_finish_partition(part_header, len); 176 177 /* Generation */ 178 stl_be_p(&data[20], 2); 179 180 /* Adler32 checksum */ 181 stl_be_p(&data[16], adler32(0, &data[20], len - 20)); 182 } 183 184 /* Set up NVRAM with OF and OSX partitions */ 185 void pmac_format_nvram_partition(MacIONVRAMState *nvr, int len) 186 { 187 /* 188 * Mac OS X expects side "B" of the flash at the second half of NVRAM, 189 * so we use half of the chip for OF and the other half for a free OSX 190 * partition. 191 */ 192 pmac_format_nvram_partition_of(nvr, 0, len / 2); 193 pmac_format_nvram_partition_osx(nvr, len / 2, len / 2); 194 } 195 type_init(macio_nvram_register_types) 196