xref: /openbmc/qemu/hw/nvram/ds1225y.c (revision 650d103d3ea959212f826acb9d3fe80cf30e347b)
1 /*
2  * QEMU NVRAM emulation for DS1225Y chip
3  *
4  * Copyright (c) 2007-2008 HervĂ© Poussineau
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #include "qemu/osdep.h"
26 #include "hw/sysbus.h"
27 #include "migration/vmstate.h"
28 #include "trace.h"
29 #include "qemu/error-report.h"
30 #include "qemu/module.h"
31 
32 typedef struct {
33     MemoryRegion iomem;
34     uint32_t chip_size;
35     char *filename;
36     FILE *file;
37     uint8_t *contents;
38 } NvRamState;
39 
40 static uint64_t nvram_read(void *opaque, hwaddr addr, unsigned size)
41 {
42     NvRamState *s = opaque;
43     uint32_t val;
44 
45     val = s->contents[addr];
46     trace_nvram_read(addr, val);
47     return val;
48 }
49 
50 static void nvram_write(void *opaque, hwaddr addr, uint64_t val,
51                         unsigned size)
52 {
53     NvRamState *s = opaque;
54 
55     val &= 0xff;
56     trace_nvram_write(addr, s->contents[addr], val);
57 
58     s->contents[addr] = val;
59     if (s->file) {
60         fseek(s->file, addr, SEEK_SET);
61         fputc(val, s->file);
62         fflush(s->file);
63     }
64 }
65 
66 static const MemoryRegionOps nvram_ops = {
67     .read = nvram_read,
68     .write = nvram_write,
69     .impl = {
70         .min_access_size = 1,
71         .max_access_size = 1,
72     },
73     .endianness = DEVICE_LITTLE_ENDIAN,
74 };
75 
76 static int nvram_post_load(void *opaque, int version_id)
77 {
78     NvRamState *s = opaque;
79 
80     /* Close file, as filename may has changed in load/store process */
81     if (s->file) {
82         fclose(s->file);
83     }
84 
85     /* Write back nvram contents */
86     s->file = s->filename ? fopen(s->filename, "wb") : NULL;
87     if (s->file) {
88         /* Write back contents, as 'wb' mode cleaned the file */
89         if (fwrite(s->contents, s->chip_size, 1, s->file) != 1) {
90             printf("nvram_post_load: short write\n");
91         }
92         fflush(s->file);
93     }
94 
95     return 0;
96 }
97 
98 static const VMStateDescription vmstate_nvram = {
99     .name = "nvram",
100     .version_id = 0,
101     .minimum_version_id = 0,
102     .post_load = nvram_post_load,
103     .fields = (VMStateField[]) {
104         VMSTATE_VARRAY_UINT32(contents, NvRamState, chip_size, 0,
105                               vmstate_info_uint8, uint8_t),
106         VMSTATE_END_OF_LIST()
107     }
108 };
109 
110 #define TYPE_DS1225Y "ds1225y"
111 #define DS1225Y(obj) OBJECT_CHECK(SysBusNvRamState, (obj), TYPE_DS1225Y)
112 
113 typedef struct {
114     SysBusDevice parent_obj;
115 
116     NvRamState nvram;
117 } SysBusNvRamState;
118 
119 static void nvram_sysbus_realize(DeviceState *dev, Error **errp)
120 {
121     SysBusNvRamState *sys = DS1225Y(dev);
122     NvRamState *s = &sys->nvram;
123     FILE *file;
124 
125     s->contents = g_malloc0(s->chip_size);
126 
127     memory_region_init_io(&s->iomem, OBJECT(s), &nvram_ops, s,
128                           "nvram", s->chip_size);
129     sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
130 
131     /* Read current file */
132     file = s->filename ? fopen(s->filename, "rb") : NULL;
133     if (file) {
134         /* Read nvram contents */
135         if (fread(s->contents, s->chip_size, 1, file) != 1) {
136             error_report("nvram_sysbus_realize: short read");
137         }
138         fclose(file);
139     }
140     nvram_post_load(s, 0);
141 }
142 
143 static Property nvram_sysbus_properties[] = {
144     DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000),
145     DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename),
146     DEFINE_PROP_END_OF_LIST(),
147 };
148 
149 static void nvram_sysbus_class_init(ObjectClass *klass, void *data)
150 {
151     DeviceClass *dc = DEVICE_CLASS(klass);
152 
153     dc->realize = nvram_sysbus_realize;
154     dc->vmsd = &vmstate_nvram;
155     dc->props = nvram_sysbus_properties;
156 }
157 
158 static const TypeInfo nvram_sysbus_info = {
159     .name          = TYPE_DS1225Y,
160     .parent        = TYPE_SYS_BUS_DEVICE,
161     .instance_size = sizeof(SysBusNvRamState),
162     .class_init    = nvram_sysbus_class_init,
163 };
164 
165 static void nvram_register_types(void)
166 {
167     type_register_static(&nvram_sysbus_info);
168 }
169 
170 type_init(nvram_register_types)
171