1*ed960ba9SSandra Loosemore /* 2*ed960ba9SSandra Loosemore * Generic simulator target with no MMU or devices. This emulation is 3*ed960ba9SSandra Loosemore * compatible with the libgloss qemu-hosted.ld linker script for using 4*ed960ba9SSandra Loosemore * QEMU as an instruction set simulator. 5*ed960ba9SSandra Loosemore * 6*ed960ba9SSandra Loosemore * Copyright (c) 2018-2019 Mentor Graphics 7*ed960ba9SSandra Loosemore * 8*ed960ba9SSandra Loosemore * Copyright (c) 2016 Marek Vasut <marek.vasut@gmail.com> 9*ed960ba9SSandra Loosemore * 10*ed960ba9SSandra Loosemore * Based on LabX device code 11*ed960ba9SSandra Loosemore * 12*ed960ba9SSandra Loosemore * Copyright (c) 2012 Chris Wulff <crwulff@gmail.com> 13*ed960ba9SSandra Loosemore * 14*ed960ba9SSandra Loosemore * This library is free software; you can redistribute it and/or 15*ed960ba9SSandra Loosemore * modify it under the terms of the GNU Lesser General Public 16*ed960ba9SSandra Loosemore * License as published by the Free Software Foundation; either 17*ed960ba9SSandra Loosemore * version 2.1 of the License, or (at your option) any later version. 18*ed960ba9SSandra Loosemore * 19*ed960ba9SSandra Loosemore * This library is distributed in the hope that it will be useful, 20*ed960ba9SSandra Loosemore * but WITHOUT ANY WARRANTY; without even the implied warranty of 21*ed960ba9SSandra Loosemore * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 22*ed960ba9SSandra Loosemore * Lesser General Public License for more details. 23*ed960ba9SSandra Loosemore * 24*ed960ba9SSandra Loosemore * You should have received a copy of the GNU Lesser General Public 25*ed960ba9SSandra Loosemore * License along with this library; if not, see 26*ed960ba9SSandra Loosemore * <http://www.gnu.org/licenses/lgpl-2.1.html> 27*ed960ba9SSandra Loosemore */ 28*ed960ba9SSandra Loosemore 29*ed960ba9SSandra Loosemore #include "qemu/osdep.h" 30*ed960ba9SSandra Loosemore #include "qapi/error.h" 31*ed960ba9SSandra Loosemore #include "qemu-common.h" 32*ed960ba9SSandra Loosemore #include "cpu.h" 33*ed960ba9SSandra Loosemore 34*ed960ba9SSandra Loosemore #include "hw/sysbus.h" 35*ed960ba9SSandra Loosemore #include "hw/hw.h" 36*ed960ba9SSandra Loosemore #include "hw/char/serial.h" 37*ed960ba9SSandra Loosemore #include "sysemu/sysemu.h" 38*ed960ba9SSandra Loosemore #include "hw/boards.h" 39*ed960ba9SSandra Loosemore #include "exec/memory.h" 40*ed960ba9SSandra Loosemore #include "exec/address-spaces.h" 41*ed960ba9SSandra Loosemore #include "qemu/config-file.h" 42*ed960ba9SSandra Loosemore 43*ed960ba9SSandra Loosemore #include "boot.h" 44*ed960ba9SSandra Loosemore 45*ed960ba9SSandra Loosemore #define BINARY_DEVICE_TREE_FILE "generic-nommu.dtb" 46*ed960ba9SSandra Loosemore 47*ed960ba9SSandra Loosemore static void nios2_generic_nommu_init(MachineState *machine) 48*ed960ba9SSandra Loosemore { 49*ed960ba9SSandra Loosemore Nios2CPU *cpu; 50*ed960ba9SSandra Loosemore MemoryRegion *address_space_mem = get_system_memory(); 51*ed960ba9SSandra Loosemore MemoryRegion *phys_tcm = g_new(MemoryRegion, 1); 52*ed960ba9SSandra Loosemore MemoryRegion *phys_tcm_alias = g_new(MemoryRegion, 1); 53*ed960ba9SSandra Loosemore MemoryRegion *phys_ram = g_new(MemoryRegion, 1); 54*ed960ba9SSandra Loosemore MemoryRegion *phys_ram_alias = g_new(MemoryRegion, 1); 55*ed960ba9SSandra Loosemore ram_addr_t tcm_base = 0x0; 56*ed960ba9SSandra Loosemore ram_addr_t tcm_size = 0x1000; /* 1 kiB, but QEMU limit is 4 kiB */ 57*ed960ba9SSandra Loosemore ram_addr_t ram_base = 0x10000000; 58*ed960ba9SSandra Loosemore ram_addr_t ram_size = 0x08000000; 59*ed960ba9SSandra Loosemore 60*ed960ba9SSandra Loosemore /* Physical TCM (tb_ram_1k) with alias at 0xc0000000 */ 61*ed960ba9SSandra Loosemore memory_region_init_ram(phys_tcm, NULL, "nios2.tcm", tcm_size, 62*ed960ba9SSandra Loosemore &error_abort); 63*ed960ba9SSandra Loosemore memory_region_init_alias(phys_tcm_alias, NULL, "nios2.tcm.alias", 64*ed960ba9SSandra Loosemore phys_tcm, 0, tcm_size); 65*ed960ba9SSandra Loosemore memory_region_add_subregion(address_space_mem, tcm_base, phys_tcm); 66*ed960ba9SSandra Loosemore memory_region_add_subregion(address_space_mem, 0xc0000000 + tcm_base, 67*ed960ba9SSandra Loosemore phys_tcm_alias); 68*ed960ba9SSandra Loosemore 69*ed960ba9SSandra Loosemore /* Physical DRAM with alias at 0xc0000000 */ 70*ed960ba9SSandra Loosemore memory_region_init_ram(phys_ram, NULL, "nios2.ram", ram_size, 71*ed960ba9SSandra Loosemore &error_abort); 72*ed960ba9SSandra Loosemore memory_region_init_alias(phys_ram_alias, NULL, "nios2.ram.alias", 73*ed960ba9SSandra Loosemore phys_ram, 0, ram_size); 74*ed960ba9SSandra Loosemore memory_region_add_subregion(address_space_mem, ram_base, phys_ram); 75*ed960ba9SSandra Loosemore memory_region_add_subregion(address_space_mem, 0xc0000000 + ram_base, 76*ed960ba9SSandra Loosemore phys_ram_alias); 77*ed960ba9SSandra Loosemore 78*ed960ba9SSandra Loosemore cpu = NIOS2_CPU(cpu_create(TYPE_NIOS2_CPU)); 79*ed960ba9SSandra Loosemore 80*ed960ba9SSandra Loosemore /* Remove MMU */ 81*ed960ba9SSandra Loosemore cpu->mmu_present = false; 82*ed960ba9SSandra Loosemore 83*ed960ba9SSandra Loosemore /* Reset vector is the first 32 bytes of RAM. */ 84*ed960ba9SSandra Loosemore cpu->reset_addr = ram_base; 85*ed960ba9SSandra Loosemore 86*ed960ba9SSandra Loosemore /* The interrupt vector comes right after reset. */ 87*ed960ba9SSandra Loosemore cpu->exception_addr = ram_base + 0x20; 88*ed960ba9SSandra Loosemore 89*ed960ba9SSandra Loosemore /* 90*ed960ba9SSandra Loosemore * The linker script does have a TLB miss memory region declared, 91*ed960ba9SSandra Loosemore * but this should never be used with no MMU. 92*ed960ba9SSandra Loosemore */ 93*ed960ba9SSandra Loosemore cpu->fast_tlb_miss_addr = 0x7fff400; 94*ed960ba9SSandra Loosemore 95*ed960ba9SSandra Loosemore nios2_load_kernel(cpu, ram_base, ram_size, machine->initrd_filename, 96*ed960ba9SSandra Loosemore BINARY_DEVICE_TREE_FILE, NULL); 97*ed960ba9SSandra Loosemore } 98*ed960ba9SSandra Loosemore 99*ed960ba9SSandra Loosemore static void nios2_generic_nommu_machine_init(struct MachineClass *mc) 100*ed960ba9SSandra Loosemore { 101*ed960ba9SSandra Loosemore mc->desc = "Generic NOMMU Nios II design"; 102*ed960ba9SSandra Loosemore mc->init = nios2_generic_nommu_init; 103*ed960ba9SSandra Loosemore } 104*ed960ba9SSandra Loosemore 105*ed960ba9SSandra Loosemore DEFINE_MACHINE("nios2-generic-nommu", nios2_generic_nommu_machine_init); 106