1 #ifndef HW_TULIP_H 2 #define HW_TULIP_H 3 4 #include "qemu/units.h" 5 #include "net/net.h" 6 7 #define TYPE_TULIP "tulip" 8 #define TULIP(obj) OBJECT_CHECK(TULIPState, (obj), TYPE_TULIP) 9 10 #define CSR(_x) ((_x) << 3) 11 12 #define CSR0_SWR BIT(0) 13 #define CSR0_BAR BIT(1) 14 #define CSR0_DSL_SHIFT 2 15 #define CSR0_DSL_MASK 0x1f 16 #define CSR0_BLE BIT(7) 17 #define CSR0_PBL_SHIFT 8 18 #define CSR0_PBL_MASK 0x3f 19 #define CSR0_CAC_SHIFT 14 20 #define CSR0_CAC_MASK 0x3 21 #define CSR0_DAS 0x10000 22 #define CSR0_TAP_SHIFT 17 23 #define CSR0_TAP_MASK 0x7 24 #define CSR0_DBO 0x100000 25 #define CSR1_TPD 0x01 26 #define CSR0_RLE BIT(23) 27 #define CSR0_WIE BIT(24) 28 29 #define CSR2_RPD 0x01 30 31 #define CSR5_TI BIT(0) 32 #define CSR5_TPS BIT(1) 33 #define CSR5_TU BIT(2) 34 #define CSR5_TJT BIT(3) 35 #define CSR5_LNP_ANC BIT(4) 36 #define CSR5_UNF BIT(5) 37 #define CSR5_RI BIT(6) 38 #define CSR5_RU BIT(7) 39 #define CSR5_RPS BIT(8) 40 #define CSR5_RWT BIT(9) 41 #define CSR5_ETI BIT(10) 42 #define CSR5_GTE BIT(11) 43 #define CSR5_LNF BIT(12) 44 #define CSR5_FBE BIT(13) 45 #define CSR5_ERI BIT(14) 46 #define CSR5_AIS BIT(15) 47 #define CSR5_NIS BIT(16) 48 #define CSR5_RS_SHIFT 17 49 #define CSR5_RS_MASK 7 50 #define CSR5_TS_SHIFT 20 51 #define CSR5_TS_MASK 7 52 53 #define CSR5_TS_STOPPED 0 54 #define CSR5_TS_RUNNING_FETCH 1 55 #define CSR5_TS_RUNNING_WAIT_EOT 2 56 #define CSR5_TS_RUNNING_READ_BUF 3 57 #define CSR5_TS_RUNNING_SETUP 5 58 #define CSR5_TS_SUSPENDED 6 59 #define CSR5_TS_RUNNING_CLOSE 7 60 61 #define CSR5_RS_STOPPED 0 62 #define CSR5_RS_RUNNING_FETCH 1 63 #define CSR5_RS_RUNNING_CHECK_EOR 2 64 #define CSR5_RS_RUNNING_WAIT_RECEIVE 3 65 #define CSR5_RS_SUSPENDED 4 66 #define CSR5_RS_RUNNING_CLOSE 5 67 #define CSR5_RS_RUNNING_FLUSH 6 68 #define CSR5_RS_RUNNING_QUEUE 7 69 70 #define CSR5_EB_SHIFT 23 71 #define CSR5_EB_MASK 7 72 73 #define CSR5_GPI BIT(26) 74 #define CSR5_LC BIT(27) 75 76 #define CSR6_HP BIT(0) 77 #define CSR6_SR BIT(1) 78 #define CSR6_HO BIT(2) 79 #define CSR6_PB BIT(3) 80 #define CSR6_IF BIT(4) 81 #define CSR6_SB BIT(5) 82 #define CSR6_PR BIT(6) 83 #define CSR6_PM BIT(7) 84 #define CSR6_FKD BIT(8) 85 #define CSR6_FD BIT(9) 86 87 #define CSR6_OM_SHIFT 10 88 #define CSR6_OM_MASK 3 89 #define CSR6_OM_NORMAL 0 90 #define CSR6_OM_INT_LOOPBACK 1 91 #define CSR6_OM_EXT_LOOPBACK 2 92 93 #define CSR6_FC BIT(12) 94 #define CSR6_ST BIT(13) 95 96 97 #define CSR6_TR_SHIFT 14 98 #define CSR6_TR_MASK 3 99 #define CSR6_TR_72 0 100 #define CSR6_TR_96 1 101 #define CSR6_TR_128 2 102 #define CSR6_TR_160 3 103 104 #define CSR6_CA BIT(17) 105 #define CSR6_RA BIT(30) 106 #define CSR6_SC BIT(31) 107 108 #define CSR7_TIM BIT(0) 109 #define CSR7_TSM BIT(1) 110 #define CSR7_TUM BIT(2) 111 #define CSR7_TJM BIT(3) 112 #define CSR7_LPM BIT(4) 113 #define CSR7_UNM BIT(5) 114 #define CSR7_RIM BIT(6) 115 #define CSR7_RUM BIT(7) 116 #define CSR7_RSM BIT(8) 117 #define CSR7_RWM BIT(9) 118 #define CSR7_TMM BIT(11) 119 #define CSR7_LFM BIT(12) 120 #define CSR7_SEM BIT(13) 121 #define CSR7_ERM BIT(14) 122 #define CSR7_AIM BIT(15) 123 #define CSR7_NIM BIT(16) 124 125 #define CSR8_MISSED_FRAME_OVL BIT(16) 126 #define CSR8_MISSED_FRAME_CNT_MASK 0xffff 127 128 #define CSR9_DATA_MASK 0xff 129 #define CSR9_SR_CS BIT(0) 130 #define CSR9_SR_SK BIT(1) 131 #define CSR9_SR_DI BIT(2) 132 #define CSR9_SR_DO BIT(3) 133 #define CSR9_REG BIT(10) 134 #define CSR9_SR BIT(11) 135 #define CSR9_BR BIT(12) 136 #define CSR9_WR BIT(13) 137 #define CSR9_RD BIT(14) 138 #define CSR9_MOD BIT(15) 139 #define CSR9_MDC BIT(16) 140 #define CSR9_MDO BIT(17) 141 #define CSR9_MII BIT(18) 142 #define CSR9_MDI BIT(19) 143 144 #define CSR11_CON BIT(16) 145 #define CSR11_TIMER_MASK 0xffff 146 147 #define CSR12_MRA BIT(0) 148 #define CSR12_LS100 BIT(1) 149 #define CSR12_LS10 BIT(2) 150 #define CSR12_APS BIT(3) 151 #define CSR12_ARA BIT(8) 152 #define CSR12_TRA BIT(9) 153 #define CSR12_NSN BIT(10) 154 #define CSR12_TRF BIT(11) 155 #define CSR12_ANS_SHIFT 12 156 #define CSR12_ANS_MASK 7 157 #define CSR12_LPN BIT(15) 158 #define CSR12_LPC_SHIFT 16 159 #define CSR12_LPC_MASK 0xffff 160 161 #define CSR13_SRL BIT(0) 162 #define CSR13_CAC BIT(2) 163 #define CSR13_AUI BIT(3) 164 #define CSR13_SDM_SHIFT 4 165 #define CSR13_SDM_MASK 0xfff 166 167 #define CSR14_ECEN BIT(0) 168 #define CSR14_LBK BIT(1) 169 #define CSR14_DREN BIT(2) 170 #define CSR14_LSE BIT(3) 171 #define CSR14_CPEN_SHIFT 4 172 #define CSR14_CPEN_MASK 3 173 #define CSR14_MBO BIT(6) 174 #define CSR14_ANE BIT(7) 175 #define CSR14_RSQ BIT(8) 176 #define CSR14_CSQ BIT(9) 177 #define CSR14_CLD BIT(10) 178 #define CSR14_SQE BIT(11) 179 #define CSR14_LTE BIT(12) 180 #define CSR14_APE BIT(13) 181 #define CSR14_SPP BIT(14) 182 #define CSR14_TAS BIT(15) 183 184 #define CSR15_JBD BIT(0) 185 #define CSR15_HUJ BIT(1) 186 #define CSR15_JCK BIT(2) 187 #define CSR15_ABM BIT(3) 188 #define CSR15_RWD BIT(4) 189 #define CSR15_RWR BIT(5) 190 #define CSR15_LE1 BIT(6) 191 #define CSR15_LV1 BIT(7) 192 #define CSR15_TSCK BIT(8) 193 #define CSR15_FUSQ BIT(9) 194 #define CSR15_FLF BIT(10) 195 #define CSR15_LSD BIT(11) 196 #define CSR15_DPST BIT(12) 197 #define CSR15_FRL BIT(13) 198 #define CSR15_LE2 BIT(14) 199 #define CSR15_LV2 BIT(15) 200 201 #define RDES0_OF BIT(0) 202 #define RDES0_CE BIT(1) 203 #define RDES0_DB BIT(2) 204 #define RDES0_RJ BIT(4) 205 #define RDES0_FT BIT(5) 206 #define RDES0_CS BIT(6) 207 #define RDES0_TL BIT(7) 208 #define RDES0_LS BIT(8) 209 #define RDES0_FS BIT(9) 210 #define RDES0_MF BIT(10) 211 #define RDES0_RF BIT(11) 212 #define RDES0_DT_SHIFT 12 213 #define RDES0_DT_MASK 3 214 #define RDES0_LE BIT(14) 215 #define RDES0_ES BIT(15) 216 #define RDES0_FL_SHIFT 16 217 #define RDES0_FL_MASK 0x3fff 218 #define RDES0_FF BIT(30) 219 #define RDES0_OWN BIT(31) 220 221 #define RDES1_BUF1_SIZE_SHIFT 0 222 #define RDES1_BUF1_SIZE_MASK 0x7ff 223 224 #define RDES1_BUF2_SIZE_SHIFT 11 225 #define RDES1_BUF2_SIZE_MASK 0x7ff 226 #define RDES1_RCH BIT(24) 227 #define RDES1_RER BIT(25) 228 229 #define TDES0_DE BIT(0) 230 #define TDES0_UF BIT(1) 231 #define TDES0_LF BIT(2) 232 #define TDES0_CC_SHIFT 3 233 #define TDES0_CC_MASK 0xf 234 #define TDES0_HF BIT(7) 235 #define TDES0_EC BIT(8) 236 #define TDES0_LC BIT(9) 237 #define TDES0_NC BIT(10) 238 #define TDES0_LO BIT(11) 239 #define TDES0_TO BIT(14) 240 #define TDES0_ES BIT(15) 241 #define TDES0_OWN BIT(31) 242 243 #define TDES1_BUF1_SIZE_SHIFT 0 244 #define TDES1_BUF1_SIZE_MASK 0x7ff 245 246 #define TDES1_BUF2_SIZE_SHIFT 11 247 #define TDES1_BUF2_SIZE_MASK 0x7ff 248 249 #define TDES1_FT0 BIT(22) 250 #define TDES1_DPD BIT(23) 251 #define TDES1_TCH BIT(24) 252 #define TDES1_TER BIT(25) 253 #define TDES1_AC BIT(26) 254 #define TDES1_SET BIT(27) 255 #define TDES1_FT1 BIT(28) 256 #define TDES1_FS BIT(29) 257 #define TDES1_LS BIT(30) 258 #define TDES1_IC BIT(31) 259 260 struct tulip_descriptor { 261 uint32_t status; 262 uint32_t control; 263 uint32_t buf_addr1; 264 uint32_t buf_addr2; 265 }; 266 267 #endif 268