1 /* 2 * QEMU AMD PC-Net II (Am79C970A) emulation 3 * 4 * Copyright (c) 2004 Antony T Curtis 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 /* This software was written to be compatible with the specification: 26 * AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet 27 * AMD Publication# 19436 Rev:E Amendment/0 Issue Date: June 2000 28 */ 29 30 /* 31 * On Sparc32, this is the Lance (Am7990) part of chip STP2000 (Master I/O), also 32 * produced as NCR89C100. See 33 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt 34 * and 35 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR92C990.txt 36 */ 37 38 #include "hw/sysbus.h" 39 #include "net/net.h" 40 #include "qemu/timer.h" 41 #include "qemu/sockets.h" 42 #include "hw/sparc/sun4m.h" 43 #include "pcnet.h" 44 #include "trace.h" 45 #include "sysemu/sysemu.h" 46 47 #define TYPE_LANCE "lance" 48 #define SYSBUS_PCNET(obj) \ 49 OBJECT_CHECK(SysBusPCNetState, (obj), TYPE_LANCE) 50 51 typedef struct { 52 SysBusDevice parent_obj; 53 54 PCNetState state; 55 } SysBusPCNetState; 56 57 static void parent_lance_reset(void *opaque, int irq, int level) 58 { 59 SysBusPCNetState *d = opaque; 60 if (level) 61 pcnet_h_reset(&d->state); 62 } 63 64 static void lance_mem_write(void *opaque, hwaddr addr, 65 uint64_t val, unsigned size) 66 { 67 SysBusPCNetState *d = opaque; 68 69 trace_lance_mem_writew(addr, val & 0xffff); 70 pcnet_ioport_writew(&d->state, addr, val & 0xffff); 71 } 72 73 static uint64_t lance_mem_read(void *opaque, hwaddr addr, 74 unsigned size) 75 { 76 SysBusPCNetState *d = opaque; 77 uint32_t val; 78 79 val = pcnet_ioport_readw(&d->state, addr); 80 trace_lance_mem_readw(addr, val & 0xffff); 81 return val & 0xffff; 82 } 83 84 static const MemoryRegionOps lance_mem_ops = { 85 .read = lance_mem_read, 86 .write = lance_mem_write, 87 .endianness = DEVICE_NATIVE_ENDIAN, 88 .valid = { 89 .min_access_size = 2, 90 .max_access_size = 2, 91 }, 92 }; 93 94 static NetClientInfo net_lance_info = { 95 .type = NET_CLIENT_OPTIONS_KIND_NIC, 96 .size = sizeof(NICState), 97 .receive = pcnet_receive, 98 .link_status_changed = pcnet_set_link_status, 99 }; 100 101 static const VMStateDescription vmstate_lance = { 102 .name = "pcnet", 103 .version_id = 3, 104 .minimum_version_id = 2, 105 .fields = (VMStateField[]) { 106 VMSTATE_STRUCT(state, SysBusPCNetState, 0, vmstate_pcnet, PCNetState), 107 VMSTATE_END_OF_LIST() 108 } 109 }; 110 111 static int lance_init(SysBusDevice *sbd) 112 { 113 DeviceState *dev = DEVICE(sbd); 114 SysBusPCNetState *d = SYSBUS_PCNET(dev); 115 PCNetState *s = &d->state; 116 117 memory_region_init_io(&s->mmio, OBJECT(d), &lance_mem_ops, d, 118 "lance-mmio", 4); 119 120 qdev_init_gpio_in(dev, parent_lance_reset, 1); 121 122 sysbus_init_mmio(sbd, &s->mmio); 123 124 sysbus_init_irq(sbd, &s->irq); 125 126 s->phys_mem_read = ledma_memory_read; 127 s->phys_mem_write = ledma_memory_write; 128 pcnet_common_init(dev, s, &net_lance_info); 129 return 0; 130 } 131 132 static void lance_reset(DeviceState *dev) 133 { 134 SysBusPCNetState *d = SYSBUS_PCNET(dev); 135 136 pcnet_h_reset(&d->state); 137 } 138 139 static void lance_instance_init(Object *obj) 140 { 141 SysBusPCNetState *d = SYSBUS_PCNET(obj); 142 PCNetState *s = &d->state; 143 144 device_add_bootindex_property(obj, &s->conf.bootindex, 145 "bootindex", "/ethernet-phy@0", 146 DEVICE(obj), NULL); 147 } 148 149 static Property lance_properties[] = { 150 DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque), 151 DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf), 152 DEFINE_PROP_END_OF_LIST(), 153 }; 154 155 static void lance_class_init(ObjectClass *klass, void *data) 156 { 157 DeviceClass *dc = DEVICE_CLASS(klass); 158 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); 159 160 k->init = lance_init; 161 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); 162 dc->fw_name = "ethernet"; 163 dc->reset = lance_reset; 164 dc->vmsd = &vmstate_lance; 165 dc->props = lance_properties; 166 /* Reason: pointer property "dma" */ 167 dc->cannot_instantiate_with_device_add_yet = true; 168 } 169 170 static const TypeInfo lance_info = { 171 .name = TYPE_LANCE, 172 .parent = TYPE_SYS_BUS_DEVICE, 173 .instance_size = sizeof(SysBusPCNetState), 174 .class_init = lance_class_init, 175 .instance_init = lance_instance_init, 176 }; 177 178 static void lance_register_types(void) 179 { 180 type_register_static(&lance_info); 181 } 182 183 type_init(lance_register_types) 184