xref: /openbmc/qemu/hw/net/lance.c (revision 2e1cacfb)
1 /*
2  * QEMU AMD PC-Net II (Am79C970A) emulation
3  *
4  * Copyright (c) 2004 Antony T Curtis
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 /* This software was written to be compatible with the specification:
26  * AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet
27  * AMD Publication# 19436  Rev:E  Amendment/0  Issue Date: June 2000
28  */
29 
30 /*
31  * On Sparc32, this is the Lance (Am7990) part of chip STP2000 (Master I/O), also
32  * produced as NCR89C100. See
33  * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt
34  * and
35  * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR92C990.txt
36  */
37 
38 #include "qemu/osdep.h"
39 #include "qemu/module.h"
40 #include "qemu/timer.h"
41 #include "hw/sparc/sparc32_dma.h"
42 #include "migration/vmstate.h"
43 #include "hw/net/lance.h"
44 #include "hw/qdev-properties.h"
45 #include "trace.h"
46 #include "sysemu/sysemu.h"
47 
48 
49 static void parent_lance_reset(void *opaque, int irq, int level)
50 {
51     SysBusPCNetState *d = opaque;
52     if (level)
53         pcnet_h_reset(&d->state);
54 }
55 
56 static void lance_mem_write(void *opaque, hwaddr addr,
57                             uint64_t val, unsigned size)
58 {
59     SysBusPCNetState *d = opaque;
60 
61     trace_lance_mem_writew(addr, val & 0xffff);
62     pcnet_ioport_writew(&d->state, addr, val & 0xffff);
63 }
64 
65 static uint64_t lance_mem_read(void *opaque, hwaddr addr,
66                                unsigned size)
67 {
68     SysBusPCNetState *d = opaque;
69     uint32_t val;
70 
71     val = pcnet_ioport_readw(&d->state, addr);
72     trace_lance_mem_readw(addr, val & 0xffff);
73     return val & 0xffff;
74 }
75 
76 static const MemoryRegionOps lance_mem_ops = {
77     .read = lance_mem_read,
78     .write = lance_mem_write,
79     .endianness = DEVICE_NATIVE_ENDIAN,
80     .valid = {
81         .min_access_size = 2,
82         .max_access_size = 2,
83     },
84 };
85 
86 static NetClientInfo net_lance_info = {
87     .type = NET_CLIENT_DRIVER_NIC,
88     .size = sizeof(NICState),
89     .receive = pcnet_receive,
90     .link_status_changed = pcnet_set_link_status,
91 };
92 
93 static const VMStateDescription vmstate_lance = {
94     .name = "pcnet",
95     .version_id = 3,
96     .minimum_version_id = 2,
97     .fields = (const VMStateField[]) {
98         VMSTATE_STRUCT(state, SysBusPCNetState, 0, vmstate_pcnet, PCNetState),
99         VMSTATE_END_OF_LIST()
100     }
101 };
102 
103 static void lance_realize(DeviceState *dev, Error **errp)
104 {
105     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
106     SysBusPCNetState *d = SYSBUS_PCNET(dev);
107     PCNetState *s = &d->state;
108 
109     memory_region_init_io(&s->mmio, OBJECT(d), &lance_mem_ops, d,
110                           "lance-mmio", 4);
111 
112     qdev_init_gpio_in(dev, parent_lance_reset, 1);
113 
114     sysbus_init_mmio(sbd, &s->mmio);
115 
116     sysbus_init_irq(sbd, &s->irq);
117 
118     s->phys_mem_read = ledma_memory_read;
119     s->phys_mem_write = ledma_memory_write;
120     pcnet_common_init(dev, s, &net_lance_info);
121 }
122 
123 static void lance_reset(DeviceState *dev)
124 {
125     SysBusPCNetState *d = SYSBUS_PCNET(dev);
126 
127     pcnet_h_reset(&d->state);
128 }
129 
130 static void lance_instance_init(Object *obj)
131 {
132     SysBusPCNetState *d = SYSBUS_PCNET(obj);
133     PCNetState *s = &d->state;
134 
135     device_add_bootindex_property(obj, &s->conf.bootindex,
136                                   "bootindex", "/ethernet-phy@0",
137                                   DEVICE(obj));
138 }
139 
140 static Property lance_properties[] = {
141     DEFINE_PROP_LINK("dma", SysBusPCNetState, state.dma_opaque,
142                      TYPE_DEVICE, DeviceState *),
143     DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf),
144     DEFINE_PROP_END_OF_LIST(),
145 };
146 
147 static void lance_class_init(ObjectClass *klass, void *data)
148 {
149     DeviceClass *dc = DEVICE_CLASS(klass);
150 
151     dc->realize = lance_realize;
152     set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
153     dc->fw_name = "ethernet";
154     device_class_set_legacy_reset(dc, lance_reset);
155     dc->vmsd = &vmstate_lance;
156     device_class_set_props(dc, lance_properties);
157 }
158 
159 static const TypeInfo lance_info = {
160     .name          = TYPE_LANCE,
161     .parent        = TYPE_SYS_BUS_DEVICE,
162     .instance_size = sizeof(SysBusPCNetState),
163     .class_init    = lance_class_init,
164     .instance_init = lance_instance_init,
165 };
166 
167 static void lance_register_types(void)
168 {
169     type_register_static(&lance_info);
170 }
171 
172 type_init(lance_register_types)
173