1376b8519SHelge Deller #ifndef HW_I82596_H 2376b8519SHelge Deller #define HW_I82596_H 3376b8519SHelge Deller 4376b8519SHelge Deller #define I82596_IOPORT_SIZE 0x20 5376b8519SHelge Deller 6376b8519SHelge Deller #include "exec/memory.h" 7376b8519SHelge Deller #include "exec/address-spaces.h" 8376b8519SHelge Deller 9376b8519SHelge Deller #define PORT_RESET 0x00 /* reset 82596 */ 10376b8519SHelge Deller #define PORT_SELFTEST 0x01 /* selftest */ 11376b8519SHelge Deller #define PORT_ALTSCP 0x02 /* alternate SCB address */ 12376b8519SHelge Deller #define PORT_ALTDUMP 0x03 /* Alternate DUMP address */ 13376b8519SHelge Deller #define PORT_CA 0x10 /* QEMU-internal CA signal */ 14376b8519SHelge Deller 15376b8519SHelge Deller typedef struct I82596State_st I82596State; 16376b8519SHelge Deller 17376b8519SHelge Deller struct I82596State_st { 18376b8519SHelge Deller MemoryRegion mmio; 19376b8519SHelge Deller MemoryRegion *as; 20376b8519SHelge Deller qemu_irq irq; 21376b8519SHelge Deller NICState *nic; 22376b8519SHelge Deller NICConf conf; 23376b8519SHelge Deller QEMUTimer *flush_queue_timer; 24376b8519SHelge Deller 25376b8519SHelge Deller hwaddr scp; /* pointer to SCP */ 26376b8519SHelge Deller uint8_t sysbus; 27376b8519SHelge Deller uint32_t scb; /* SCB */ 28376b8519SHelge Deller uint16_t scb_status; 29376b8519SHelge Deller uint8_t cu_status, rx_status; 30376b8519SHelge Deller uint16_t lnkst; 31376b8519SHelge Deller 32376b8519SHelge Deller uint32_t cmd_p; /* addr of current command */ 33376b8519SHelge Deller int ca; 34376b8519SHelge Deller int ca_active; 35376b8519SHelge Deller int send_irq; 36376b8519SHelge Deller 37376b8519SHelge Deller /* Hash register (multicast mask array, multiple individual addresses). */ 38376b8519SHelge Deller uint8_t mult[8]; 39376b8519SHelge Deller uint8_t config[14]; /* config bytes from CONFIGURE command */ 40376b8519SHelge Deller 41376b8519SHelge Deller uint8_t tx_buffer[0x4000]; 42376b8519SHelge Deller }; 43376b8519SHelge Deller 44376b8519SHelge Deller void i82596_h_reset(void *opaque); 45376b8519SHelge Deller void i82596_ioport_writew(void *opaque, uint32_t addr, uint32_t val); 46376b8519SHelge Deller uint32_t i82596_ioport_readw(void *opaque, uint32_t addr); 47376b8519SHelge Deller void i82596_ioport_writel(void *opaque, uint32_t addr, uint32_t val); 48376b8519SHelge Deller uint32_t i82596_ioport_readl(void *opaque, uint32_t addr); 49376b8519SHelge Deller uint32_t i82596_bcr_readw(I82596State *s, uint32_t rap); 50376b8519SHelge Deller ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t size_); 51*b8c4b67eSPhilippe Mathieu-Daudé bool i82596_can_receive(NetClientState *nc); 52376b8519SHelge Deller void i82596_set_link_status(NetClientState *nc); 53376b8519SHelge Deller void i82596_common_init(DeviceState *dev, I82596State *s, NetClientInfo *info); 54376b8519SHelge Deller extern const VMStateDescription vmstate_i82596; 55376b8519SHelge Deller #endif 56