xref: /openbmc/qemu/hw/misc/trace-events (revision 5e437d3c)
1# See docs/devel/tracing.txt for syntax documentation.
2
3# allwinner-cpucfg.c
4allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32
5allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
6allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
7
8# allwinner-h3-dramc.c
9allwinner_h3_dramc_rowmirror_disable(void) "Disable row mirror"
10allwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64
11allwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
12allwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
13allwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
14allwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
15allwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
16allwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
17
18# allwinner-sid.c
19allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
20allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
21
22# avr_power.c
23avr_power_read(uint8_t value) "power_reduc read value:%u"
24avr_power_write(uint8_t value) "power_reduc write value:%u"
25
26# eccmemctl.c
27ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
28ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
29ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x"
30ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x"
31ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x"
32ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x"
33ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
34ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x"
35ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
36ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x"
37ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x"
38ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x"
39ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x"
40ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x"
41ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x"
42ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
43ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
44ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
45
46# empty_slot.c
47empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "wr addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]"
48
49# slavio_misc.c
50slavio_misc_update_irq_raise(void) "Raise IRQ"
51slavio_misc_update_irq_lower(void) "Lower IRQ"
52slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
53slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
54slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
55slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
56slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
57slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
58slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
59slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
60slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
61slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x"
62slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x"
63apc_mem_writeb(uint32_t val) "Write power management 0x%02x"
64apc_mem_readb(uint32_t ret) "Read power management 0x%02x"
65slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x"
66slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x"
67slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
68slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
69
70# milkymist-hpdmc.c
71milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
72milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
73
74# milkymist-pfpu.c
75milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
76milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
77milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x"
78milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
79
80# aspeed_scu.c
81aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
82
83# mps2-scc.c
84mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
85mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
86mps2_scc_reset(void) "MPS2 SCC: reset"
87mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
88mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
89
90# mps2-fpgaio.c
91mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
92mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
93mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
94
95# msf2-sysreg.c
96msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
97msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
98msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
99
100# imx7_gpr.c
101imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64
102imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
103
104# mos6522.c
105mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
106mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
107mos6522_set_sr_int(void) "set sr_int"
108mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
109mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
110
111# npcm7xx_clk.c
112npcm7xx_clk_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
113npcm7xx_clk_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
114
115# npcm7xx_gcr.c
116npcm7xx_gcr_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
117npcm7xx_gcr_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
118
119# npcm7xx_mft.c
120npcm7xx_mft_read(const char *name, uint64_t offset, uint16_t value) "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx16
121npcm7xx_mft_write(const char *name, uint64_t offset, uint16_t value) "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx16
122npcm7xx_mft_rpm(const char *clock, uint32_t clock_hz, int state, int32_t cnt, uint32_t rpm, uint32_t duty) " fan clk: %s clock_hz: %" PRIu32 ", state: %d, cnt: %" PRIi32 ", rpm: %" PRIu32 ", duty: %" PRIu32
123npcm7xx_mft_capture(const char *name, int irq_level) "%s: level: %d"
124npcm7xx_mft_update_clock(const char *name, uint16_t sel, uint64_t clock_period, uint64_t prescaled_clock_period) "%s: sel: 0x%02" PRIx16 ", period: %" PRIu64 ", prescaled: %" PRIu64
125npcm7xx_mft_set_duty(const char *name, int n, int value) "%s[%d]: %d"
126
127# npcm7xx_rng.c
128npcm7xx_rng_read(uint64_t offset, uint64_t value, unsigned size) "offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u"
129npcm7xx_rng_write(uint64_t offset, uint64_t value, unsigned size) "offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u"
130
131# npcm7xx_pwm.c
132npcm7xx_pwm_read(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
133npcm7xx_pwm_write(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
134npcm7xx_pwm_update_freq(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) "%s pwm[%u] Update Freq: old_freq: %u, new_freq: %u"
135npcm7xx_pwm_update_duty(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) "%s pwm[%u] Update Duty: old_duty: %u, new_duty: %u"
136
137# stm32f4xx_syscfg.c
138stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interrupt: GPIO: %d, Line: %d; Level: %d"
139stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d"
140stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
141stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
142
143# stm32f4xx_exti.c
144stm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d"
145stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
146stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
147
148# tz-mpc.c
149tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u"
150tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u"
151tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d"
152tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
153tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s"
154tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64
155
156# tz-msc.c
157tz_msc_reset(void) "TZ MSC: reset"
158tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d"
159tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d"
160tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d"
161tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d"
162tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked"
163
164# tz-ppc.c
165tz_ppc_reset(void) "TZ PPC: reset"
166tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d"
167tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d"
168tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d"
169tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d"
170tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d"
171tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d"
172tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked"
173tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked"
174
175# iotkit-secctl.c
176iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u"
177iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u"
178iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u"
179iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u"
180
181# imx6ul_ccm.c
182ccm_entry(void) ""
183ccm_freq(uint32_t freq) "freq = %d"
184ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d"
185ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
186ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
187
188# iotkit-sysinfo.c
189iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
190iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
191
192# iotkit-sysctl.c
193iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
194iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
195iotkit_sysctl_reset(void) "IoTKit SysCtl: reset"
196
197# armsse-cpu-pwrctrl.c
198armsse_cpu_pwrctrl_read(uint64_t offset, uint64_t data, unsigned size) "SSE-300 CPU_PWRCTRL read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
199armsse_cpu_pwrctrl_write(uint64_t offset, uint64_t data, unsigned size) "SSE-300 CPU_PWRCTRL write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
200
201# armsse-cpuid.c
202armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
203armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
204
205# armsse-mhu.c
206armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
207armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
208
209# aspeed_xdma.c
210aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
211
212# bcm2835_property.c
213bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
214
215# bcm2835_mbox.c
216bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
217bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
218bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
219
220# mac_via.c
221via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x"
222via1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x"
223via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x"
224via1_rtc_internal_cmd(int cmd) "cmd=0x%02x"
225via1_rtc_cmd_invalid(int value) "value=0x%02x"
226via1_rtc_internal_time(uint32_t time) "time=0x%08x"
227via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x"
228via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x"
229via1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u"
230via1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x"
231via1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x"
232via1_rtc_cmd_test_write(int value) "value=0x%02x"
233via1_rtc_cmd_wprotect_write(int value) "value=0x%02x"
234via1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x"
235via1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x"
236via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=0x%x value=0x%02x"
237via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=0x%x value=0x%02x"
238via1_adb_send(const char *state, uint8_t data, const char *vadbint) "state %s data=0x%02x vADBInt=%s"
239via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) "state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
240via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) "data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
241
242# grlib_ahb_apb_pnp.c
243grlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" data:0x%08x"
244grlib_apb_pnp_read(uint64_t addr, uint32_t value) "APB PnP read addr:0x%03"PRIx64" data:0x%08x"
245
246# led.c
247led_set_intensity(const char *color, const char *desc, uint8_t intensity_percent) "LED desc:'%s' color:%s intensity: %u%%"
248led_change_intensity(const char *color, const char *desc, uint8_t old_intensity_percent, uint8_t new_intensity_percent) "LED desc:'%s' color:%s intensity %u%% -> %u%%"
249
250# pca9552.c
251pca955x_gpio_status(const char *description, const char *buf) "%s GPIOs 0-15 [%s]"
252pca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) "%s GPIO id:%u status: %u -> %u"
253
254# bcm2835_cprman.c
255bcm2835_cprman_read(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
256bcm2835_cprman_write(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
257bcm2835_cprman_write_invalid_magic(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
258
259# virt_ctrl.c
260virt_ctrl_read(void *dev, unsigned int addr, unsigned int size, uint64_t value) "ctrl: %p reg: 0x%02x size: %d value: 0x%"PRIx64
261virt_ctrl_write(void *dev, unsigned int addr, unsigned int size, uint64_t value) "ctrl: %p reg: 0x%02x size: %d value: 0x%"PRIx64
262virt_ctrl_reset(void *dev) "ctrl: %p"
263virt_ctrl_realize(void *dev) "ctrl: %p"
264virt_ctrl_instance_init(void *dev) "ctrl: %p"
265