xref: /openbmc/qemu/hw/misc/trace-events (revision 354908ce)
1# See docs/devel/tracing.txt for syntax documentation.
2
3# allwinner-cpucfg.c
4allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32
5allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
6allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
7
8# allwinner-h3-dramc.c
9allwinner_h3_dramc_rowmirror_disable(void) "Disable row mirror"
10allwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64
11allwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
12allwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
13allwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
14allwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
15allwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
16allwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
17
18# allwinner-sid.c
19allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
20allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
21
22# eccmemctl.c
23ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
24ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
25ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x"
26ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x"
27ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x"
28ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x"
29ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
30ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x"
31ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
32ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x"
33ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x"
34ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x"
35ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x"
36ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x"
37ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x"
38ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
39ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
40ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
41
42# empty_slot.c
43empty_slot_read(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "rd addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]"
44empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "wr addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]"
45
46# slavio_misc.c
47slavio_misc_update_irq_raise(void) "Raise IRQ"
48slavio_misc_update_irq_lower(void) "Lower IRQ"
49slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
50slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
51slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
52slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
53slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
54slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
55slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
56slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
57slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
58slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x"
59slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x"
60apc_mem_writeb(uint32_t val) "Write power management 0x%02x"
61apc_mem_readb(uint32_t ret) "Read power management 0x%02x"
62slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x"
63slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x"
64slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
65slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
66
67# milkymist-hpdmc.c
68milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
69milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
70
71# milkymist-pfpu.c
72milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
73milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
74milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x"
75milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
76
77# aspeed_scu.c
78aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
79
80# mps2-scc.c
81mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
82mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
83mps2_scc_reset(void) "MPS2 SCC: reset"
84mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c"
85mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
86mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
87
88# mps2-fpgaio.c
89mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
90mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
91mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
92mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c"
93
94# msf2-sysreg.c
95msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
96msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
97msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
98
99# imx7_gpr.c
100imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64
101imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
102
103# mos6522.c
104mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
105mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
106mos6522_set_sr_int(void) "set sr_int"
107mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
108mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
109
110# stm32f4xx_syscfg
111stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interupt: GPIO: %d, Line: %d; Level: %d"
112stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d"
113stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
114stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
115
116# stm32f4xx_exti
117stm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d"
118stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
119stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
120
121# tz-mpc.c
122tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u"
123tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u"
124tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d"
125tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
126tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s"
127tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64
128
129# tz-msc.c
130tz_msc_reset(void) "TZ MSC: reset"
131tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d"
132tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d"
133tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d"
134tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d"
135tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked"
136
137# tz-ppc.c
138tz_ppc_reset(void) "TZ PPC: reset"
139tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d"
140tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d"
141tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d"
142tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d"
143tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d"
144tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d"
145tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked"
146tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked"
147
148# iotkit-secctl.c
149iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u"
150iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u"
151iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u"
152iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u"
153
154# imx6ul_ccm.c
155ccm_entry(void) ""
156ccm_freq(uint32_t freq) "freq = %d"
157ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d"
158ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
159ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
160
161# iotkit-sysinfo.c
162iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
163iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
164
165# iotkit-sysctl.c
166iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
167iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
168iotkit_sysctl_reset(void) "IoTKit SysCtl: reset"
169
170# armsse-cpuid.c
171armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
172armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
173
174# armsse-mhu.c
175armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
176armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
177
178# aspeed_xdma.c
179aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
180
181# bcm2835_mbox.c
182bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
183bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
184bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
185bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
186
187# mac_via.c
188via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x"
189via1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x"
190via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x"
191via1_rtc_internal_cmd(int cmd) "cmd=0x%02x"
192via1_rtc_cmd_invalid(int value) "value=0x%02x"
193via1_rtc_internal_time(uint32_t time) "time=0x%08x"
194via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x"
195via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x"
196via1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u"
197via1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x"
198via1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x"
199via1_rtc_cmd_test_write(int value) "value=0x%02x"
200via1_rtc_cmd_wprotect_write(int value) "value=0x%02x"
201via1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x"
202via1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x"
203via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
204via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
205
206# grlib_ahb_apb_pnp.c
207grlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" data:0x%08x"
208grlib_apb_pnp_read(uint64_t addr, uint32_t value) "APB PnP read addr:0x%03"PRIx64" data:0x%08x"
209