xref: /openbmc/qemu/hw/misc/trace-events (revision 0c4a94b8)
1# See docs/devel/tracing.txt for syntax documentation.
2
3# hw/misc/eccmemctl.c
4ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
5ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
6ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x"
7ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x"
8ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x"
9ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x"
10ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
11ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x"
12ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
13ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x"
14ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x"
15ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x"
16ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x"
17ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x"
18ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x"
19ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
20ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
21ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
22
23# hw/misc/slavio_misc.c
24slavio_misc_update_irq_raise(void) "Raise IRQ"
25slavio_misc_update_irq_lower(void) "Lower IRQ"
26slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
27slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
28slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
29slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
30slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
31slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
32slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
33slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
34slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
35slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x"
36slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x"
37apc_mem_writeb(uint32_t val) "Write power management 0x%02x"
38apc_mem_readb(uint32_t ret) "Read power management 0x%02x"
39slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x"
40slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x"
41slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
42slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
43
44# hw/misc/milkymist-hpdmc.c
45milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
46milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
47
48# hw/misc/milkymist-pfpu.c
49milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
50milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
51milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x"
52milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
53
54# hw/misc/aspeed_scu.c
55aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
56
57# hw/misc/mps2_scc.c
58mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
59mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
60mps2_scc_reset(void) "MPS2 SCC: reset"
61mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c"
62mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
63mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
64
65# hw/misc/msf2-sysreg.c
66msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" HWADDR_PRIx " data 0x%" PRIx32 " prev 0x%" PRIx32
67msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" HWADDR_PRIx " data 0x%08" PRIx32
68msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
69
70#hw/misc/imx7_gpr.c
71imx7_gpr_read(uint64_t offset) "addr 0x%08" HWADDR_PRIx
72imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" HWADDR_PRIx "value 0x%08" HWADDR_PRIx
73
74# hw/misc/mos6522.c
75mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
76mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
77mos6522_set_sr_int(void) "set sr_int"
78mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
79mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
80