xref: /openbmc/qemu/hw/misc/trace-events (revision d82ab293) 
187e0331cSPhilippe Mathieu-Daudé# See docs/devel/tracing.txt for syntax documentation.
26b5bacf6SDaniel P. Berrange
3d26af5deSNiek Linnenbank# allwinner-cpucfg.c
4d26af5deSNiek Linnenbankallwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32
5d26af5deSNiek Linnenbankallwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
6d26af5deSNiek Linnenbankallwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
7d26af5deSNiek Linnenbank
8b71d0385SNiek Linnenbank# allwinner-h3-dramc.c
9b71d0385SNiek Linnenbankallwinner_h3_dramc_rowmirror_disable(void) "Disable row mirror"
10b71d0385SNiek Linnenbankallwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64
11b71d0385SNiek Linnenbankallwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
12b71d0385SNiek Linnenbankallwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
13b71d0385SNiek Linnenbankallwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
14b71d0385SNiek Linnenbankallwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
15b71d0385SNiek Linnenbankallwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
16b71d0385SNiek Linnenbankallwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
17b71d0385SNiek Linnenbank
186556617cSNiek Linnenbank# allwinner-sid.c
196556617cSNiek Linnenbankallwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
206556617cSNiek Linnenbankallwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
216556617cSNiek Linnenbank
22500016e5SMarkus Armbruster# eccmemctl.c
238908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
248908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
258908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x"
268908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x"
278908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x"
288908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x"
298908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
308908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x"
318908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
328908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x"
338908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x"
348908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x"
358908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x"
368908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x"
378908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x"
388908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
398908eb1aSVladimir Sementsov-Ogievskiyecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
408908eb1aSVladimir Sementsov-Ogievskiyecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
416b5bacf6SDaniel P. Berrange
426007523aSPhilippe Mathieu-Daudé# empty_slot.c
436007523aSPhilippe Mathieu-Daudéempty_slot_read(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "rd addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]"
446007523aSPhilippe Mathieu-Daudéempty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "wr addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]"
456007523aSPhilippe Mathieu-Daudé
46500016e5SMarkus Armbruster# slavio_misc.c
476b5bacf6SDaniel P. Berrangeslavio_misc_update_irq_raise(void) "Raise IRQ"
486b5bacf6SDaniel P. Berrangeslavio_misc_update_irq_lower(void) "Lower IRQ"
496b5bacf6SDaniel P. Berrangeslavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
508908eb1aSVladimir Sementsov-Ogievskiyslavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
518908eb1aSVladimir Sementsov-Ogievskiyslavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
528908eb1aSVladimir Sementsov-Ogievskiyslavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
538908eb1aSVladimir Sementsov-Ogievskiyslavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
548908eb1aSVladimir Sementsov-Ogievskiyslavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
558908eb1aSVladimir Sementsov-Ogievskiyslavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
568908eb1aSVladimir Sementsov-Ogievskiyslavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
578908eb1aSVladimir Sementsov-Ogievskiyslavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
588908eb1aSVladimir Sementsov-Ogievskiyslavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x"
598908eb1aSVladimir Sementsov-Ogievskiyslavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x"
608908eb1aSVladimir Sementsov-Ogievskiyapc_mem_writeb(uint32_t val) "Write power management 0x%02x"
618908eb1aSVladimir Sementsov-Ogievskiyapc_mem_readb(uint32_t ret) "Read power management 0x%02x"
628908eb1aSVladimir Sementsov-Ogievskiyslavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x"
638908eb1aSVladimir Sementsov-Ogievskiyslavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x"
648908eb1aSVladimir Sementsov-Ogievskiyslavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
658908eb1aSVladimir Sementsov-Ogievskiyslavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
666b5bacf6SDaniel P. Berrange
67500016e5SMarkus Armbruster# milkymist-hpdmc.c
688908eb1aSVladimir Sementsov-Ogievskiymilkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
698908eb1aSVladimir Sementsov-Ogievskiymilkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
706b5bacf6SDaniel P. Berrange
71500016e5SMarkus Armbruster# milkymist-pfpu.c
728908eb1aSVladimir Sementsov-Ogievskiymilkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
738908eb1aSVladimir Sementsov-Ogievskiymilkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
748908eb1aSVladimir Sementsov-Ogievskiymilkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x"
756b5bacf6SDaniel P. Berrangemilkymist_pfpu_pulse_irq(void) "Pulse IRQ"
761c8a2388SAndrew Jeffery
77500016e5SMarkus Armbruster# aspeed_scu.c
781c8a2388SAndrew Jefferyaspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
79dd73185bSPeter Maydell
80dec97760SMarkus Armbruster# mps2-scc.c
81dd73185bSPeter Maydellmps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
82dd73185bSPeter Maydellmps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
83dd73185bSPeter Maydellmps2_scc_reset(void) "MPS2 SCC: reset"
84dd73185bSPeter Maydellmps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c"
85dd73185bSPeter Maydellmps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
86dd73185bSPeter Maydellmps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
870ee1e1f4SSubbaraya Sundeep
88dec97760SMarkus Armbruster# mps2-fpgaio.c
899a52d999SPeter Maydellmps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
909a52d999SPeter Maydellmps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
919a52d999SPeter Maydellmps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
929a52d999SPeter Maydellmps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c"
939a52d999SPeter Maydell
94500016e5SMarkus Armbruster# msf2-sysreg.c
95787bbc30SDaniel P. Berrangémsf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
96787bbc30SDaniel P. Berrangémsf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
970ee1e1f4SSubbaraya Sundeepmsf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
9830b2f870SAndrey Smirnov
99500016e5SMarkus Armbruster# imx7_gpr.c
100787bbc30SDaniel P. Berrangéimx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64
101787bbc30SDaniel P. Berrangéimx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
10251f233ecSMark Cave-Ayland
103500016e5SMarkus Armbruster# mos6522.c
10451f233ecSMark Cave-Aylandmos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
10551f233ecSMark Cave-Aylandmos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
10651f233ecSMark Cave-Aylandmos6522_set_sr_int(void) "set sr_int"
10751f233ecSMark Cave-Aylandmos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
10851f233ecSMark Cave-Aylandmos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
1099eb8040cSPeter Maydell
110870c034dSAlistair Francis# stm32f4xx_syscfg
111870c034dSAlistair Francisstm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interupt: GPIO: %d, Line: %d; Level: %d"
112870c034dSAlistair Francisstm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d"
113870c034dSAlistair Francisstm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
114870c034dSAlistair Francisstm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
115870c034dSAlistair Francis
116e64d8c83SAlistair Francis# stm32f4xx_exti
117e64d8c83SAlistair Francisstm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d"
118e64d8c83SAlistair Francisstm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
119e64d8c83SAlistair Francisstm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
120e64d8c83SAlistair Francis
121500016e5SMarkus Armbruster# tz-mpc.c
122344f4b15SPeter Maydelltz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u"
123344f4b15SPeter Maydelltz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u"
124344f4b15SPeter Maydelltz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d"
125344f4b15SPeter Maydelltz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
126344f4b15SPeter Maydelltz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s"
127dd29d068SPeter Maydelltz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64
128344f4b15SPeter Maydell
129500016e5SMarkus Armbruster# tz-msc.c
130211e701dSPeter Maydelltz_msc_reset(void) "TZ MSC: reset"
131211e701dSPeter Maydelltz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d"
132211e701dSPeter Maydelltz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d"
133211e701dSPeter Maydelltz_msc_irq_clear(int level) "TZ MSC: int_clear = %d"
134211e701dSPeter Maydelltz_msc_update_irq(int level) "TZ MSC: setting irq line to %d"
135211e701dSPeter Maydelltz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked"
136211e701dSPeter Maydell
137500016e5SMarkus Armbruster# tz-ppc.c
1389eb8040cSPeter Maydelltz_ppc_reset(void) "TZ PPC: reset"
1399eb8040cSPeter Maydelltz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d"
1409eb8040cSPeter Maydelltz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d"
1419eb8040cSPeter Maydelltz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d"
1429eb8040cSPeter Maydelltz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d"
1439eb8040cSPeter Maydelltz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d"
1449eb8040cSPeter Maydelltz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d"
145f32408f3SDaniel P. Berrangétz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked"
146f32408f3SDaniel P. Berrangétz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked"
147de343bb6SPeter Maydell
148500016e5SMarkus Armbruster# iotkit-secctl.c
149de343bb6SPeter Maydelliotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u"
150de343bb6SPeter Maydelliotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u"
151de343bb6SPeter Maydelliotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u"
152de343bb6SPeter Maydelliotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u"
153781182e1SJean-Christophe Dubois
154500016e5SMarkus Armbruster# imx6ul_ccm.c
155794dcb54SPhilippe Mathieu-Daudéccm_entry(void) ""
156794dcb54SPhilippe Mathieu-Daudéccm_freq(uint32_t freq) "freq = %d"
157794dcb54SPhilippe Mathieu-Daudéccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d"
158794dcb54SPhilippe Mathieu-Daudéccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
159794dcb54SPhilippe Mathieu-Daudéccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
16075750e4dSPeter Maydell
161dec97760SMarkus Armbruster# iotkit-sysinfo.c
16275750e4dSPeter Maydelliotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
16375750e4dSPeter Maydelliotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
164dec97760SMarkus Armbruster
165dec97760SMarkus Armbruster# iotkit-sysctl.c
16675750e4dSPeter Maydelliotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
16775750e4dSPeter Maydelliotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
16875750e4dSPeter Maydelliotkit_sysctl_reset(void) "IoTKit SysCtl: reset"
1695aeb3689SPeter Maydell
170500016e5SMarkus Armbruster# armsse-cpuid.c
1715aeb3689SPeter Maydellarmsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
1725aeb3689SPeter Maydellarmsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
173cdf63440SPeter Maydell
174500016e5SMarkus Armbruster# armsse-mhu.c
175cdf63440SPeter Maydellarmsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
176cdf63440SPeter Maydellarmsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
177118c82e7SEddie James
178118c82e7SEddie James# aspeed_xdma.c
179118c82e7SEddie Jamesaspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
18019845504SPhilippe Mathieu-Daudé
18119845504SPhilippe Mathieu-Daudé# bcm2835_mbox.c
18219845504SPhilippe Mathieu-Daudébcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
18319845504SPhilippe Mathieu-Daudébcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
18419845504SPhilippe Mathieu-Daudébcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
18519845504SPhilippe Mathieu-Daudébcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
186b2619c15SLaurent Vivier
187b2619c15SLaurent Vivier# mac_via.c
188b2619c15SLaurent Viviervia1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x"
189b2619c15SLaurent Viviervia1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x"
190b2619c15SLaurent Viviervia1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x"
191b2619c15SLaurent Viviervia1_rtc_internal_cmd(int cmd) "cmd=0x%02x"
192b2619c15SLaurent Viviervia1_rtc_cmd_invalid(int value) "value=0x%02x"
193b2619c15SLaurent Viviervia1_rtc_internal_time(uint32_t time) "time=0x%08x"
194b2619c15SLaurent Viviervia1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x"
195b2619c15SLaurent Viviervia1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x"
196b2619c15SLaurent Viviervia1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u"
197b2619c15SLaurent Viviervia1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x"
198b2619c15SLaurent Viviervia1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x"
199b2619c15SLaurent Viviervia1_rtc_cmd_test_write(int value) "value=0x%02x"
200b2619c15SLaurent Viviervia1_rtc_cmd_wprotect_write(int value) "value=0x%02x"
201b2619c15SLaurent Viviervia1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x"
202b2619c15SLaurent Viviervia1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x"
203b2619c15SLaurent Viviervia1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
204b2619c15SLaurent Viviervia1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
205975fceddSMark Cave-Aylandvia1_adb_send(const char *state, uint8_t data, const char *vadbint) "state %s data=0x%02x vADBInt=%s"
206975fceddSMark Cave-Aylandvia1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) "state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
207975fceddSMark Cave-Aylandvia1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) "data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
208d15188ddSPhilippe Mathieu-Daudé
209d15188ddSPhilippe Mathieu-Daudé# grlib_ahb_apb_pnp.c
210d15188ddSPhilippe Mathieu-Daudégrlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" data:0x%08x"
211d15188ddSPhilippe Mathieu-Daudégrlib_apb_pnp_read(uint64_t addr, uint32_t value) "APB PnP read addr:0x%03"PRIx64" data:0x%08x"
212b989b89fSPhilippe Mathieu-Daudé
213b989b89fSPhilippe Mathieu-Daudé# pca9552.c
214b989b89fSPhilippe Mathieu-Daudépca955x_gpio_status(const char *description, const char *buf) "%s GPIOs 0-15 [%s]"
215*d82ab293SPhilippe Mathieu-Daudépca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) "%s GPIO id:%u status: %u -> %u"
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