187e0331cSPhilippe Mathieu-Daudé# See docs/devel/tracing.txt for syntax documentation. 26b5bacf6SDaniel P. Berrange 36b5bacf6SDaniel P. Berrange# hw/misc/eccmemctl.c 48908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x" 58908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x" 68908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x" 78908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x" 88908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x" 98908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x" 108908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x" 118908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x" 128908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x" 138908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x" 148908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x" 158908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x" 168908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x" 178908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x" 188908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x" 198908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x" 208908eb1aSVladimir Sementsov-Ogievskiyecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x" 218908eb1aSVladimir Sementsov-Ogievskiyecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x" 226b5bacf6SDaniel P. Berrange 236b5bacf6SDaniel P. Berrange# hw/misc/slavio_misc.c 246b5bacf6SDaniel P. Berrangeslavio_misc_update_irq_raise(void) "Raise IRQ" 256b5bacf6SDaniel P. Berrangeslavio_misc_update_irq_lower(void) "Lower IRQ" 266b5bacf6SDaniel P. Berrangeslavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" 278908eb1aSVladimir Sementsov-Ogievskiyslavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x" 288908eb1aSVladimir Sementsov-Ogievskiyslavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x" 298908eb1aSVladimir Sementsov-Ogievskiyslavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x" 308908eb1aSVladimir Sementsov-Ogievskiyslavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x" 318908eb1aSVladimir Sementsov-Ogievskiyslavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x" 328908eb1aSVladimir Sementsov-Ogievskiyslavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x" 338908eb1aSVladimir Sementsov-Ogievskiyslavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x" 348908eb1aSVladimir Sementsov-Ogievskiyslavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x" 358908eb1aSVladimir Sementsov-Ogievskiyslavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x" 368908eb1aSVladimir Sementsov-Ogievskiyslavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x" 378908eb1aSVladimir Sementsov-Ogievskiyapc_mem_writeb(uint32_t val) "Write power management 0x%02x" 388908eb1aSVladimir Sementsov-Ogievskiyapc_mem_readb(uint32_t ret) "Read power management 0x%02x" 398908eb1aSVladimir Sementsov-Ogievskiyslavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x" 408908eb1aSVladimir Sementsov-Ogievskiyslavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x" 418908eb1aSVladimir Sementsov-Ogievskiyslavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x" 428908eb1aSVladimir Sementsov-Ogievskiyslavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x" 436b5bacf6SDaniel P. Berrange 446b5bacf6SDaniel P. Berrange# hw/misc/milkymist-hpdmc.c 458908eb1aSVladimir Sementsov-Ogievskiymilkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" 468908eb1aSVladimir Sementsov-Ogievskiymilkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" 476b5bacf6SDaniel P. Berrange 486b5bacf6SDaniel P. Berrange# hw/misc/milkymist-pfpu.c 498908eb1aSVladimir Sementsov-Ogievskiymilkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 508908eb1aSVladimir Sementsov-Ogievskiymilkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 518908eb1aSVladimir Sementsov-Ogievskiymilkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x" 526b5bacf6SDaniel P. Berrangemilkymist_pfpu_pulse_irq(void) "Pulse IRQ" 531c8a2388SAndrew Jeffery 541c8a2388SAndrew Jeffery# hw/misc/aspeed_scu.c 551c8a2388SAndrew Jefferyaspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 56dd73185bSPeter Maydell 57dd73185bSPeter Maydell# hw/misc/mps2_scc.c 58dd73185bSPeter Maydellmps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 59dd73185bSPeter Maydellmps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 60dd73185bSPeter Maydellmps2_scc_reset(void) "MPS2 SCC: reset" 61dd73185bSPeter Maydellmps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c" 62dd73185bSPeter Maydellmps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32 63dd73185bSPeter Maydellmps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32 640ee1e1f4SSubbaraya Sundeep 659a52d999SPeter Maydell# hw/misc/mps2_fpgaio.c 669a52d999SPeter Maydellmps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 679a52d999SPeter Maydellmps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 689a52d999SPeter Maydellmps2_fpgaio_reset(void) "MPS2 FPGAIO: reset" 699a52d999SPeter Maydellmps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c" 709a52d999SPeter Maydell 710ee1e1f4SSubbaraya Sundeep# hw/misc/msf2-sysreg.c 72787bbc30SDaniel P. Berrangémsf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32 73787bbc30SDaniel P. Berrangémsf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32 740ee1e1f4SSubbaraya Sundeepmsf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register" 7530b2f870SAndrey Smirnov 7630b2f870SAndrey Smirnov#hw/misc/imx7_gpr.c 77787bbc30SDaniel P. Berrangéimx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64 78787bbc30SDaniel P. Berrangéimx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64 7951f233ecSMark Cave-Ayland 8051f233ecSMark Cave-Ayland# hw/misc/mos6522.c 8151f233ecSMark Cave-Aylandmos6522_set_counter(int index, unsigned int val) "T%d.counter=%d" 8251f233ecSMark Cave-Aylandmos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64 8351f233ecSMark Cave-Aylandmos6522_set_sr_int(void) "set sr_int" 8451f233ecSMark Cave-Aylandmos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64 8551f233ecSMark Cave-Aylandmos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x" 869eb8040cSPeter Maydell 87344f4b15SPeter Maydell# hw/misc/tz-mpc.c 88344f4b15SPeter Maydelltz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u" 89344f4b15SPeter Maydelltz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u" 90344f4b15SPeter Maydelltz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d" 91344f4b15SPeter Maydelltz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" 92344f4b15SPeter Maydelltz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s" 93dd29d068SPeter Maydelltz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64 94344f4b15SPeter Maydell 95211e701dSPeter Maydell# hw/misc/tz-msc.c 96211e701dSPeter Maydelltz_msc_reset(void) "TZ MSC: reset" 97211e701dSPeter Maydelltz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d" 98211e701dSPeter Maydelltz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d" 99211e701dSPeter Maydelltz_msc_irq_enable(int level) "TZ MSC: int_enable = %d" 100211e701dSPeter Maydelltz_msc_irq_clear(int level) "TZ MSC: int_clear = %d" 101211e701dSPeter Maydelltz_msc_update_irq(int level) "TZ MSC: setting irq line to %d" 102211e701dSPeter Maydelltz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked" 103211e701dSPeter Maydell 1049eb8040cSPeter Maydell# hw/misc/tz-ppc.c 1059eb8040cSPeter Maydelltz_ppc_reset(void) "TZ PPC: reset" 1069eb8040cSPeter Maydelltz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d" 1079eb8040cSPeter Maydelltz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d" 1089eb8040cSPeter Maydelltz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d" 1099eb8040cSPeter Maydelltz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d" 1109eb8040cSPeter Maydelltz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d" 1119eb8040cSPeter Maydelltz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d" 112f32408f3SDaniel P. Berrangétz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked" 113f32408f3SDaniel P. Berrangétz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked" 114de343bb6SPeter Maydell 115de343bb6SPeter Maydell# hw/misc/iotkit-secctl.c 116de343bb6SPeter Maydelliotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u" 117de343bb6SPeter Maydelliotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u" 118de343bb6SPeter Maydelliotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u" 119de343bb6SPeter Maydelliotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u" 120de343bb6SPeter Maydelliotkit_secctl_reset(void) "IoTKit SecCtl: reset" 121781182e1SJean-Christophe Dubois 122781182e1SJean-Christophe Dubois# hw/misc/imx6ul_ccm.c 123781182e1SJean-Christophe Duboisccm_entry(void) "\n" 124781182e1SJean-Christophe Duboisccm_freq(uint32_t freq) "freq = %d\n" 125781182e1SJean-Christophe Duboisccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d\n" 126781182e1SJean-Christophe Duboisccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32 "\n" 127781182e1SJean-Christophe Duboisccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32 "\n" 12875750e4dSPeter Maydell 12975750e4dSPeter Maydell# hw/misc/iotkit-sysctl.c 13075750e4dSPeter Maydelliotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 13175750e4dSPeter Maydelliotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 13275750e4dSPeter Maydelliotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 13375750e4dSPeter Maydelliotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 13475750e4dSPeter Maydelliotkit_sysctl_reset(void) "IoTKit SysCtl: reset" 1355aeb3689SPeter Maydell 1365aeb3689SPeter Maydell# hw/misc/armsse-cpuid.c 1375aeb3689SPeter Maydellarmsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 1385aeb3689SPeter Maydellarmsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 139*cdf63440SPeter Maydell 140*cdf63440SPeter Maydell# hw/misc/armsse-mhu.c 141*cdf63440SPeter Maydellarmsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 142*cdf63440SPeter Maydellarmsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 143