xref: /openbmc/qemu/hw/misc/trace-events (revision 380a37e4)
187e0331cSPhilippe Mathieu-Daudé# See docs/devel/tracing.txt for syntax documentation.
26b5bacf6SDaniel P. Berrange
3d26af5deSNiek Linnenbank# allwinner-cpucfg.c
4d26af5deSNiek Linnenbankallwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32
5d26af5deSNiek Linnenbankallwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
6d26af5deSNiek Linnenbankallwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
7d26af5deSNiek Linnenbank
8b71d0385SNiek Linnenbank# allwinner-h3-dramc.c
9b71d0385SNiek Linnenbankallwinner_h3_dramc_rowmirror_disable(void) "Disable row mirror"
10b71d0385SNiek Linnenbankallwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64
11b71d0385SNiek Linnenbankallwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
12b71d0385SNiek Linnenbankallwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
13b71d0385SNiek Linnenbankallwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
14b71d0385SNiek Linnenbankallwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
15b71d0385SNiek Linnenbankallwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
16b71d0385SNiek Linnenbankallwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
17b71d0385SNiek Linnenbank
186556617cSNiek Linnenbank# allwinner-sid.c
196556617cSNiek Linnenbankallwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
206556617cSNiek Linnenbankallwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
216556617cSNiek Linnenbank
22dc288de0SMichael Rolnik# avr_power.c
23dc288de0SMichael Rolnikavr_power_read(uint8_t value) "power_reduc read value:%u"
24dc288de0SMichael Rolnikavr_power_write(uint8_t value) "power_reduc write value:%u"
25dc288de0SMichael Rolnik
26500016e5SMarkus Armbruster# eccmemctl.c
278908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
288908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
298908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x"
308908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x"
318908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x"
328908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x"
338908eb1aSVladimir Sementsov-Ogievskiyecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
348908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x"
358908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
368908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x"
378908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x"
388908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x"
398908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x"
408908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x"
418908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x"
428908eb1aSVladimir Sementsov-Ogievskiyecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
438908eb1aSVladimir Sementsov-Ogievskiyecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
448908eb1aSVladimir Sementsov-Ogievskiyecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
456b5bacf6SDaniel P. Berrange
466007523aSPhilippe Mathieu-Daudé# empty_slot.c
476007523aSPhilippe Mathieu-Daudéempty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "wr addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]"
486007523aSPhilippe Mathieu-Daudé
49500016e5SMarkus Armbruster# slavio_misc.c
506b5bacf6SDaniel P. Berrangeslavio_misc_update_irq_raise(void) "Raise IRQ"
516b5bacf6SDaniel P. Berrangeslavio_misc_update_irq_lower(void) "Lower IRQ"
526b5bacf6SDaniel P. Berrangeslavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
538908eb1aSVladimir Sementsov-Ogievskiyslavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
548908eb1aSVladimir Sementsov-Ogievskiyslavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
558908eb1aSVladimir Sementsov-Ogievskiyslavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
568908eb1aSVladimir Sementsov-Ogievskiyslavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
578908eb1aSVladimir Sementsov-Ogievskiyslavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
588908eb1aSVladimir Sementsov-Ogievskiyslavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
598908eb1aSVladimir Sementsov-Ogievskiyslavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
608908eb1aSVladimir Sementsov-Ogievskiyslavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
618908eb1aSVladimir Sementsov-Ogievskiyslavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x"
628908eb1aSVladimir Sementsov-Ogievskiyslavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x"
638908eb1aSVladimir Sementsov-Ogievskiyapc_mem_writeb(uint32_t val) "Write power management 0x%02x"
648908eb1aSVladimir Sementsov-Ogievskiyapc_mem_readb(uint32_t ret) "Read power management 0x%02x"
658908eb1aSVladimir Sementsov-Ogievskiyslavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x"
668908eb1aSVladimir Sementsov-Ogievskiyslavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x"
678908eb1aSVladimir Sementsov-Ogievskiyslavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
688908eb1aSVladimir Sementsov-Ogievskiyslavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
696b5bacf6SDaniel P. Berrange
70500016e5SMarkus Armbruster# milkymist-hpdmc.c
718908eb1aSVladimir Sementsov-Ogievskiymilkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
728908eb1aSVladimir Sementsov-Ogievskiymilkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
736b5bacf6SDaniel P. Berrange
74500016e5SMarkus Armbruster# milkymist-pfpu.c
758908eb1aSVladimir Sementsov-Ogievskiymilkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
768908eb1aSVladimir Sementsov-Ogievskiymilkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
778908eb1aSVladimir Sementsov-Ogievskiymilkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x"
786b5bacf6SDaniel P. Berrangemilkymist_pfpu_pulse_irq(void) "Pulse IRQ"
791c8a2388SAndrew Jeffery
80500016e5SMarkus Armbruster# aspeed_scu.c
811c8a2388SAndrew Jefferyaspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
82dd73185bSPeter Maydell
83dec97760SMarkus Armbruster# mps2-scc.c
84dd73185bSPeter Maydellmps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
85dd73185bSPeter Maydellmps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
86dd73185bSPeter Maydellmps2_scc_reset(void) "MPS2 SCC: reset"
87dd73185bSPeter Maydellmps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
88dd73185bSPeter Maydellmps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
890ee1e1f4SSubbaraya Sundeep
90dec97760SMarkus Armbruster# mps2-fpgaio.c
919a52d999SPeter Maydellmps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
929a52d999SPeter Maydellmps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
939a52d999SPeter Maydellmps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
949a52d999SPeter Maydell
95500016e5SMarkus Armbruster# msf2-sysreg.c
96787bbc30SDaniel P. Berrangémsf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
97787bbc30SDaniel P. Berrangémsf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
980ee1e1f4SSubbaraya Sundeepmsf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
9930b2f870SAndrey Smirnov
100500016e5SMarkus Armbruster# imx7_gpr.c
101787bbc30SDaniel P. Berrangéimx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64
102787bbc30SDaniel P. Berrangéimx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
10351f233ecSMark Cave-Ayland
104500016e5SMarkus Armbruster# mos6522.c
10551f233ecSMark Cave-Aylandmos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
10651f233ecSMark Cave-Aylandmos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
10751f233ecSMark Cave-Aylandmos6522_set_sr_int(void) "set sr_int"
10851f233ecSMark Cave-Aylandmos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
10951f233ecSMark Cave-Aylandmos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
1109eb8040cSPeter Maydell
111e331f79eSHavard Skinnemoen# npcm7xx_clk.c
112e331f79eSHavard Skinnemoennpcm7xx_clk_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
113e331f79eSHavard Skinnemoennpcm7xx_clk_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
114e331f79eSHavard Skinnemoen
115e5a7ba87SHavard Skinnemoen# npcm7xx_gcr.c
116e5a7ba87SHavard Skinnemoennpcm7xx_gcr_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
117e5a7ba87SHavard Skinnemoennpcm7xx_gcr_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
118e5a7ba87SHavard Skinnemoen
119*380a37e4SHao Wu# npcm7xx_mft.c
120*380a37e4SHao Wunpcm7xx_mft_read(const char *name, uint64_t offset, uint16_t value) "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx16
121*380a37e4SHao Wunpcm7xx_mft_write(const char *name, uint64_t offset, uint16_t value) "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx16
122*380a37e4SHao Wunpcm7xx_mft_rpm(const char *clock, uint32_t clock_hz, int state, int32_t cnt, uint32_t rpm, uint32_t duty) " fan clk: %s clock_hz: %" PRIu32 ", state: %d, cnt: %" PRIi32 ", rpm: %" PRIu32 ", duty: %" PRIu32
123*380a37e4SHao Wunpcm7xx_mft_capture(const char *name, int irq_level) "%s: level: %d"
124*380a37e4SHao Wunpcm7xx_mft_update_clock(const char *name, uint16_t sel, uint64_t clock_period, uint64_t prescaled_clock_period) "%s: sel: 0x%02" PRIx16 ", period: %" PRIu64 ", prescaled: %" PRIu64
125*380a37e4SHao Wunpcm7xx_mft_set_duty(const char *name, int n, int value) "%s[%d]: %d"
126*380a37e4SHao Wu
127326ccfe2SHavard Skinnemoen# npcm7xx_rng.c
128326ccfe2SHavard Skinnemoennpcm7xx_rng_read(uint64_t offset, uint64_t value, unsigned size) "offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u"
129326ccfe2SHavard Skinnemoennpcm7xx_rng_write(uint64_t offset, uint64_t value, unsigned size) "offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u"
130326ccfe2SHavard Skinnemoen
1311e943c58SHao Wu# npcm7xx_pwm.c
1321e943c58SHao Wunpcm7xx_pwm_read(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
1331e943c58SHao Wunpcm7xx_pwm_write(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
1341e943c58SHao Wunpcm7xx_pwm_update_freq(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) "%s pwm[%u] Update Freq: old_freq: %u, new_freq: %u"
1351e943c58SHao Wunpcm7xx_pwm_update_duty(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) "%s pwm[%u] Update Duty: old_duty: %u, new_duty: %u"
1361e943c58SHao Wu
137b15e402fSMarkus Armbruster# stm32f4xx_syscfg.c
138cba42d61SMichael Tokarevstm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interrupt: GPIO: %d, Line: %d; Level: %d"
139870c034dSAlistair Francisstm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d"
140870c034dSAlistair Francisstm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
141870c034dSAlistair Francisstm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
142870c034dSAlistair Francis
143b15e402fSMarkus Armbruster# stm32f4xx_exti.c
144e64d8c83SAlistair Francisstm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d"
145e64d8c83SAlistair Francisstm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
146e64d8c83SAlistair Francisstm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
147e64d8c83SAlistair Francis
148500016e5SMarkus Armbruster# tz-mpc.c
149344f4b15SPeter Maydelltz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u"
150344f4b15SPeter Maydelltz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u"
151344f4b15SPeter Maydelltz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d"
152344f4b15SPeter Maydelltz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
153344f4b15SPeter Maydelltz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s"
154dd29d068SPeter Maydelltz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64
155344f4b15SPeter Maydell
156500016e5SMarkus Armbruster# tz-msc.c
157211e701dSPeter Maydelltz_msc_reset(void) "TZ MSC: reset"
158211e701dSPeter Maydelltz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d"
159211e701dSPeter Maydelltz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d"
160211e701dSPeter Maydelltz_msc_irq_clear(int level) "TZ MSC: int_clear = %d"
161211e701dSPeter Maydelltz_msc_update_irq(int level) "TZ MSC: setting irq line to %d"
162211e701dSPeter Maydelltz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked"
163211e701dSPeter Maydell
164500016e5SMarkus Armbruster# tz-ppc.c
1659eb8040cSPeter Maydelltz_ppc_reset(void) "TZ PPC: reset"
1669eb8040cSPeter Maydelltz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d"
1679eb8040cSPeter Maydelltz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d"
1689eb8040cSPeter Maydelltz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d"
1699eb8040cSPeter Maydelltz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d"
1709eb8040cSPeter Maydelltz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d"
1719eb8040cSPeter Maydelltz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d"
172f32408f3SDaniel P. Berrangétz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked"
173f32408f3SDaniel P. Berrangétz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked"
174de343bb6SPeter Maydell
175500016e5SMarkus Armbruster# iotkit-secctl.c
176de343bb6SPeter Maydelliotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u"
177de343bb6SPeter Maydelliotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u"
178de343bb6SPeter Maydelliotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u"
179de343bb6SPeter Maydelliotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u"
180781182e1SJean-Christophe Dubois
181500016e5SMarkus Armbruster# imx6ul_ccm.c
182794dcb54SPhilippe Mathieu-Daudéccm_entry(void) ""
183794dcb54SPhilippe Mathieu-Daudéccm_freq(uint32_t freq) "freq = %d"
184794dcb54SPhilippe Mathieu-Daudéccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d"
185794dcb54SPhilippe Mathieu-Daudéccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
186794dcb54SPhilippe Mathieu-Daudéccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
18775750e4dSPeter Maydell
188dec97760SMarkus Armbruster# iotkit-sysinfo.c
18975750e4dSPeter Maydelliotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
19075750e4dSPeter Maydelliotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
191dec97760SMarkus Armbruster
192dec97760SMarkus Armbruster# iotkit-sysctl.c
19375750e4dSPeter Maydelliotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
19475750e4dSPeter Maydelliotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
19575750e4dSPeter Maydelliotkit_sysctl_reset(void) "IoTKit SysCtl: reset"
1965aeb3689SPeter Maydell
1974239b311SPeter Maydell# armsse-cpu-pwrctrl.c
1984239b311SPeter Maydellarmsse_cpu_pwrctrl_read(uint64_t offset, uint64_t data, unsigned size) "SSE-300 CPU_PWRCTRL read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
1994239b311SPeter Maydellarmsse_cpu_pwrctrl_write(uint64_t offset, uint64_t data, unsigned size) "SSE-300 CPU_PWRCTRL write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
2004239b311SPeter Maydell
201500016e5SMarkus Armbruster# armsse-cpuid.c
2025aeb3689SPeter Maydellarmsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
2035aeb3689SPeter Maydellarmsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
204cdf63440SPeter Maydell
205500016e5SMarkus Armbruster# armsse-mhu.c
206cdf63440SPeter Maydellarmsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
207cdf63440SPeter Maydellarmsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
208118c82e7SEddie James
209118c82e7SEddie James# aspeed_xdma.c
210118c82e7SEddie Jamesaspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
21119845504SPhilippe Mathieu-Daudé
212b15e402fSMarkus Armbruster# bcm2835_property.c
213b15e402fSMarkus Armbrusterbcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
214b15e402fSMarkus Armbruster
21519845504SPhilippe Mathieu-Daudé# bcm2835_mbox.c
21619845504SPhilippe Mathieu-Daudébcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
21719845504SPhilippe Mathieu-Daudébcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
21819845504SPhilippe Mathieu-Daudébcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
219b2619c15SLaurent Vivier
220b2619c15SLaurent Vivier# mac_via.c
221b2619c15SLaurent Viviervia1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x"
222b2619c15SLaurent Viviervia1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x"
223b2619c15SLaurent Viviervia1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x"
224b2619c15SLaurent Viviervia1_rtc_internal_cmd(int cmd) "cmd=0x%02x"
225b2619c15SLaurent Viviervia1_rtc_cmd_invalid(int value) "value=0x%02x"
226b2619c15SLaurent Viviervia1_rtc_internal_time(uint32_t time) "time=0x%08x"
227b2619c15SLaurent Viviervia1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x"
228b2619c15SLaurent Viviervia1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x"
229b2619c15SLaurent Viviervia1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u"
230b2619c15SLaurent Viviervia1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x"
231b2619c15SLaurent Viviervia1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x"
232b2619c15SLaurent Viviervia1_rtc_cmd_test_write(int value) "value=0x%02x"
233b2619c15SLaurent Viviervia1_rtc_cmd_wprotect_write(int value) "value=0x%02x"
234b2619c15SLaurent Viviervia1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x"
235b2619c15SLaurent Viviervia1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x"
236b2619c15SLaurent Viviervia1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
237b2619c15SLaurent Viviervia1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
238975fceddSMark Cave-Aylandvia1_adb_send(const char *state, uint8_t data, const char *vadbint) "state %s data=0x%02x vADBInt=%s"
239975fceddSMark Cave-Aylandvia1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) "state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
240975fceddSMark Cave-Aylandvia1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) "data=0x%02x vADBInt=%s status=0x%x index=%d size=%d"
241d15188ddSPhilippe Mathieu-Daudé
242d15188ddSPhilippe Mathieu-Daudé# grlib_ahb_apb_pnp.c
243d15188ddSPhilippe Mathieu-Daudégrlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" data:0x%08x"
244d15188ddSPhilippe Mathieu-Daudégrlib_apb_pnp_read(uint64_t addr, uint32_t value) "APB PnP read addr:0x%03"PRIx64" data:0x%08x"
245b989b89fSPhilippe Mathieu-Daudé
246c1b29826SPhilippe Mathieu-Daudé# led.c
247c1b29826SPhilippe Mathieu-Daudéled_set_intensity(const char *color, const char *desc, uint8_t intensity_percent) "LED desc:'%s' color:%s intensity: %u%%"
2484aef4399SPhilippe Mathieu-Daudéled_change_intensity(const char *color, const char *desc, uint8_t old_intensity_percent, uint8_t new_intensity_percent) "LED desc:'%s' color:%s intensity %u%% -> %u%%"
249c1b29826SPhilippe Mathieu-Daudé
250b989b89fSPhilippe Mathieu-Daudé# pca9552.c
251b989b89fSPhilippe Mathieu-Daudépca955x_gpio_status(const char *description, const char *buf) "%s GPIOs 0-15 [%s]"
252d82ab293SPhilippe Mathieu-Daudépca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) "%s GPIO id:%u status: %u -> %u"
253fc14176bSLuc Michel
254fc14176bSLuc Michel# bcm2835_cprman.c
255fc14176bSLuc Michelbcm2835_cprman_read(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
256fc14176bSLuc Michelbcm2835_cprman_write(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
257fc14176bSLuc Michelbcm2835_cprman_write_invalid_magic(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64
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